1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.

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78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
86 am33xx_control_module: control_module@4a002000 {
87 compatible = "syscon";
88 reg = <0x44e10000 0x7fc>;
89 };
90
91 am33xx_pinmux: pinmux@44e10800 {
92 compatible = "pinctrl-single";
93 reg = <0x44e10800 0x0238>;
94 #address-cells = <1>;
95 #size-cells = <0>;
96 pinctrl-single,register-width = <32>;
97 pinctrl-single,function-mask = <0x7f>;
98 };
99
100 /*
101 * XXX: Use a flat representation of the AM33XX interconnect.
102 * The real AM33XX interconnect network is quite complex. Since
103 * it will not bring real advantage to represent that in DT
104 * for the moment, just use a fake OCP bus entry to represent
105 * the whole bus hierarchy.
106 */
107 ocp {
108 compatible = "simple-bus";
109 #address-cells = <1>;
110 #size-cells = <1>;
111 ranges;
112 ti,hwmods = "l3_main";
113
114 prcm: prcm@44e00000 {
115 compatible = "ti,am3-prcm";
116 reg = <0x44e00000 0x4000>;
117
118 prcm_clocks: clocks {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 };
122
123 prcm_clockdomains: clockdomains {
124 };
125 };
126
127 scrm: scrm@44e10000 {
128 compatible = "ti,am3-scrm";
129 reg = <0x44e10000 0x2000>;
130
131 scrm_clocks: clocks {
132 #address-cells = <1>;
133 #size-cells = <0>;
134 };
135
136 scrm_clockdomains: clockdomains {
137 };
138 };
139
140 cm: syscon@44e10000 {
141 compatible = "ti,am33xx-controlmodule", "syscon";
142 reg = <0x44e10000 0x800>;
143 };
144
145 intc: interrupt-controller@48200000 {
146 compatible = "ti,am33xx-intc";
147 interrupt-controller;
148 #interrupt-cells = <1>;
149 reg = <0x48200000 0x1000>;
150 };
151
152 edma: edma@49000000 {
153 compatible = "ti,edma3";
154 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
155 reg = <0x49000000 0x10000>,
156 <0x44e10f90 0x40>;
157 interrupts = <12 13 14>;
158 #dma-cells = <1>;
159 };
160
161 gpio0: gpio@44e07000 {
162 compatible = "ti,omap4-gpio";
163 ti,hwmods = "gpio1";
164 gpio-controller;
165 #gpio-cells = <2>;
166 interrupt-controller;
167 #interrupt-cells = <2>;
168 reg = <0x44e07000 0x1000>;

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198 #gpio-cells = <2>;
199 interrupt-controller;
200 #interrupt-cells = <2>;
201 reg = <0x481ae000 0x1000>;
202 interrupts = <62>;
203 };
204
205 uart0: serial@44e09000 {
206 compatible = "ti,omap3-uart";
207 ti,hwmods = "uart1";
208 clock-frequency = <48000000>;
209 reg = <0x44e09000 0x2000>;
210 interrupts = <72>;
211 status = "disabled";
212 dmas = <&edma 26>, <&edma 27>;
213 dma-names = "tx", "rx";
214 };
215
216 uart1: serial@48022000 {
217 compatible = "ti,omap3-uart";
218 ti,hwmods = "uart2";
219 clock-frequency = <48000000>;
220 reg = <0x48022000 0x2000>;
221 interrupts = <73>;
222 status = "disabled";
223 dmas = <&edma 28>, <&edma 29>;
224 dma-names = "tx", "rx";
225 };
226
227 uart2: serial@48024000 {
228 compatible = "ti,omap3-uart";
229 ti,hwmods = "uart3";
230 clock-frequency = <48000000>;
231 reg = <0x48024000 0x2000>;
232 interrupts = <74>;
233 status = "disabled";
234 dmas = <&edma 30>, <&edma 31>;
235 dma-names = "tx", "rx";
236 };
237
238 uart3: serial@481a6000 {
239 compatible = "ti,omap3-uart";
240 ti,hwmods = "uart4";
241 clock-frequency = <48000000>;
242 reg = <0x481a6000 0x2000>;
243 interrupts = <44>;
244 status = "disabled";
245 };
246
247 uart4: serial@481a8000 {
248 compatible = "ti,omap3-uart";
249 ti,hwmods = "uart5";
250 clock-frequency = <48000000>;
251 reg = <0x481a8000 0x2000>;
252 interrupts = <45>;
253 status = "disabled";
254 };
255
256 uart5: serial@481aa000 {
257 compatible = "ti,omap3-uart";
258 ti,hwmods = "uart6";
259 clock-frequency = <48000000>;
260 reg = <0x481aa000 0x2000>;
261 interrupts = <46>;
262 status = "disabled";
263 };
264
265 i2c0: i2c@44e0b000 {

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293 };
294
295 mmc1: mmc@48060000 {
296 compatible = "ti,omap4-hsmmc";
297 ti,hwmods = "mmc1";
298 ti,dual-volt;
299 ti,needs-special-reset;
300 ti,needs-special-hs-handling;
301 dmas = <&edma 24
302 &edma 25>;
303 dma-names = "tx", "rx";
304 interrupts = <64>;
305 interrupt-parent = <&intc>;
306 reg = <0x48060000 0x1000>;
307 status = "disabled";
308 };
309
310 mmc2: mmc@481d8000 {
311 compatible = "ti,omap4-hsmmc";
312 ti,hwmods = "mmc2";
313 ti,needs-special-reset;
314 dmas = <&edma 2
315 &edma 3>;
316 dma-names = "tx", "rx";
317 interrupts = <28>;
318 interrupt-parent = <&intc>;
319 reg = <0x481d8000 0x1000>;
320 status = "disabled";
321 };
322
323 mmc3: mmc@47810000 {

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345 };
346
347 dcan0: can@481cc000 {
348 compatible = "ti,am3352-d_can";
349 ti,hwmods = "d_can0";
350 reg = <0x481cc000 0x2000>;
351 clocks = <&dcan0_fck>;
352 clock-names = "fck";
353 syscon-raminit = <&am33xx_control_module 0x644 0>;
354 interrupts = <52>;
355 status = "disabled";
356 };
357
358 dcan1: can@481d0000 {
359 compatible = "ti,am3352-d_can";
360 ti,hwmods = "d_can1";
361 reg = <0x481d0000 0x2000>;
362 clocks = <&dcan1_fck>;
363 clock-names = "fck";
364 syscon-raminit = <&am33xx_control_module 0x644 1>;
365 interrupts = <55>;
366 status = "disabled";
367 };
368
369 mailbox: mailbox@480C8000 {
370 compatible = "ti,omap4-mailbox";
371 reg = <0x480C8000 0x200>;
372 interrupts = <77>;

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445 spi0: spi@48030000 {
446 compatible = "ti,omap4-mcspi";
447 #address-cells = <1>;
448 #size-cells = <0>;
449 reg = <0x48030000 0x400>;
450 interrupts = <65>;
451 ti,spi-num-cs = <2>;
452 ti,hwmods = "spi0";
453 dmas = <&edma 16
454 &edma 17
455 &edma 18
456 &edma 19>;
457 dma-names = "tx0", "rx0", "tx1", "rx1";
458 status = "disabled";
459 };
460
461 spi1: spi@481a0000 {
462 compatible = "ti,omap4-mcspi";
463 #address-cells = <1>;
464 #size-cells = <0>;
465 reg = <0x481a0000 0x400>;
466 interrupts = <125>;
467 ti,spi-num-cs = <2>;
468 ti,hwmods = "spi1";
469 dmas = <&edma 42
470 &edma 43
471 &edma 44
472 &edma 45>;
473 dma-names = "tx0", "rx0", "tx1", "rx1";
474 status = "disabled";
475 };
476
477 usb: usb@47400000 {
478 compatible = "ti,am33xx-usb";
479 reg = <0x47400000 0x1000>;
480 ranges;

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688 #pwm-cells = <3>;
689 reg = <0x48304200 0x80>;
690 ti,hwmods = "ehrpwm2";
691 status = "disabled";
692 };
693 };
694
695 mac: ethernet@4a100000 {
696 compatible = "ti,cpsw";
697 ti,hwmods = "cpgmac0";
698 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
699 clock-names = "fck", "cpts";
700 cpdma_channels = <8>;
701 ale_entries = <1024>;
702 bd_ram_size = <0x2000>;
703 no_bd_ram = <0>;
704 rx_descs = <64>;

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715 /*
716 * c0_rx_thresh_pend
717 * c0_rx_pend
718 * c0_tx_pend
719 * c0_misc_pend
720 */
721 interrupts = <40 41 42 43>;
722 ranges;
723 syscon = <&cm>;
724 status = "disabled";
725
726 davinci_mdio: mdio@4a101000 {
727 compatible = "ti,davinci_mdio";
728 #address-cells = <1>;
729 #size-cells = <0>;
730 ti,hwmods = "davinci_mdio";
731 bus_freq = <1000000>;

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750 };
751 };
752
753 ocmcram: ocmcram@40300000 {
754 compatible = "mmio-sram";
755 reg = <0x40300000 0x10000>; /* 64k */
756 };
757
758 wkup_m3: wkup_m3@44d00000 {
759 compatible = "ti,am3353-wkup-m3";
760 reg = <0x44d00000 0x4000 /* M3 UMEM */
761 0x44d80000 0x2000>; /* M3 DMEM */
762 ti,hwmods = "wkup_m3";
763 ti,no-reset-on-init;
764 };
765
766 elm: elm@48080000 {
767 compatible = "ti,am3352-elm";
768 reg = <0x48080000 0x2000>;
769 interrupts = <4>;
770 ti,hwmods = "elm";
771 status = "disabled";
772 };
773

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798 };
799
800 gpmc: gpmc@50000000 {
801 compatible = "ti,am3352-gpmc";
802 ti,hwmods = "gpmc";
803 ti,no-idle-on-init;
804 reg = <0x50000000 0x2000>;
805 interrupts = <100>;
806 gpmc,num-cs = <7>;
807 gpmc,num-waitpins = <2>;
808 #address-cells = <2>;
809 #size-cells = <1>;
810 status = "disabled";
811 };
812
813 sham: sham@53100000 {
814 compatible = "ti,omap4-sham";
815 ti,hwmods = "sham";
816 reg = <0x53100000 0x200>;
817 interrupts = <109>;
818 dmas = <&edma 36>;
819 dma-names = "rx";
820 };
821
822 aes: aes@53500000 {
823 compatible = "ti,omap4-aes";
824 ti,hwmods = "aes";
825 reg = <0x53500000 0xa0>;
826 interrupts = <103>;
827 dmas = <&edma 6>,
828 <&edma 5>;
829 dma-names = "tx", "rx";
830 };
831
832 mcasp0: mcasp@48038000 {
833 compatible = "ti,am33xx-mcasp-audio";
834 ti,hwmods = "mcasp0";
835 reg = <0x48038000 0x2000>,
836 <0x46000000 0x400000>;
837 reg-names = "mpu", "dat";
838 interrupts = <80>, <81>;
839 interrupt-names = "tx", "rx";
840 status = "disabled";
841 dmas = <&edma 8>,
842 <&edma 9>;
843 dma-names = "tx", "rx";
844 };
845
846 mcasp1: mcasp@4803C000 {
847 compatible = "ti,am33xx-mcasp-audio";
848 ti,hwmods = "mcasp1";
849 reg = <0x4803C000 0x2000>,
850 <0x46400000 0x400000>;
851 reg-names = "mpu", "dat";
852 interrupts = <82>, <83>;
853 interrupt-names = "tx", "rx";
854 status = "disabled";
855 dmas = <&edma 10>,
856 <&edma 11>;
857 dma-names = "tx", "rx";
858 };
859
860 rng: rng@48310000 {
861 compatible = "ti,omap4-rng";
862 ti,hwmods = "rng";
863 reg = <0x48310000 0x2000>;
864 interrupts = <111>;
865 };
866 };
867};
868
869/include/ "am33xx-clocks.dtsi"