1/*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
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78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
86 /*
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex. Since
89 * it will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
92 */
93 ocp {
94 compatible = "simple-bus";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges;
98 ti,hwmods = "l3_main";
99
100 l4_wkup: l4_wkup@44c00000 {
101 compatible = "ti,am3-l4-wkup", "simple-bus";
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges = <0 0x44c00000 0x280000>;
105
106 wkup_m3: wkup_m3@100000 {
107 compatible = "ti,am3352-wkup-m3";
108 reg = <0x100000 0x4000>,
109 <0x180000 0x2000>;
110 reg-names = "umem", "dmem";
111 ti,hwmods = "wkup_m3";
112 ti,pm-firmware = "am335x-pm-firmware.elf";
113 };
114
115 prcm: prcm@200000 {
116 compatible = "ti,am3-prcm";
117 reg = <0x200000 0x4000>;
118
119 prcm_clocks: clocks {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 };
123
124 prcm_clockdomains: clockdomains {
125 };
126 };
127
128 scm: scm@210000 {
129 compatible = "ti,am3-scm", "simple-bus";
130 reg = <0x210000 0x2000>;
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges = <0 0x210000 0x2000>;
134
135 am33xx_pinmux: pinmux@800 {
136 compatible = "pinctrl-single";
137 reg = <0x800 0x238>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x7f>;
142 };
143
144 scm_conf: scm_conf@0 {
145 compatible = "syscon";
146 reg = <0x0 0x800>;
147 #address-cells = <1>;
148 #size-cells = <1>;
149
150 scm_clocks: clocks {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 };
154 };
155
156 wkup_m3_ipc: wkup_m3_ipc@1324 {
157 compatible = "ti,am3352-wkup-m3-ipc";
158 reg = <0x1324 0x24>;
159 interrupts = <78>;
160 ti,rproc = <&wkup_m3>;
161 mboxes = <&mailbox &mbox_wkupm3>;
162 };
163
164 edma_xbar: dma-router@f90 {
165 compatible = "ti,am335x-edma-crossbar";
166 reg = <0xf90 0x40>;
167 #dma-cells = <3>;
168 dma-requests = <32>;
169 dma-masters = <&edma>;
170 };
171
172 scm_clockdomains: clockdomains {
173 };
174 };
175 };
176
177 intc: interrupt-controller@48200000 {
178 compatible = "ti,am33xx-intc";
179 interrupt-controller;
180 #interrupt-cells = <1>;
181 reg = <0x48200000 0x1000>;
182 };
183
184 edma: edma@49000000 {
185 compatible = "ti,edma3-tpcc";
186 ti,hwmods = "tpcc";
187 reg = <0x49000000 0x10000>;
188 reg-names = "edma3_cc";
189 interrupts = <12 13 14>;
190 interrupt-names = "edma3_ccint", "emda3_mperr",
191 "edma3_ccerrint";
192 dma-requests = <64>;
193 #dma-cells = <2>;
194
195 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
196 <&edma_tptc2 0>;
197
198 ti,edma-memcpy-channels = <20 21>;
199 };
200
201 edma_tptc0: tptc@49800000 {
202 compatible = "ti,edma3-tptc";
203 ti,hwmods = "tptc0";
204 reg = <0x49800000 0x100000>;
205 interrupts = <112>;
206 interrupt-names = "edma3_tcerrint";
207 };
208
209 edma_tptc1: tptc@49900000 {
210 compatible = "ti,edma3-tptc";
211 ti,hwmods = "tptc1";
212 reg = <0x49900000 0x100000>;
213 interrupts = <113>;
214 interrupt-names = "edma3_tcerrint";
215 };
216
217 edma_tptc2: tptc@49a00000 {
218 compatible = "ti,edma3-tptc";
219 ti,hwmods = "tptc2";
220 reg = <0x49a00000 0x100000>;
221 interrupts = <114>;
222 interrupt-names = "edma3_tcerrint";
223 };
224
225 gpio0: gpio@44e07000 {
226 compatible = "ti,omap4-gpio";
227 ti,hwmods = "gpio1";
228 gpio-controller;
229 #gpio-cells = <2>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
232 reg = <0x44e07000 0x1000>;
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262 #gpio-cells = <2>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
265 reg = <0x481ae000 0x1000>;
266 interrupts = <62>;
267 };
268
269 uart0: serial@44e09000 {
270 compatible = "ti,am3352-uart", "ti,omap3-uart";
271 ti,hwmods = "uart1";
272 clock-frequency = <48000000>;
273 reg = <0x44e09000 0x2000>;
274 interrupts = <72>;
275 status = "disabled";
276 dmas = <&edma 26 0>, <&edma 27 0>;
277 dma-names = "tx", "rx";
278 };
279
280 uart1: serial@48022000 {
281 compatible = "ti,am3352-uart", "ti,omap3-uart";
282 ti,hwmods = "uart2";
283 clock-frequency = <48000000>;
284 reg = <0x48022000 0x2000>;
285 interrupts = <73>;
286 status = "disabled";
287 dmas = <&edma 28 0>, <&edma 29 0>;
288 dma-names = "tx", "rx";
289 };
290
291 uart2: serial@48024000 {
292 compatible = "ti,am3352-uart", "ti,omap3-uart";
293 ti,hwmods = "uart3";
294 clock-frequency = <48000000>;
295 reg = <0x48024000 0x2000>;
296 interrupts = <74>;
297 status = "disabled";
298 dmas = <&edma 30 0>, <&edma 31 0>;
299 dma-names = "tx", "rx";
300 };
301
302 uart3: serial@481a6000 {
303 compatible = "ti,am3352-uart", "ti,omap3-uart";
304 ti,hwmods = "uart4";
305 clock-frequency = <48000000>;
306 reg = <0x481a6000 0x2000>;
307 interrupts = <44>;
308 status = "disabled";
309 };
310
311 uart4: serial@481a8000 {
312 compatible = "ti,am3352-uart", "ti,omap3-uart";
313 ti,hwmods = "uart5";
314 clock-frequency = <48000000>;
315 reg = <0x481a8000 0x2000>;
316 interrupts = <45>;
317 status = "disabled";
318 };
319
320 uart5: serial@481aa000 {
321 compatible = "ti,am3352-uart", "ti,omap3-uart";
322 ti,hwmods = "uart6";
323 clock-frequency = <48000000>;
324 reg = <0x481aa000 0x2000>;
325 interrupts = <46>;
326 status = "disabled";
327 };
328
329 i2c0: i2c@44e0b000 {
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357 };
358
359 mmc1: mmc@48060000 {
360 compatible = "ti,omap4-hsmmc";
361 ti,hwmods = "mmc1";
362 ti,dual-volt;
363 ti,needs-special-reset;
364 ti,needs-special-hs-handling;
365 dmas = <&edma_xbar 24 0 0
366 &edma_xbar 25 0 0>;
367 dma-names = "tx", "rx";
368 interrupts = <64>;
369 interrupt-parent = <&intc>;
370 reg = <0x48060000 0x1000>;
371 status = "disabled";
372 };
373
374 mmc2: mmc@481d8000 {
375 compatible = "ti,omap4-hsmmc";
376 ti,hwmods = "mmc2";
377 ti,needs-special-reset;
378 dmas = <&edma 2 0
379 &edma 3 0>;
380 dma-names = "tx", "rx";
381 interrupts = <28>;
382 interrupt-parent = <&intc>;
383 reg = <0x481d8000 0x1000>;
384 status = "disabled";
385 };
386
387 mmc3: mmc@47810000 {
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409 };
410
411 dcan0: can@481cc000 {
412 compatible = "ti,am3352-d_can";
413 ti,hwmods = "d_can0";
414 reg = <0x481cc000 0x2000>;
415 clocks = <&dcan0_fck>;
416 clock-names = "fck";
417 syscon-raminit = <&scm_conf 0x644 0>;
418 interrupts = <52>;
419 status = "disabled";
420 };
421
422 dcan1: can@481d0000 {
423 compatible = "ti,am3352-d_can";
424 ti,hwmods = "d_can1";
425 reg = <0x481d0000 0x2000>;
426 clocks = <&dcan1_fck>;
427 clock-names = "fck";
428 syscon-raminit = <&scm_conf 0x644 1>;
429 interrupts = <55>;
430 status = "disabled";
431 };
432
433 mailbox: mailbox@480C8000 {
434 compatible = "ti,omap4-mailbox";
435 reg = <0x480C8000 0x200>;
436 interrupts = <77>;
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509 spi0: spi@48030000 {
510 compatible = "ti,omap4-mcspi";
511 #address-cells = <1>;
512 #size-cells = <0>;
513 reg = <0x48030000 0x400>;
514 interrupts = <65>;
515 ti,spi-num-cs = <2>;
516 ti,hwmods = "spi0";
517 dmas = <&edma 16 0
518 &edma 17 0
519 &edma 18 0
520 &edma 19 0>;
521 dma-names = "tx0", "rx0", "tx1", "rx1";
522 status = "disabled";
523 };
524
525 spi1: spi@481a0000 {
526 compatible = "ti,omap4-mcspi";
527 #address-cells = <1>;
528 #size-cells = <0>;
529 reg = <0x481a0000 0x400>;
530 interrupts = <125>;
531 ti,spi-num-cs = <2>;
532 ti,hwmods = "spi1";
533 dmas = <&edma 42 0
534 &edma 43 0
535 &edma 44 0
536 &edma 45 0>;
537 dma-names = "tx0", "rx0", "tx1", "rx1";
538 status = "disabled";
539 };
540
541 usb: usb@47400000 {
542 compatible = "ti,am33xx-usb";
543 reg = <0x47400000 0x1000>;
544 ranges;
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752 #pwm-cells = <3>;
753 reg = <0x48304200 0x80>;
754 ti,hwmods = "ehrpwm2";
755 status = "disabled";
756 };
757 };
758
759 mac: ethernet@4a100000 {
760 compatible = "ti,am335x-cpsw","ti,cpsw";
761 ti,hwmods = "cpgmac0";
762 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
763 clock-names = "fck", "cpts";
764 cpdma_channels = <8>;
765 ale_entries = <1024>;
766 bd_ram_size = <0x2000>;
767 no_bd_ram = <0>;
768 rx_descs = <64>;
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779 /*
780 * c0_rx_thresh_pend
781 * c0_rx_pend
782 * c0_tx_pend
783 * c0_misc_pend
784 */
785 interrupts = <40 41 42 43>;
786 ranges;
787 syscon = <&scm_conf>;
788 status = "disabled";
789
790 davinci_mdio: mdio@4a101000 {
791 compatible = "ti,davinci_mdio";
792 #address-cells = <1>;
793 #size-cells = <0>;
794 ti,hwmods = "davinci_mdio";
795 bus_freq = <1000000>;
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814 };
815 };
816
817 ocmcram: ocmcram@40300000 {
818 compatible = "mmio-sram";
819 reg = <0x40300000 0x10000>; /* 64k */
820 };
821
822 elm: elm@48080000 {
823 compatible = "ti,am3352-elm";
824 reg = <0x48080000 0x2000>;
825 interrupts = <4>;
826 ti,hwmods = "elm";
827 status = "disabled";
828 };
829
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854 };
855
856 gpmc: gpmc@50000000 {
857 compatible = "ti,am3352-gpmc";
858 ti,hwmods = "gpmc";
859 ti,no-idle-on-init;
860 reg = <0x50000000 0x2000>;
861 interrupts = <100>;
862 dmas = <&edma 52>;
863 dma-names = "rxtx";
864 gpmc,num-cs = <7>;
865 gpmc,num-waitpins = <2>;
866 #address-cells = <2>;
867 #size-cells = <1>;
868 status = "disabled";
869 };
870
871 sham: sham@53100000 {
872 compatible = "ti,omap4-sham";
873 ti,hwmods = "sham";
874 reg = <0x53100000 0x200>;
875 interrupts = <109>;
876 dmas = <&edma 36 0>;
877 dma-names = "rx";
878 };
879
880 aes: aes@53500000 {
881 compatible = "ti,omap4-aes";
882 ti,hwmods = "aes";
883 reg = <0x53500000 0xa0>;
884 interrupts = <103>;
885 dmas = <&edma 6 0>,
886 <&edma 5 0>;
887 dma-names = "tx", "rx";
888 };
889
890 mcasp0: mcasp@48038000 {
891 compatible = "ti,am33xx-mcasp-audio";
892 ti,hwmods = "mcasp0";
893 reg = <0x48038000 0x2000>,
894 <0x46000000 0x400000>;
895 reg-names = "mpu", "dat";
896 interrupts = <80>, <81>;
897 interrupt-names = "tx", "rx";
898 status = "disabled";
899 dmas = <&edma 8 2>,
900 <&edma 9 2>;
901 dma-names = "tx", "rx";
902 };
903
904 mcasp1: mcasp@4803C000 {
905 compatible = "ti,am33xx-mcasp-audio";
906 ti,hwmods = "mcasp1";
907 reg = <0x4803C000 0x2000>,
908 <0x46400000 0x400000>;
909 reg-names = "mpu", "dat";
910 interrupts = <82>, <83>;
911 interrupt-names = "tx", "rx";
912 status = "disabled";
913 dmas = <&edma 10 2>,
914 <&edma 11 2>;
915 dma-names = "tx", "rx";
916 };
917
918 rng: rng@48310000 {
919 compatible = "ti,omap4-rng";
920 ti,hwmods = "rng";
921 reg = <0x48310000 0x2000>;
922 interrupts = <111>;
923 };
924 };
925};
926
927/include/ "am33xx-clocks.dtsi"
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
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78 soc {
79 compatible = "ti,omap-infra";
80 mpu {
81 compatible = "ti,omap3-mpu";
82 ti,hwmods = "mpu";
83 };
84 };
85
86 /*
87 * XXX: Use a flat representation of the AM33XX interconnect.
88 * The real AM33XX interconnect network is quite complex. Since
89 * it will not bring real advantage to represent that in DT
90 * for the moment, just use a fake OCP bus entry to represent
91 * the whole bus hierarchy.
92 */
93 ocp {
94 compatible = "simple-bus";
95 #address-cells = <1>;
96 #size-cells = <1>;
97 ranges;
98 ti,hwmods = "l3_main";
99
100 l4_wkup: l4_wkup@44c00000 {
101 compatible = "ti,am3-l4-wkup", "simple-bus";
102 #address-cells = <1>;
103 #size-cells = <1>;
104 ranges = <0 0x44c00000 0x280000>;
105
106 wkup_m3: wkup_m3@100000 {
107 compatible = "ti,am3352-wkup-m3";
108 reg = <0x100000 0x4000>,
109 <0x180000 0x2000>;
110 reg-names = "umem", "dmem";
111 ti,hwmods = "wkup_m3";
112 ti,pm-firmware = "am335x-pm-firmware.elf";
113 };
114
115 prcm: prcm@200000 {
116 compatible = "ti,am3-prcm";
117 reg = <0x200000 0x4000>;
118
119 prcm_clocks: clocks {
120 #address-cells = <1>;
121 #size-cells = <0>;
122 };
123
124 prcm_clockdomains: clockdomains {
125 };
126 };
127
128 scm: scm@210000 {
129 compatible = "ti,am3-scm", "simple-bus";
130 reg = <0x210000 0x2000>;
131 #address-cells = <1>;
132 #size-cells = <1>;
133 ranges = <0 0x210000 0x2000>;
134
135 am33xx_pinmux: pinmux@800 {
136 compatible = "pinctrl-single";
137 reg = <0x800 0x238>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 pinctrl-single,register-width = <32>;
141 pinctrl-single,function-mask = <0x7f>;
142 };
143
144 scm_conf: scm_conf@0 {
145 compatible = "syscon";
146 reg = <0x0 0x800>;
147 #address-cells = <1>;
148 #size-cells = <1>;
149
150 scm_clocks: clocks {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 };
154 };
155
156 wkup_m3_ipc: wkup_m3_ipc@1324 {
157 compatible = "ti,am3352-wkup-m3-ipc";
158 reg = <0x1324 0x24>;
159 interrupts = <78>;
160 ti,rproc = <&wkup_m3>;
161 mboxes = <&mailbox &mbox_wkupm3>;
162 };
163
164 edma_xbar: dma-router@f90 {
165 compatible = "ti,am335x-edma-crossbar";
166 reg = <0xf90 0x40>;
167 #dma-cells = <3>;
168 dma-requests = <32>;
169 dma-masters = <&edma>;
170 };
171
172 scm_clockdomains: clockdomains {
173 };
174 };
175 };
176
177 intc: interrupt-controller@48200000 {
178 compatible = "ti,am33xx-intc";
179 interrupt-controller;
180 #interrupt-cells = <1>;
181 reg = <0x48200000 0x1000>;
182 };
183
184 edma: edma@49000000 {
185 compatible = "ti,edma3-tpcc";
186 ti,hwmods = "tpcc";
187 reg = <0x49000000 0x10000>;
188 reg-names = "edma3_cc";
189 interrupts = <12 13 14>;
190 interrupt-names = "edma3_ccint", "emda3_mperr",
191 "edma3_ccerrint";
192 dma-requests = <64>;
193 #dma-cells = <2>;
194
195 ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
196 <&edma_tptc2 0>;
197
198 ti,edma-memcpy-channels = <20 21>;
199 };
200
201 edma_tptc0: tptc@49800000 {
202 compatible = "ti,edma3-tptc";
203 ti,hwmods = "tptc0";
204 reg = <0x49800000 0x100000>;
205 interrupts = <112>;
206 interrupt-names = "edma3_tcerrint";
207 };
208
209 edma_tptc1: tptc@49900000 {
210 compatible = "ti,edma3-tptc";
211 ti,hwmods = "tptc1";
212 reg = <0x49900000 0x100000>;
213 interrupts = <113>;
214 interrupt-names = "edma3_tcerrint";
215 };
216
217 edma_tptc2: tptc@49a00000 {
218 compatible = "ti,edma3-tptc";
219 ti,hwmods = "tptc2";
220 reg = <0x49a00000 0x100000>;
221 interrupts = <114>;
222 interrupt-names = "edma3_tcerrint";
223 };
224
225 gpio0: gpio@44e07000 {
226 compatible = "ti,omap4-gpio";
227 ti,hwmods = "gpio1";
228 gpio-controller;
229 #gpio-cells = <2>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
232 reg = <0x44e07000 0x1000>;
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262 #gpio-cells = <2>;
263 interrupt-controller;
264 #interrupt-cells = <2>;
265 reg = <0x481ae000 0x1000>;
266 interrupts = <62>;
267 };
268
269 uart0: serial@44e09000 {
270 compatible = "ti,am3352-uart", "ti,omap3-uart";
271 ti,hwmods = "uart1";
272 clock-frequency = <48000000>;
273 reg = <0x44e09000 0x2000>;
274 interrupts = <72>;
275 status = "disabled";
276 dmas = <&edma 26 0>, <&edma 27 0>;
277 dma-names = "tx", "rx";
278 };
279
280 uart1: serial@48022000 {
281 compatible = "ti,am3352-uart", "ti,omap3-uart";
282 ti,hwmods = "uart2";
283 clock-frequency = <48000000>;
284 reg = <0x48022000 0x2000>;
285 interrupts = <73>;
286 status = "disabled";
287 dmas = <&edma 28 0>, <&edma 29 0>;
288 dma-names = "tx", "rx";
289 };
290
291 uart2: serial@48024000 {
292 compatible = "ti,am3352-uart", "ti,omap3-uart";
293 ti,hwmods = "uart3";
294 clock-frequency = <48000000>;
295 reg = <0x48024000 0x2000>;
296 interrupts = <74>;
297 status = "disabled";
298 dmas = <&edma 30 0>, <&edma 31 0>;
299 dma-names = "tx", "rx";
300 };
301
302 uart3: serial@481a6000 {
303 compatible = "ti,am3352-uart", "ti,omap3-uart";
304 ti,hwmods = "uart4";
305 clock-frequency = <48000000>;
306 reg = <0x481a6000 0x2000>;
307 interrupts = <44>;
308 status = "disabled";
309 };
310
311 uart4: serial@481a8000 {
312 compatible = "ti,am3352-uart", "ti,omap3-uart";
313 ti,hwmods = "uart5";
314 clock-frequency = <48000000>;
315 reg = <0x481a8000 0x2000>;
316 interrupts = <45>;
317 status = "disabled";
318 };
319
320 uart5: serial@481aa000 {
321 compatible = "ti,am3352-uart", "ti,omap3-uart";
322 ti,hwmods = "uart6";
323 clock-frequency = <48000000>;
324 reg = <0x481aa000 0x2000>;
325 interrupts = <46>;
326 status = "disabled";
327 };
328
329 i2c0: i2c@44e0b000 {
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357 };
358
359 mmc1: mmc@48060000 {
360 compatible = "ti,omap4-hsmmc";
361 ti,hwmods = "mmc1";
362 ti,dual-volt;
363 ti,needs-special-reset;
364 ti,needs-special-hs-handling;
365 dmas = <&edma_xbar 24 0 0
366 &edma_xbar 25 0 0>;
367 dma-names = "tx", "rx";
368 interrupts = <64>;
369 interrupt-parent = <&intc>;
370 reg = <0x48060000 0x1000>;
371 status = "disabled";
372 };
373
374 mmc2: mmc@481d8000 {
375 compatible = "ti,omap4-hsmmc";
376 ti,hwmods = "mmc2";
377 ti,needs-special-reset;
378 dmas = <&edma 2 0
379 &edma 3 0>;
380 dma-names = "tx", "rx";
381 interrupts = <28>;
382 interrupt-parent = <&intc>;
383 reg = <0x481d8000 0x1000>;
384 status = "disabled";
385 };
386
387 mmc3: mmc@47810000 {
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409 };
410
411 dcan0: can@481cc000 {
412 compatible = "ti,am3352-d_can";
413 ti,hwmods = "d_can0";
414 reg = <0x481cc000 0x2000>;
415 clocks = <&dcan0_fck>;
416 clock-names = "fck";
417 syscon-raminit = <&scm_conf 0x644 0>;
418 interrupts = <52>;
419 status = "disabled";
420 };
421
422 dcan1: can@481d0000 {
423 compatible = "ti,am3352-d_can";
424 ti,hwmods = "d_can1";
425 reg = <0x481d0000 0x2000>;
426 clocks = <&dcan1_fck>;
427 clock-names = "fck";
428 syscon-raminit = <&scm_conf 0x644 1>;
429 interrupts = <55>;
430 status = "disabled";
431 };
432
433 mailbox: mailbox@480C8000 {
434 compatible = "ti,omap4-mailbox";
435 reg = <0x480C8000 0x200>;
436 interrupts = <77>;
--- 72 unchanged lines hidden (view full) ---
509 spi0: spi@48030000 {
510 compatible = "ti,omap4-mcspi";
511 #address-cells = <1>;
512 #size-cells = <0>;
513 reg = <0x48030000 0x400>;
514 interrupts = <65>;
515 ti,spi-num-cs = <2>;
516 ti,hwmods = "spi0";
517 dmas = <&edma 16 0
518 &edma 17 0
519 &edma 18 0
520 &edma 19 0>;
521 dma-names = "tx0", "rx0", "tx1", "rx1";
522 status = "disabled";
523 };
524
525 spi1: spi@481a0000 {
526 compatible = "ti,omap4-mcspi";
527 #address-cells = <1>;
528 #size-cells = <0>;
529 reg = <0x481a0000 0x400>;
530 interrupts = <125>;
531 ti,spi-num-cs = <2>;
532 ti,hwmods = "spi1";
533 dmas = <&edma 42 0
534 &edma 43 0
535 &edma 44 0
536 &edma 45 0>;
537 dma-names = "tx0", "rx0", "tx1", "rx1";
538 status = "disabled";
539 };
540
541 usb: usb@47400000 {
542 compatible = "ti,am33xx-usb";
543 reg = <0x47400000 0x1000>;
544 ranges;
--- 207 unchanged lines hidden (view full) ---
752 #pwm-cells = <3>;
753 reg = <0x48304200 0x80>;
754 ti,hwmods = "ehrpwm2";
755 status = "disabled";
756 };
757 };
758
759 mac: ethernet@4a100000 {
760 compatible = "ti,am335x-cpsw","ti,cpsw";
761 ti,hwmods = "cpgmac0";
762 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
763 clock-names = "fck", "cpts";
764 cpdma_channels = <8>;
765 ale_entries = <1024>;
766 bd_ram_size = <0x2000>;
767 no_bd_ram = <0>;
768 rx_descs = <64>;
--- 10 unchanged lines hidden (view full) ---
779 /*
780 * c0_rx_thresh_pend
781 * c0_rx_pend
782 * c0_tx_pend
783 * c0_misc_pend
784 */
785 interrupts = <40 41 42 43>;
786 ranges;
787 syscon = <&scm_conf>;
788 status = "disabled";
789
790 davinci_mdio: mdio@4a101000 {
791 compatible = "ti,davinci_mdio";
792 #address-cells = <1>;
793 #size-cells = <0>;
794 ti,hwmods = "davinci_mdio";
795 bus_freq = <1000000>;
--- 18 unchanged lines hidden (view full) ---
814 };
815 };
816
817 ocmcram: ocmcram@40300000 {
818 compatible = "mmio-sram";
819 reg = <0x40300000 0x10000>; /* 64k */
820 };
821
822 elm: elm@48080000 {
823 compatible = "ti,am3352-elm";
824 reg = <0x48080000 0x2000>;
825 interrupts = <4>;
826 ti,hwmods = "elm";
827 status = "disabled";
828 };
829
--- 24 unchanged lines hidden (view full) ---
854 };
855
856 gpmc: gpmc@50000000 {
857 compatible = "ti,am3352-gpmc";
858 ti,hwmods = "gpmc";
859 ti,no-idle-on-init;
860 reg = <0x50000000 0x2000>;
861 interrupts = <100>;
862 dmas = <&edma 52>;
863 dma-names = "rxtx";
864 gpmc,num-cs = <7>;
865 gpmc,num-waitpins = <2>;
866 #address-cells = <2>;
867 #size-cells = <1>;
868 status = "disabled";
869 };
870
871 sham: sham@53100000 {
872 compatible = "ti,omap4-sham";
873 ti,hwmods = "sham";
874 reg = <0x53100000 0x200>;
875 interrupts = <109>;
876 dmas = <&edma 36 0>;
877 dma-names = "rx";
878 };
879
880 aes: aes@53500000 {
881 compatible = "ti,omap4-aes";
882 ti,hwmods = "aes";
883 reg = <0x53500000 0xa0>;
884 interrupts = <103>;
885 dmas = <&edma 6 0>,
886 <&edma 5 0>;
887 dma-names = "tx", "rx";
888 };
889
890 mcasp0: mcasp@48038000 {
891 compatible = "ti,am33xx-mcasp-audio";
892 ti,hwmods = "mcasp0";
893 reg = <0x48038000 0x2000>,
894 <0x46000000 0x400000>;
895 reg-names = "mpu", "dat";
896 interrupts = <80>, <81>;
897 interrupt-names = "tx", "rx";
898 status = "disabled";
899 dmas = <&edma 8 2>,
900 <&edma 9 2>;
901 dma-names = "tx", "rx";
902 };
903
904 mcasp1: mcasp@4803C000 {
905 compatible = "ti,am33xx-mcasp-audio";
906 ti,hwmods = "mcasp1";
907 reg = <0x4803C000 0x2000>,
908 <0x46400000 0x400000>;
909 reg-names = "mpu", "dat";
910 interrupts = <82>, <83>;
911 interrupt-names = "tx", "rx";
912 status = "disabled";
913 dmas = <&edma 10 2>,
914 <&edma 11 2>;
915 dma-names = "tx", "rx";
916 };
917
918 rng: rng@48310000 {
919 compatible = "ti,omap4-rng";
920 ti,hwmods = "rng";
921 reg = <0x48310000 0x2000>;
922 interrupts = <111>;
923 };
924 };
925};
926
927/include/ "am33xx-clocks.dtsi"