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e1000_phy.c (219753) e1000_phy.c (228386)
1/******************************************************************************
2
1/******************************************************************************
2
3 Copyright (c) 2001-2010, Intel Corporation
3 Copyright (c) 2001-2011, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

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25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11

--- 13 unchanged lines hidden (view full) ---

25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD: head/sys/dev/e1000/e1000_phy.c 219753 2011-03-18 18:54:00Z jfv $*/
33/*$FreeBSD: head/sys/dev/e1000/e1000_phy.c 228386 2011-12-10 06:55:02Z jfv $*/
34
35#include "e1000_api.h"
36
37static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg);
38static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
34
35#include "e1000_api.h"
36
37static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg);
38static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
39 u16 *data, bool read);
39 u16 *data, bool read, bool page_set);
40static u32 e1000_get_phy_addr_for_hv_page(u32 page);
41static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
40static u32 e1000_get_phy_addr_for_hv_page(u32 page);
41static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
42 u16 *data, bool read);
42 u16 *data, bool read);
43
44/* Cable length tables */
45static const u16 e1000_m88_cable_length_table[] = {
46 0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED };
47#define M88E1000_CABLE_LENGTH_TABLE_SIZE \
43
44/* Cable length tables */
45static const u16 e1000_m88_cable_length_table[] = {
46 0, 50, 80, 110, 140, 140, E1000_CABLE_LENGTH_UNDEFINED };
47#define M88E1000_CABLE_LENGTH_TABLE_SIZE \
48 (sizeof(e1000_m88_cable_length_table) / \
49 sizeof(e1000_m88_cable_length_table[0]))
48 (sizeof(e1000_m88_cable_length_table) / \
49 sizeof(e1000_m88_cable_length_table[0]))
50
51static const u16 e1000_igp_2_cable_length_table[] = {
52 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21, 0, 0, 0, 3,
53 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41, 6, 10, 14, 18, 22,
54 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61, 21, 26, 31, 35, 40,
55 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82, 40, 45, 51, 56, 61,
56 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104, 60, 66, 72, 77, 82,
57 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121, 83, 89, 95,
58 100, 105, 109, 113, 116, 119, 122, 124, 104, 109, 114, 118, 121,
59 124};
60#define IGP02E1000_CABLE_LENGTH_TABLE_SIZE \
50
51static const u16 e1000_igp_2_cable_length_table[] = {
52 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21, 0, 0, 0, 3,
53 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41, 6, 10, 14, 18, 22,
54 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61, 21, 26, 31, 35, 40,
55 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82, 40, 45, 51, 56, 61,
56 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104, 60, 66, 72, 77, 82,
57 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121, 83, 89, 95,
58 100, 105, 109, 113, 116, 119, 122, 124, 104, 109, 114, 118, 121,
59 124};
60#define IGP02E1000_CABLE_LENGTH_TABLE_SIZE \
61 (sizeof(e1000_igp_2_cable_length_table) / \
62 sizeof(e1000_igp_2_cable_length_table[0]))
61 (sizeof(e1000_igp_2_cable_length_table) / \
62 sizeof(e1000_igp_2_cable_length_table[0]))
63
64/**
65 * e1000_init_phy_ops_generic - Initialize PHY function pointers
66 * @hw: pointer to the HW structure
67 *
68 * Setups up the function pointers to no-op functions
69 **/
70void e1000_init_phy_ops_generic(struct e1000_hw *hw)

--- 6 unchanged lines hidden (view full) ---

77 phy->ops.acquire = e1000_null_ops_generic;
78 phy->ops.check_polarity = e1000_null_ops_generic;
79 phy->ops.check_reset_block = e1000_null_ops_generic;
80 phy->ops.commit = e1000_null_ops_generic;
81 phy->ops.force_speed_duplex = e1000_null_ops_generic;
82 phy->ops.get_cfg_done = e1000_null_ops_generic;
83 phy->ops.get_cable_length = e1000_null_ops_generic;
84 phy->ops.get_info = e1000_null_ops_generic;
63
64/**
65 * e1000_init_phy_ops_generic - Initialize PHY function pointers
66 * @hw: pointer to the HW structure
67 *
68 * Setups up the function pointers to no-op functions
69 **/
70void e1000_init_phy_ops_generic(struct e1000_hw *hw)

--- 6 unchanged lines hidden (view full) ---

77 phy->ops.acquire = e1000_null_ops_generic;
78 phy->ops.check_polarity = e1000_null_ops_generic;
79 phy->ops.check_reset_block = e1000_null_ops_generic;
80 phy->ops.commit = e1000_null_ops_generic;
81 phy->ops.force_speed_duplex = e1000_null_ops_generic;
82 phy->ops.get_cfg_done = e1000_null_ops_generic;
83 phy->ops.get_cable_length = e1000_null_ops_generic;
84 phy->ops.get_info = e1000_null_ops_generic;
85 phy->ops.set_page = e1000_null_set_page;
85 phy->ops.read_reg = e1000_null_read_reg;
86 phy->ops.read_reg_locked = e1000_null_read_reg;
86 phy->ops.read_reg = e1000_null_read_reg;
87 phy->ops.read_reg_locked = e1000_null_read_reg;
88 phy->ops.read_reg_page = e1000_null_read_reg;
87 phy->ops.release = e1000_null_phy_generic;
88 phy->ops.reset = e1000_null_ops_generic;
89 phy->ops.set_d0_lplu_state = e1000_null_lplu_state;
90 phy->ops.set_d3_lplu_state = e1000_null_lplu_state;
91 phy->ops.write_reg = e1000_null_write_reg;
92 phy->ops.write_reg_locked = e1000_null_write_reg;
89 phy->ops.release = e1000_null_phy_generic;
90 phy->ops.reset = e1000_null_ops_generic;
91 phy->ops.set_d0_lplu_state = e1000_null_lplu_state;
92 phy->ops.set_d3_lplu_state = e1000_null_lplu_state;
93 phy->ops.write_reg = e1000_null_write_reg;
94 phy->ops.write_reg_locked = e1000_null_write_reg;
95 phy->ops.write_reg_page = e1000_null_write_reg;
93 phy->ops.power_up = e1000_null_phy_generic;
94 phy->ops.power_down = e1000_null_phy_generic;
96 phy->ops.power_up = e1000_null_phy_generic;
97 phy->ops.power_down = e1000_null_phy_generic;
98 phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic;
99 phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic;
95 phy->ops.cfg_on_link_up = e1000_null_ops_generic;
96}
97
98/**
100 phy->ops.cfg_on_link_up = e1000_null_ops_generic;
101}
102
103/**
104 * e1000_null_set_page - No-op function, return 0
105 * @hw: pointer to the HW structure
106 **/
107s32 e1000_null_set_page(struct e1000_hw *hw, u16 data)
108{
109 DEBUGFUNC("e1000_null_set_page");
110 return E1000_SUCCESS;
111}
112
113/**
99 * e1000_null_read_reg - No-op function, return 0
100 * @hw: pointer to the HW structure
101 **/
102s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data)
103{
104 DEBUGFUNC("e1000_null_read_reg");
105 return E1000_SUCCESS;
106}

--- 138 unchanged lines hidden (view full) ---

245 }
246
247 /*
248 * Set up Op-code, Phy Address, and register offset in the MDI
249 * Control register. The MAC will take care of interfacing with the
250 * PHY to retrieve the desired data.
251 */
252 mdic = ((offset << E1000_MDIC_REG_SHIFT) |
114 * e1000_null_read_reg - No-op function, return 0
115 * @hw: pointer to the HW structure
116 **/
117s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data)
118{
119 DEBUGFUNC("e1000_null_read_reg");
120 return E1000_SUCCESS;
121}

--- 138 unchanged lines hidden (view full) ---

260 }
261
262 /*
263 * Set up Op-code, Phy Address, and register offset in the MDI
264 * Control register. The MAC will take care of interfacing with the
265 * PHY to retrieve the desired data.
266 */
267 mdic = ((offset << E1000_MDIC_REG_SHIFT) |
253 (phy->addr << E1000_MDIC_PHY_SHIFT) |
254 (E1000_MDIC_OP_READ));
268 (phy->addr << E1000_MDIC_PHY_SHIFT) |
269 (E1000_MDIC_OP_READ));
255
256 E1000_WRITE_REG(hw, E1000_MDIC, mdic);
257
258 /*
259 * Poll the ready bit to see if the MDI read completed
260 * Increasing the time out as testing showed failures with
261 * the lower time out
262 */

--- 48 unchanged lines hidden (view full) ---

311 }
312
313 /*
314 * Set up Op-code, Phy Address, and register offset in the MDI
315 * Control register. The MAC will take care of interfacing with the
316 * PHY to retrieve the desired data.
317 */
318 mdic = (((u32)data) |
270
271 E1000_WRITE_REG(hw, E1000_MDIC, mdic);
272
273 /*
274 * Poll the ready bit to see if the MDI read completed
275 * Increasing the time out as testing showed failures with
276 * the lower time out
277 */

--- 48 unchanged lines hidden (view full) ---

326 }
327
328 /*
329 * Set up Op-code, Phy Address, and register offset in the MDI
330 * Control register. The MAC will take care of interfacing with the
331 * PHY to retrieve the desired data.
332 */
333 mdic = (((u32)data) |
319 (offset << E1000_MDIC_REG_SHIFT) |
320 (phy->addr << E1000_MDIC_PHY_SHIFT) |
321 (E1000_MDIC_OP_WRITE));
334 (offset << E1000_MDIC_REG_SHIFT) |
335 (phy->addr << E1000_MDIC_PHY_SHIFT) |
336 (E1000_MDIC_OP_WRITE));
322
323 E1000_WRITE_REG(hw, E1000_MDIC, mdic);
324
325 /*
326 * Poll the ready bit to see if the MDI read completed
327 * Increasing the time out as testing showed failures with
328 * the lower time out
329 */

--- 42 unchanged lines hidden (view full) ---

372 DEBUGFUNC("e1000_read_phy_reg_i2c");
373
374 /*
375 * Set up Op-code, Phy Address, and register address in the I2CCMD
376 * register. The MAC will take care of interfacing with the
377 * PHY to retrieve the desired data.
378 */
379 i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
337
338 E1000_WRITE_REG(hw, E1000_MDIC, mdic);
339
340 /*
341 * Poll the ready bit to see if the MDI read completed
342 * Increasing the time out as testing showed failures with
343 * the lower time out
344 */

--- 42 unchanged lines hidden (view full) ---

387 DEBUGFUNC("e1000_read_phy_reg_i2c");
388
389 /*
390 * Set up Op-code, Phy Address, and register address in the I2CCMD
391 * register. The MAC will take care of interfacing with the
392 * PHY to retrieve the desired data.
393 */
394 i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
380 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
381 (E1000_I2CCMD_OPCODE_READ));
395 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
396 (E1000_I2CCMD_OPCODE_READ));
382
383 E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
384
385 /* Poll the ready bit to see if the I2C read completed */
386 for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
387 usec_delay(50);
388 i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);
389 if (i2ccmd & E1000_I2CCMD_READY)

--- 25 unchanged lines hidden (view full) ---

415s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)
416{
417 struct e1000_phy_info *phy = &hw->phy;
418 u32 i, i2ccmd = 0;
419 u16 phy_data_swapped;
420
421 DEBUGFUNC("e1000_write_phy_reg_i2c");
422
397
398 E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
399
400 /* Poll the ready bit to see if the I2C read completed */
401 for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
402 usec_delay(50);
403 i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);
404 if (i2ccmd & E1000_I2CCMD_READY)

--- 25 unchanged lines hidden (view full) ---

430s32 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data)
431{
432 struct e1000_phy_info *phy = &hw->phy;
433 u32 i, i2ccmd = 0;
434 u16 phy_data_swapped;
435
436 DEBUGFUNC("e1000_write_phy_reg_i2c");
437
438 /* Prevent overwritting SFP I2C EEPROM which is at A0 address.*/
439 if ((hw->phy.addr == 0) || (hw->phy.addr > 7)) {
440 DEBUGOUT1("PHY I2C Address %d is out of range.\n",
441 hw->phy.addr);
442 return -E1000_ERR_CONFIG;
443 }
444
423 /* Swap the data bytes for the I2C interface */
424 phy_data_swapped = ((data >> 8) & 0x00FF) | ((data << 8) & 0xFF00);
425
426 /*
427 * Set up Op-code, Phy Address, and register address in the I2CCMD
428 * register. The MAC will take care of interfacing with the
429 * PHY to retrieve the desired data.
430 */
431 i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
445 /* Swap the data bytes for the I2C interface */
446 phy_data_swapped = ((data >> 8) & 0x00FF) | ((data << 8) & 0xFF00);
447
448 /*
449 * Set up Op-code, Phy Address, and register address in the I2CCMD
450 * register. The MAC will take care of interfacing with the
451 * PHY to retrieve the desired data.
452 */
453 i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
432 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
433 E1000_I2CCMD_OPCODE_WRITE |
434 phy_data_swapped);
454 (phy->addr << E1000_I2CCMD_PHY_ADDR_SHIFT) |
455 E1000_I2CCMD_OPCODE_WRITE |
456 phy_data_swapped);
435
436 E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
437
438 /* Poll the ready bit to see if the I2C read completed */
439 for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
440 usec_delay(50);
441 i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);
442 if (i2ccmd & E1000_I2CCMD_READY)

--- 7 unchanged lines hidden (view full) ---

450 DEBUGOUT("I2CCMD Error bit set\n");
451 return -E1000_ERR_PHY;
452 }
453
454 return E1000_SUCCESS;
455}
456
457/**
457
458 E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
459
460 /* Poll the ready bit to see if the I2C read completed */
461 for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
462 usec_delay(50);
463 i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);
464 if (i2ccmd & E1000_I2CCMD_READY)

--- 7 unchanged lines hidden (view full) ---

472 DEBUGOUT("I2CCMD Error bit set\n");
473 return -E1000_ERR_PHY;
474 }
475
476 return E1000_SUCCESS;
477}
478
479/**
480 * e1000_read_sfp_data_byte - Reads SFP module data.
481 * @hw: pointer to the HW structure
482 * @offset: byte location offset to be read
483 * @data: read data buffer pointer
484 *
485 * Reads one byte from SFP module data stored
486 * in SFP resided EEPROM memory or SFP diagnostic area.
487 * Function should be called with
488 * E1000_I2CCMD_SFP_DATA_ADDR(<byte offset>) for SFP module database access
489 * E1000_I2CCMD_SFP_DIAG_ADDR(<byte offset>) for SFP diagnostics parameters
490 * access
491 **/
492s32 e1000_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data)
493{
494 u32 i = 0;
495 u32 i2ccmd = 0;
496 u32 data_local = 0;
497
498 DEBUGFUNC("e1000_read_sfp_data_byte");
499
500 if (offset > E1000_I2CCMD_SFP_DIAG_ADDR(255)) {
501 DEBUGOUT("I2CCMD command address exceeds upper limit\n");
502 return -E1000_ERR_PHY;
503 }
504
505 /*
506 * Set up Op-code, EEPROM Address,in the I2CCMD
507 * register. The MAC will take care of interfacing with the
508 * EEPROM to retrieve the desired data.
509 */
510 i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
511 E1000_I2CCMD_OPCODE_READ);
512
513 E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
514
515 /* Poll the ready bit to see if the I2C read completed */
516 for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
517 usec_delay(50);
518 data_local = E1000_READ_REG(hw, E1000_I2CCMD);
519 if (data_local & E1000_I2CCMD_READY)
520 break;
521 }
522 if (!(data_local & E1000_I2CCMD_READY)) {
523 DEBUGOUT("I2CCMD Read did not complete\n");
524 return -E1000_ERR_PHY;
525 }
526 if (data_local & E1000_I2CCMD_ERROR) {
527 DEBUGOUT("I2CCMD Error bit set\n");
528 return -E1000_ERR_PHY;
529 }
530 *data = (u8) data_local & 0xFF;
531
532 return E1000_SUCCESS;
533}
534
535/**
536 * e1000_write_sfp_data_byte - Writes SFP module data.
537 * @hw: pointer to the HW structure
538 * @offset: byte location offset to write to
539 * @data: data to write
540 *
541 * Writes one byte to SFP module data stored
542 * in SFP resided EEPROM memory or SFP diagnostic area.
543 * Function should be called with
544 * E1000_I2CCMD_SFP_DATA_ADDR(<byte offset>) for SFP module database access
545 * E1000_I2CCMD_SFP_DIAG_ADDR(<byte offset>) for SFP diagnostics parameters
546 * access
547 **/
548s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data)
549{
550 u32 i = 0;
551 u32 i2ccmd = 0;
552 u32 data_local = 0;
553
554 DEBUGFUNC("e1000_write_sfp_data_byte");
555
556 if (offset > E1000_I2CCMD_SFP_DIAG_ADDR(255)) {
557 DEBUGOUT("I2CCMD command address exceeds upper limit\n");
558 return -E1000_ERR_PHY;
559 }
560 /*
561 * The programming interface is 16 bits wide
562 * so we need to read the whole word first
563 * then update appropriate byte lane and write
564 * the updated word back.
565 */
566 /*
567 * Set up Op-code, EEPROM Address,in the I2CCMD
568 * register. The MAC will take care of interfacing
569 * with an EEPROM to write the data given.
570 */
571 i2ccmd = ((offset << E1000_I2CCMD_REG_ADDR_SHIFT) |
572 E1000_I2CCMD_OPCODE_READ);
573 /* Set a command to read single word */
574 E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
575 for (i = 0; i < E1000_I2CCMD_PHY_TIMEOUT; i++) {
576 usec_delay(50);
577 /*
578 * Poll the ready bit to see if lastly
579 * launched I2C operation completed
580 */
581 i2ccmd = E1000_READ_REG(hw, E1000_I2CCMD);
582 if (i2ccmd & E1000_I2CCMD_READY) {
583 /* Check if this is READ or WRITE phase */
584 if ((i2ccmd & E1000_I2CCMD_OPCODE_READ) ==
585 E1000_I2CCMD_OPCODE_READ) {
586 /*
587 * Write the selected byte
588 * lane and update whole word
589 */
590 data_local = i2ccmd & 0xFF00;
591 data_local |= data;
592 i2ccmd = ((offset <<
593 E1000_I2CCMD_REG_ADDR_SHIFT) |
594 E1000_I2CCMD_OPCODE_WRITE | data_local);
595 E1000_WRITE_REG(hw, E1000_I2CCMD, i2ccmd);
596 } else {
597 break;
598 }
599 }
600 }
601 if (!(i2ccmd & E1000_I2CCMD_READY)) {
602 DEBUGOUT("I2CCMD Write did not complete\n");
603 return -E1000_ERR_PHY;
604 }
605 if (i2ccmd & E1000_I2CCMD_ERROR) {
606 DEBUGOUT("I2CCMD Error bit set\n");
607 return -E1000_ERR_PHY;
608 }
609 return E1000_SUCCESS;
610}
611
612/**
458 * e1000_read_phy_reg_m88 - Read m88 PHY register
459 * @hw: pointer to the HW structure
460 * @offset: register offset to be read
461 * @data: pointer to the read data
462 *
463 * Acquires semaphore, if necessary, then reads the PHY register at offset
464 * and storing the retrieved information in data. Release any acquired
465 * semaphores before exiting.

--- 7 unchanged lines hidden (view full) ---

473 if (!(hw->phy.ops.acquire))
474 goto out;
475
476 ret_val = hw->phy.ops.acquire(hw);
477 if (ret_val)
478 goto out;
479
480 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
613 * e1000_read_phy_reg_m88 - Read m88 PHY register
614 * @hw: pointer to the HW structure
615 * @offset: register offset to be read
616 * @data: pointer to the read data
617 *
618 * Acquires semaphore, if necessary, then reads the PHY register at offset
619 * and storing the retrieved information in data. Release any acquired
620 * semaphores before exiting.

--- 7 unchanged lines hidden (view full) ---

628 if (!(hw->phy.ops.acquire))
629 goto out;
630
631 ret_val = hw->phy.ops.acquire(hw);
632 if (ret_val)
633 goto out;
634
635 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
481 data);
636 data);
482
483 hw->phy.ops.release(hw);
484
485out:
486 return ret_val;
487}
488
489/**

--- 14 unchanged lines hidden (view full) ---

504 if (!(hw->phy.ops.acquire))
505 goto out;
506
507 ret_val = hw->phy.ops.acquire(hw);
508 if (ret_val)
509 goto out;
510
511 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
637
638 hw->phy.ops.release(hw);
639
640out:
641 return ret_val;
642}
643
644/**

--- 14 unchanged lines hidden (view full) ---

659 if (!(hw->phy.ops.acquire))
660 goto out;
661
662 ret_val = hw->phy.ops.acquire(hw);
663 if (ret_val)
664 goto out;
665
666 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
512 data);
667 data);
513
514 hw->phy.ops.release(hw);
515
516out:
517 return ret_val;
518}
519
520/**
668
669 hw->phy.ops.release(hw);
670
671out:
672 return ret_val;
673}
674
675/**
676 * e1000_set_page_igp - Set page as on IGP-like PHY(s)
677 * @hw: pointer to the HW structure
678 * @page: page to set (shifted left when necessary)
679 *
680 * Sets PHY page required for PHY register access. Assumes semaphore is
681 * already acquired. Note, this function sets phy.addr to 1 so the caller
682 * must set it appropriately (if necessary) after this function returns.
683 **/
684s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page)
685{
686 DEBUGFUNC("e1000_set_page_igp");
687
688 DEBUGOUT1("Setting page 0x%x\n", page);
689
690 hw->phy.addr = 1;
691
692 return e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, page);
693}
694
695/**
521 * __e1000_read_phy_reg_igp - Read igp PHY register
522 * @hw: pointer to the HW structure
523 * @offset: register offset to be read
524 * @data: pointer to the read data
525 * @locked: semaphore has already been acquired or not
526 *
527 * Acquires semaphore, if necessary, then reads the PHY register at offset
528 * and stores the retrieved information in data. Release any acquired
529 * semaphores before exiting.
530 **/
531static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,
696 * __e1000_read_phy_reg_igp - Read igp PHY register
697 * @hw: pointer to the HW structure
698 * @offset: register offset to be read
699 * @data: pointer to the read data
700 * @locked: semaphore has already been acquired or not
701 *
702 * Acquires semaphore, if necessary, then reads the PHY register at offset
703 * and stores the retrieved information in data. Release any acquired
704 * semaphores before exiting.
705 **/
706static s32 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,
532 bool locked)
707 bool locked)
533{
534 s32 ret_val = E1000_SUCCESS;
535
536 DEBUGFUNC("__e1000_read_phy_reg_igp");
537
538 if (!locked) {
539 if (!(hw->phy.ops.acquire))
540 goto out;
541
542 ret_val = hw->phy.ops.acquire(hw);
543 if (ret_val)
544 goto out;
545 }
546
547 if (offset > MAX_PHY_MULTI_PAGE_REG) {
548 ret_val = e1000_write_phy_reg_mdic(hw,
708{
709 s32 ret_val = E1000_SUCCESS;
710
711 DEBUGFUNC("__e1000_read_phy_reg_igp");
712
713 if (!locked) {
714 if (!(hw->phy.ops.acquire))
715 goto out;
716
717 ret_val = hw->phy.ops.acquire(hw);
718 if (ret_val)
719 goto out;
720 }
721
722 if (offset > MAX_PHY_MULTI_PAGE_REG) {
723 ret_val = e1000_write_phy_reg_mdic(hw,
549 IGP01E1000_PHY_PAGE_SELECT,
550 (u16)offset);
724 IGP01E1000_PHY_PAGE_SELECT,
725 (u16)offset);
551 if (ret_val)
552 goto release;
553 }
554
555 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
726 if (ret_val)
727 goto release;
728 }
729
730 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
556 data);
731 data);
557
558release:
559 if (!locked)
560 hw->phy.ops.release(hw);
561out:
562 return ret_val;
563}
564

--- 32 unchanged lines hidden (view full) ---

597 * @offset: register offset to write to
598 * @data: data to write at register offset
599 * @locked: semaphore has already been acquired or not
600 *
601 * Acquires semaphore, if necessary, then writes the data to PHY register
602 * at the offset. Release any acquired semaphores before exiting.
603 **/
604static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,
732
733release:
734 if (!locked)
735 hw->phy.ops.release(hw);
736out:
737 return ret_val;
738}
739

--- 32 unchanged lines hidden (view full) ---

772 * @offset: register offset to write to
773 * @data: data to write at register offset
774 * @locked: semaphore has already been acquired or not
775 *
776 * Acquires semaphore, if necessary, then writes the data to PHY register
777 * at the offset. Release any acquired semaphores before exiting.
778 **/
779static s32 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,
605 bool locked)
780 bool locked)
606{
607 s32 ret_val = E1000_SUCCESS;
608
609 DEBUGFUNC("e1000_write_phy_reg_igp");
610
611 if (!locked) {
612 if (!(hw->phy.ops.acquire))
613 goto out;
614
615 ret_val = hw->phy.ops.acquire(hw);
616 if (ret_val)
617 goto out;
618 }
619
620 if (offset > MAX_PHY_MULTI_PAGE_REG) {
621 ret_val = e1000_write_phy_reg_mdic(hw,
781{
782 s32 ret_val = E1000_SUCCESS;
783
784 DEBUGFUNC("e1000_write_phy_reg_igp");
785
786 if (!locked) {
787 if (!(hw->phy.ops.acquire))
788 goto out;
789
790 ret_val = hw->phy.ops.acquire(hw);
791 if (ret_val)
792 goto out;
793 }
794
795 if (offset > MAX_PHY_MULTI_PAGE_REG) {
796 ret_val = e1000_write_phy_reg_mdic(hw,
622 IGP01E1000_PHY_PAGE_SELECT,
623 (u16)offset);
797 IGP01E1000_PHY_PAGE_SELECT,
798 (u16)offset);
624 if (ret_val)
625 goto release;
626 }
627
628 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
799 if (ret_val)
800 goto release;
801 }
802
803 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
629 data);
804 data);
630
631release:
632 if (!locked)
633 hw->phy.ops.release(hw);
634
635out:
636 return ret_val;
637}

--- 33 unchanged lines hidden (view full) ---

671 * @data: pointer to the read data
672 * @locked: semaphore has already been acquired or not
673 *
674 * Acquires semaphore, if necessary. Then reads the PHY register at offset
675 * using the kumeran interface. The information retrieved is stored in data.
676 * Release any acquired semaphores before exiting.
677 **/
678static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
805
806release:
807 if (!locked)
808 hw->phy.ops.release(hw);
809
810out:
811 return ret_val;
812}

--- 33 unchanged lines hidden (view full) ---

846 * @data: pointer to the read data
847 * @locked: semaphore has already been acquired or not
848 *
849 * Acquires semaphore, if necessary. Then reads the PHY register at offset
850 * using the kumeran interface. The information retrieved is stored in data.
851 * Release any acquired semaphores before exiting.
852 **/
853static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
679 bool locked)
854 bool locked)
680{
681 u32 kmrnctrlsta;
682 s32 ret_val = E1000_SUCCESS;
683
684 DEBUGFUNC("__e1000_read_kmrn_reg");
685
686 if (!locked) {
687 if (!(hw->phy.ops.acquire))
688 goto out;
689
690 ret_val = hw->phy.ops.acquire(hw);
691 if (ret_val)
692 goto out;
693 }
694
695 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
855{
856 u32 kmrnctrlsta;
857 s32 ret_val = E1000_SUCCESS;
858
859 DEBUGFUNC("__e1000_read_kmrn_reg");
860
861 if (!locked) {
862 if (!(hw->phy.ops.acquire))
863 goto out;
864
865 ret_val = hw->phy.ops.acquire(hw);
866 if (ret_val)
867 goto out;
868 }
869
870 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
696 E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
871 E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
697 E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
872 E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
873 E1000_WRITE_FLUSH(hw);
698
699 usec_delay(2);
700
701 kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);
702 *data = (u16)kmrnctrlsta;
703
704 if (!locked)
705 hw->phy.ops.release(hw);

--- 39 unchanged lines hidden (view full) ---

745 * @data: data to write at register offset
746 * @locked: semaphore has already been acquired or not
747 *
748 * Acquires semaphore, if necessary. Then write the data to PHY register
749 * at the offset using the kumeran interface. Release any acquired semaphores
750 * before exiting.
751 **/
752static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
874
875 usec_delay(2);
876
877 kmrnctrlsta = E1000_READ_REG(hw, E1000_KMRNCTRLSTA);
878 *data = (u16)kmrnctrlsta;
879
880 if (!locked)
881 hw->phy.ops.release(hw);

--- 39 unchanged lines hidden (view full) ---

921 * @data: data to write at register offset
922 * @locked: semaphore has already been acquired or not
923 *
924 * Acquires semaphore, if necessary. Then write the data to PHY register
925 * at the offset using the kumeran interface. Release any acquired semaphores
926 * before exiting.
927 **/
928static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
753 bool locked)
929 bool locked)
754{
755 u32 kmrnctrlsta;
756 s32 ret_val = E1000_SUCCESS;
757
758 DEBUGFUNC("e1000_write_kmrn_reg_generic");
759
760 if (!locked) {
761 if (!(hw->phy.ops.acquire))
762 goto out;
763
764 ret_val = hw->phy.ops.acquire(hw);
765 if (ret_val)
766 goto out;
767 }
768
769 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
930{
931 u32 kmrnctrlsta;
932 s32 ret_val = E1000_SUCCESS;
933
934 DEBUGFUNC("e1000_write_kmrn_reg_generic");
935
936 if (!locked) {
937 if (!(hw->phy.ops.acquire))
938 goto out;
939
940 ret_val = hw->phy.ops.acquire(hw);
941 if (ret_val)
942 goto out;
943 }
944
945 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
770 E1000_KMRNCTRLSTA_OFFSET) | data;
946 E1000_KMRNCTRLSTA_OFFSET) | data;
771 E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
947 E1000_WRITE_REG(hw, E1000_KMRNCTRLSTA, kmrnctrlsta);
948 E1000_WRITE_FLUSH(hw);
772
773 usec_delay(2);
774
775 if (!locked)
776 hw->phy.ops.release(hw);
777
778out:
779 return ret_val;

--- 35 unchanged lines hidden (view full) ---

815 **/
816s32 e1000_copper_link_setup_82577(struct e1000_hw *hw)
817{
818 s32 ret_val;
819 u16 phy_data;
820
821 DEBUGFUNC("e1000_copper_link_setup_82577");
822
949
950 usec_delay(2);
951
952 if (!locked)
953 hw->phy.ops.release(hw);
954
955out:
956 return ret_val;

--- 35 unchanged lines hidden (view full) ---

992 **/
993s32 e1000_copper_link_setup_82577(struct e1000_hw *hw)
994{
995 s32 ret_val;
996 u16 phy_data;
997
998 DEBUGFUNC("e1000_copper_link_setup_82577");
999
823 if (hw->phy.reset_disable) {
824 ret_val = E1000_SUCCESS;
825 goto out;
826 }
827
828 if (hw->phy.type == e1000_phy_82580) {
829 ret_val = hw->phy.ops.reset(hw);
830 if (ret_val) {
831 DEBUGOUT("Error resetting the PHY.\n");
832 goto out;
833 }
834 }
835
836 /* Enable CRS on Tx. This must be set for half-duplex operation. */
837 ret_val = hw->phy.ops.read_reg(hw, I82577_CFG_REG, &phy_data);
838 if (ret_val)
839 goto out;
840
841 phy_data |= I82577_CFG_ASSERT_CRS_ON_TX;
842
843 /* Enable downshift */
844 phy_data |= I82577_CFG_ENABLE_DOWNSHIFT;
845
846 ret_val = hw->phy.ops.write_reg(hw, I82577_CFG_REG, phy_data);
1000 if (hw->phy.type == e1000_phy_82580) {
1001 ret_val = hw->phy.ops.reset(hw);
1002 if (ret_val) {
1003 DEBUGOUT("Error resetting the PHY.\n");
1004 goto out;
1005 }
1006 }
1007
1008 /* Enable CRS on Tx. This must be set for half-duplex operation. */
1009 ret_val = hw->phy.ops.read_reg(hw, I82577_CFG_REG, &phy_data);
1010 if (ret_val)
1011 goto out;
1012
1013 phy_data |= I82577_CFG_ASSERT_CRS_ON_TX;
1014
1015 /* Enable downshift */
1016 phy_data |= I82577_CFG_ENABLE_DOWNSHIFT;
1017
1018 ret_val = hw->phy.ops.write_reg(hw, I82577_CFG_REG, phy_data);
1019 if (ret_val)
1020 goto out;
847
1021
1022 /* Resolve Master/Slave mode */
1023 ret_val = hw->phy.ops.read_reg(hw, PHY_1000T_CTRL, &phy_data);
1024 if (ret_val)
1025 goto out;
1026
1027 /* load defaults for future use */
1028 hw->phy.original_ms_type = (phy_data & CR_1000T_MS_ENABLE) ?
1029 ((phy_data & CR_1000T_MS_VALUE) ?
1030 e1000_ms_force_master :
1031 e1000_ms_force_slave) : e1000_ms_auto;
1032
1033 switch (hw->phy.ms_type) {
1034 case e1000_ms_force_master:
1035 phy_data |= (CR_1000T_MS_ENABLE | CR_1000T_MS_VALUE);
1036 break;
1037 case e1000_ms_force_slave:
1038 phy_data |= CR_1000T_MS_ENABLE;
1039 phy_data &= ~(CR_1000T_MS_VALUE);
1040 break;
1041 case e1000_ms_auto:
1042 phy_data &= ~CR_1000T_MS_ENABLE;
1043 default:
1044 break;
1045 }
1046
1047 ret_val = hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data);
1048 if (ret_val)
1049 goto out;
1050
848out:
849 return ret_val;
850}
851
852/**
853 * e1000_copper_link_setup_m88 - Setup m88 PHY's for copper link
854 * @hw: pointer to the HW structure
855 *
856 * Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock
857 * and downshift values are set also.
858 **/
859s32 e1000_copper_link_setup_m88(struct e1000_hw *hw)
860{
861 struct e1000_phy_info *phy = &hw->phy;
862 s32 ret_val;
863 u16 phy_data;
864
865 DEBUGFUNC("e1000_copper_link_setup_m88");
866
1051out:
1052 return ret_val;
1053}
1054
1055/**
1056 * e1000_copper_link_setup_m88 - Setup m88 PHY's for copper link
1057 * @hw: pointer to the HW structure
1058 *
1059 * Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock
1060 * and downshift values are set also.
1061 **/
1062s32 e1000_copper_link_setup_m88(struct e1000_hw *hw)
1063{
1064 struct e1000_phy_info *phy = &hw->phy;
1065 s32 ret_val;
1066 u16 phy_data;
1067
1068 DEBUGFUNC("e1000_copper_link_setup_m88");
1069
867 if (phy->reset_disable) {
868 ret_val = E1000_SUCCESS;
869 goto out;
870 }
871
872 /* Enable CRS on Tx. This must be set for half-duplex operation. */
873 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
874 if (ret_val)
875 goto out;
876
877 /* For BM PHY this bit is downshift enable */
878 if (phy->type != e1000_phy_bm)

--- 47 unchanged lines hidden (view full) ---

926 if ((phy->type == e1000_phy_m88) &&
927 (phy->revision < E1000_REVISION_4) &&
928 (phy->id != BME1000_E_PHY_ID_R2)) {
929 /*
930 * Force TX_CLK in the Extended PHY Specific Control Register
931 * to 25MHz clock.
932 */
933 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1070
1071 /* Enable CRS on Tx. This must be set for half-duplex operation. */
1072 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1073 if (ret_val)
1074 goto out;
1075
1076 /* For BM PHY this bit is downshift enable */
1077 if (phy->type != e1000_phy_bm)

--- 47 unchanged lines hidden (view full) ---

1125 if ((phy->type == e1000_phy_m88) &&
1126 (phy->revision < E1000_REVISION_4) &&
1127 (phy->id != BME1000_E_PHY_ID_R2)) {
1128 /*
1129 * Force TX_CLK in the Extended PHY Specific Control Register
1130 * to 25MHz clock.
1131 */
1132 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
934 &phy_data);
1133 &phy_data);
935 if (ret_val)
936 goto out;
937
938 phy_data |= M88E1000_EPSCR_TX_CLK_25;
939
940 if ((phy->revision == E1000_REVISION_2) &&
941 (phy->id == M88E1111_I_PHY_ID)) {
942 /* 82573L PHY - set the downshift counter to 5x. */
943 phy_data &= ~M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK;
944 phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X;
945 } else {
946 /* Configure Master and Slave downshift values */
947 phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
1134 if (ret_val)
1135 goto out;
1136
1137 phy_data |= M88E1000_EPSCR_TX_CLK_25;
1138
1139 if ((phy->revision == E1000_REVISION_2) &&
1140 (phy->id == M88E1111_I_PHY_ID)) {
1141 /* 82573L PHY - set the downshift counter to 5x. */
1142 phy_data &= ~M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK;
1143 phy_data |= M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X;
1144 } else {
1145 /* Configure Master and Slave downshift values */
1146 phy_data &= ~(M88E1000_EPSCR_MASTER_DOWNSHIFT_MASK |
948 M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
1147 M88E1000_EPSCR_SLAVE_DOWNSHIFT_MASK);
949 phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
1148 phy_data |= (M88E1000_EPSCR_MASTER_DOWNSHIFT_1X |
950 M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
1149 M88E1000_EPSCR_SLAVE_DOWNSHIFT_1X);
951 }
952 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1150 }
1151 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
953 phy_data);
1152 phy_data);
954 if (ret_val)
955 goto out;
956 }
957
958 if ((phy->type == e1000_phy_bm) && (phy->id == BME1000_E_PHY_ID_R2)) {
959 /* Set PHY page 0, register 29 to 0x0003 */
960 ret_val = phy->ops.write_reg(hw, 29, 0x0003);
961 if (ret_val)

--- 9 unchanged lines hidden (view full) ---

971 ret_val = phy->ops.commit(hw);
972 if (ret_val) {
973 DEBUGOUT("Error committing the PHY changes\n");
974 goto out;
975 }
976
977 if (phy->type == e1000_phy_82578) {
978 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1153 if (ret_val)
1154 goto out;
1155 }
1156
1157 if ((phy->type == e1000_phy_bm) && (phy->id == BME1000_E_PHY_ID_R2)) {
1158 /* Set PHY page 0, register 29 to 0x0003 */
1159 ret_val = phy->ops.write_reg(hw, 29, 0x0003);
1160 if (ret_val)

--- 9 unchanged lines hidden (view full) ---

1170 ret_val = phy->ops.commit(hw);
1171 if (ret_val) {
1172 DEBUGOUT("Error committing the PHY changes\n");
1173 goto out;
1174 }
1175
1176 if (phy->type == e1000_phy_82578) {
1177 ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
979 &phy_data);
1178 &phy_data);
980 if (ret_val)
981 goto out;
982
983 /* 82578 PHY - set the downshift count to 1x. */
984 phy_data |= I82578_EPSCR_DOWNSHIFT_ENABLE;
985 phy_data &= ~I82578_EPSCR_DOWNSHIFT_COUNTER_MASK;
986 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
1179 if (ret_val)
1180 goto out;
1181
1182 /* 82578 PHY - set the downshift count to 1x. */
1183 phy_data |= I82578_EPSCR_DOWNSHIFT_ENABLE;
1184 phy_data &= ~I82578_EPSCR_DOWNSHIFT_COUNTER_MASK;
1185 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL,
987 phy_data);
1186 phy_data);
988 if (ret_val)
989 goto out;
990 }
991
992out:
993 return ret_val;
994}
995

--- 7 unchanged lines hidden (view full) ---

1003s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw)
1004{
1005 struct e1000_phy_info *phy = &hw->phy;
1006 s32 ret_val;
1007 u16 phy_data;
1008
1009 DEBUGFUNC("e1000_copper_link_setup_m88_gen2");
1010
1187 if (ret_val)
1188 goto out;
1189 }
1190
1191out:
1192 return ret_val;
1193}
1194

--- 7 unchanged lines hidden (view full) ---

1202s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw)
1203{
1204 struct e1000_phy_info *phy = &hw->phy;
1205 s32 ret_val;
1206 u16 phy_data;
1207
1208 DEBUGFUNC("e1000_copper_link_setup_m88_gen2");
1209
1011 if (phy->reset_disable) {
1012 ret_val = E1000_SUCCESS;
1013 goto out;
1014 }
1015
1016 /* Enable CRS on Tx. This must be set for half-duplex operation. */
1017 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1018 if (ret_val)
1019 goto out;
1020
1021 /*
1022 * Options:

--- 65 unchanged lines hidden (view full) ---

1088s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
1089{
1090 struct e1000_phy_info *phy = &hw->phy;
1091 s32 ret_val;
1092 u16 data;
1093
1094 DEBUGFUNC("e1000_copper_link_setup_igp");
1095
1210
1211 /* Enable CRS on Tx. This must be set for half-duplex operation. */
1212 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
1213 if (ret_val)
1214 goto out;
1215
1216 /*
1217 * Options:

--- 65 unchanged lines hidden (view full) ---

1283s32 e1000_copper_link_setup_igp(struct e1000_hw *hw)
1284{
1285 struct e1000_phy_info *phy = &hw->phy;
1286 s32 ret_val;
1287 u16 data;
1288
1289 DEBUGFUNC("e1000_copper_link_setup_igp");
1290
1096 if (phy->reset_disable) {
1097 ret_val = E1000_SUCCESS;
1098 goto out;
1099 }
1100
1101 ret_val = hw->phy.ops.reset(hw);
1102 if (ret_val) {
1103 DEBUGOUT("Error resetting the PHY.\n");
1104 goto out;
1105 }
1106
1107 /*

--- 51 unchanged lines hidden (view full) ---

1159 /*
1160 * when autonegotiation advertisement is only 1000Mbps then we
1161 * should disable SmartSpeed and enable Auto MasterSlave
1162 * resolution as hardware default.
1163 */
1164 if (phy->autoneg_advertised == ADVERTISE_1000_FULL) {
1165 /* Disable SmartSpeed */
1166 ret_val = phy->ops.read_reg(hw,
1291
1292 ret_val = hw->phy.ops.reset(hw);
1293 if (ret_val) {
1294 DEBUGOUT("Error resetting the PHY.\n");
1295 goto out;
1296 }
1297
1298 /*

--- 51 unchanged lines hidden (view full) ---

1350 /*
1351 * when autonegotiation advertisement is only 1000Mbps then we
1352 * should disable SmartSpeed and enable Auto MasterSlave
1353 * resolution as hardware default.
1354 */
1355 if (phy->autoneg_advertised == ADVERTISE_1000_FULL) {
1356 /* Disable SmartSpeed */
1357 ret_val = phy->ops.read_reg(hw,
1167 IGP01E1000_PHY_PORT_CONFIG,
1168 &data);
1358 IGP01E1000_PHY_PORT_CONFIG,
1359 &data);
1169 if (ret_val)
1170 goto out;
1171
1172 data &= ~IGP01E1000_PSCFR_SMART_SPEED;
1173 ret_val = phy->ops.write_reg(hw,
1360 if (ret_val)
1361 goto out;
1362
1363 data &= ~IGP01E1000_PSCFR_SMART_SPEED;
1364 ret_val = phy->ops.write_reg(hw,
1174 IGP01E1000_PHY_PORT_CONFIG,
1175 data);
1365 IGP01E1000_PHY_PORT_CONFIG,
1366 data);
1176 if (ret_val)
1177 goto out;
1178
1179 /* Set auto Master/Slave resolution process */
1180 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
1181 if (ret_val)
1182 goto out;
1183

--- 89 unchanged lines hidden (view full) ---

1273
1274 /*
1275 * Does the user want to wait for Auto-Neg to complete here, or
1276 * check at a later time (for example, callback routine).
1277 */
1278 if (phy->autoneg_wait_to_complete) {
1279 ret_val = hw->mac.ops.wait_autoneg(hw);
1280 if (ret_val) {
1367 if (ret_val)
1368 goto out;
1369
1370 /* Set auto Master/Slave resolution process */
1371 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL, &data);
1372 if (ret_val)
1373 goto out;
1374

--- 89 unchanged lines hidden (view full) ---

1464
1465 /*
1466 * Does the user want to wait for Auto-Neg to complete here, or
1467 * check at a later time (for example, callback routine).
1468 */
1469 if (phy->autoneg_wait_to_complete) {
1470 ret_val = hw->mac.ops.wait_autoneg(hw);
1471 if (ret_val) {
1281 DEBUGOUT("Error while waiting for "
1282 "autoneg to complete\n");
1472 DEBUGOUT("Error while waiting for autoneg to complete\n");
1283 goto out;
1284 }
1285 }
1286
1287 hw->mac.get_link_status = TRUE;
1288
1289out:
1290 return ret_val;

--- 22 unchanged lines hidden (view full) ---

1313 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
1314 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
1315 if (ret_val)
1316 goto out;
1317
1318 if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
1319 /* Read the MII 1000Base-T Control Register (Address 9). */
1320 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,
1473 goto out;
1474 }
1475 }
1476
1477 hw->mac.get_link_status = TRUE;
1478
1479out:
1480 return ret_val;

--- 22 unchanged lines hidden (view full) ---

1503 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
1504 ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
1505 if (ret_val)
1506 goto out;
1507
1508 if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
1509 /* Read the MII 1000Base-T Control Register (Address 9). */
1510 ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,
1321 &mii_1000t_ctrl_reg);
1511 &mii_1000t_ctrl_reg);
1322 if (ret_val)
1323 goto out;
1324 }
1325
1326 /*
1327 * Need to parse both autoneg_advertised and fc and set up
1328 * the appropriate PHY registers. First we will parse for
1329 * autoneg_advertised software override. Since we can advertise
1330 * a plethora of combinations, we need to check each bit
1331 * individually.
1332 */
1333
1334 /*
1335 * First we clear all the 10/100 mb speed bits in the Auto-Neg
1336 * Advertisement Register (Address 4) and the 1000 mb speed bits in
1337 * the 1000Base-T Control Register (Address 9).
1338 */
1339 mii_autoneg_adv_reg &= ~(NWAY_AR_100TX_FD_CAPS |
1512 if (ret_val)
1513 goto out;
1514 }
1515
1516 /*
1517 * Need to parse both autoneg_advertised and fc and set up
1518 * the appropriate PHY registers. First we will parse for
1519 * autoneg_advertised software override. Since we can advertise
1520 * a plethora of combinations, we need to check each bit
1521 * individually.
1522 */
1523
1524 /*
1525 * First we clear all the 10/100 mb speed bits in the Auto-Neg
1526 * Advertisement Register (Address 4) and the 1000 mb speed bits in
1527 * the 1000Base-T Control Register (Address 9).
1528 */
1529 mii_autoneg_adv_reg &= ~(NWAY_AR_100TX_FD_CAPS |
1340 NWAY_AR_100TX_HD_CAPS |
1341 NWAY_AR_10T_FD_CAPS |
1342 NWAY_AR_10T_HD_CAPS);
1530 NWAY_AR_100TX_HD_CAPS |
1531 NWAY_AR_10T_FD_CAPS |
1532 NWAY_AR_10T_HD_CAPS);
1343 mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS);
1344
1345 DEBUGOUT1("autoneg_advertised %x\n", phy->autoneg_advertised);
1346
1347 /* Do we want to advertise 10 Mb Half Duplex? */
1348 if (phy->autoneg_advertised & ADVERTISE_10_HALF) {
1349 DEBUGOUT("Advertise 10mb Half duplex\n");
1350 mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS;

--- 89 unchanged lines hidden (view full) ---

1440
1441 ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
1442 if (ret_val)
1443 goto out;
1444
1445 DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
1446
1447 if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
1533 mii_1000t_ctrl_reg &= ~(CR_1000T_HD_CAPS | CR_1000T_FD_CAPS);
1534
1535 DEBUGOUT1("autoneg_advertised %x\n", phy->autoneg_advertised);
1536
1537 /* Do we want to advertise 10 Mb Half Duplex? */
1538 if (phy->autoneg_advertised & ADVERTISE_10_HALF) {
1539 DEBUGOUT("Advertise 10mb Half duplex\n");
1540 mii_autoneg_adv_reg |= NWAY_AR_10T_HD_CAPS;

--- 89 unchanged lines hidden (view full) ---

1630
1631 ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
1632 if (ret_val)
1633 goto out;
1634
1635 DEBUGOUT1("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg);
1636
1637 if (phy->autoneg_mask & ADVERTISE_1000_FULL) {
1448 ret_val = phy->ops.write_reg(hw,
1449 PHY_1000T_CTRL,
1450 mii_1000t_ctrl_reg);
1638 ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,
1639 mii_1000t_ctrl_reg);
1451 if (ret_val)
1452 goto out;
1453 }
1454
1455out:
1456 return ret_val;
1457}
1458

--- 33 unchanged lines hidden (view full) ---

1492 goto out;
1493 }
1494 }
1495
1496 /*
1497 * Check link status. Wait up to 100 microseconds for link to become
1498 * valid.
1499 */
1640 if (ret_val)
1641 goto out;
1642 }
1643
1644out:
1645 return ret_val;
1646}
1647

--- 33 unchanged lines hidden (view full) ---

1681 goto out;
1682 }
1683 }
1684
1685 /*
1686 * Check link status. Wait up to 100 microseconds for link to become
1687 * valid.
1688 */
1500 ret_val = e1000_phy_has_link_generic(hw,
1501 COPPER_LINK_UP_LIMIT,
1502 10,
1503 &link);
1689 ret_val = e1000_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,
1690 &link);
1504 if (ret_val)
1505 goto out;
1506
1507 if (link) {
1508 DEBUGOUT("Valid link established!!!\n");
1509 e1000_config_collision_dist_generic(hw);
1510 ret_val = e1000_config_fc_after_link_up_generic(hw);
1511 } else {

--- 48 unchanged lines hidden (view full) ---

1560
1561 DEBUGOUT1("IGP PSCR: %X\n", phy_data);
1562
1563 usec_delay(1);
1564
1565 if (phy->autoneg_wait_to_complete) {
1566 DEBUGOUT("Waiting for forced speed/duplex link on IGP phy.\n");
1567
1691 if (ret_val)
1692 goto out;
1693
1694 if (link) {
1695 DEBUGOUT("Valid link established!!!\n");
1696 e1000_config_collision_dist_generic(hw);
1697 ret_val = e1000_config_fc_after_link_up_generic(hw);
1698 } else {

--- 48 unchanged lines hidden (view full) ---

1747
1748 DEBUGOUT1("IGP PSCR: %X\n", phy_data);
1749
1750 usec_delay(1);
1751
1752 if (phy->autoneg_wait_to_complete) {
1753 DEBUGOUT("Waiting for forced speed/duplex link on IGP phy.\n");
1754
1568 ret_val = e1000_phy_has_link_generic(hw,
1569 PHY_FORCE_LIMIT,
1570 100000,
1571 &link);
1755 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1756 100000, &link);
1572 if (ret_val)
1573 goto out;
1574
1575 if (!link)
1576 DEBUGOUT("Link taking longer than expected.\n");
1577
1578 /* Try once more */
1757 if (ret_val)
1758 goto out;
1759
1760 if (!link)
1761 DEBUGOUT("Link taking longer than expected.\n");
1762
1763 /* Try once more */
1579 ret_val = e1000_phy_has_link_generic(hw,
1580 PHY_FORCE_LIMIT,
1581 100000,
1582 &link);
1764 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1765 100000, &link);
1583 if (ret_val)
1584 goto out;
1585 }
1586
1587out:
1588 return ret_val;
1589}
1590

--- 45 unchanged lines hidden (view full) ---

1636 ret_val = hw->phy.ops.commit(hw);
1637 if (ret_val)
1638 goto out;
1639
1640 if (phy->autoneg_wait_to_complete) {
1641 DEBUGOUT("Waiting for forced speed/duplex link on M88 phy.\n");
1642
1643 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1766 if (ret_val)
1767 goto out;
1768 }
1769
1770out:
1771 return ret_val;
1772}
1773

--- 45 unchanged lines hidden (view full) ---

1819 ret_val = hw->phy.ops.commit(hw);
1820 if (ret_val)
1821 goto out;
1822
1823 if (phy->autoneg_wait_to_complete) {
1824 DEBUGOUT("Waiting for forced speed/duplex link on M88 phy.\n");
1825
1826 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1644 100000, &link);
1827 100000, &link);
1645 if (ret_val)
1646 goto out;
1647
1648 if (!link) {
1649 if (hw->phy.type != e1000_phy_m88 ||
1650 hw->phy.id == I347AT4_E_PHY_ID ||
1651 hw->phy.id == M88E1340M_E_PHY_ID ||
1652 hw->phy.id == M88E1112_E_PHY_ID) {

--- 11 unchanged lines hidden (view full) ---

1664 ret_val = e1000_phy_reset_dsp_generic(hw);
1665 if (ret_val)
1666 goto out;
1667 }
1668 }
1669
1670 /* Try once more */
1671 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1828 if (ret_val)
1829 goto out;
1830
1831 if (!link) {
1832 if (hw->phy.type != e1000_phy_m88 ||
1833 hw->phy.id == I347AT4_E_PHY_ID ||
1834 hw->phy.id == M88E1340M_E_PHY_ID ||
1835 hw->phy.id == M88E1112_E_PHY_ID) {

--- 11 unchanged lines hidden (view full) ---

1847 ret_val = e1000_phy_reset_dsp_generic(hw);
1848 if (ret_val)
1849 goto out;
1850 }
1851 }
1852
1853 /* Try once more */
1854 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1672 100000, &link);
1855 100000, &link);
1673 if (ret_val)
1674 goto out;
1675 }
1676
1677 if (hw->phy.type != e1000_phy_m88 ||
1678 hw->phy.id == I347AT4_E_PHY_ID ||
1679 hw->phy.id == M88E1340M_E_PHY_ID ||
1680 hw->phy.id == M88E1112_E_PHY_ID)

--- 69 unchanged lines hidden (view full) ---

1750
1751 DEBUGOUT1("IFE PMC: %X\n", data);
1752
1753 usec_delay(1);
1754
1755 if (phy->autoneg_wait_to_complete) {
1756 DEBUGOUT("Waiting for forced speed/duplex link on IFE phy.\n");
1757
1856 if (ret_val)
1857 goto out;
1858 }
1859
1860 if (hw->phy.type != e1000_phy_m88 ||
1861 hw->phy.id == I347AT4_E_PHY_ID ||
1862 hw->phy.id == M88E1340M_E_PHY_ID ||
1863 hw->phy.id == M88E1112_E_PHY_ID)

--- 69 unchanged lines hidden (view full) ---

1933
1934 DEBUGOUT1("IFE PMC: %X\n", data);
1935
1936 usec_delay(1);
1937
1938 if (phy->autoneg_wait_to_complete) {
1939 DEBUGOUT("Waiting for forced speed/duplex link on IFE phy.\n");
1940
1758 ret_val = e1000_phy_has_link_generic(hw,
1759 PHY_FORCE_LIMIT,
1760 100000,
1761 &link);
1941 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1942 100000, &link);
1762 if (ret_val)
1763 goto out;
1764
1765 if (!link)
1766 DEBUGOUT("Link taking longer than expected.\n");
1767
1768 /* Try once more */
1943 if (ret_val)
1944 goto out;
1945
1946 if (!link)
1947 DEBUGOUT("Link taking longer than expected.\n");
1948
1949 /* Try once more */
1769 ret_val = e1000_phy_has_link_generic(hw,
1770 PHY_FORCE_LIMIT,
1771 100000,
1772 &link);
1950 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
1951 100000, &link);
1773 if (ret_val)
1774 goto out;
1775 }
1776
1777out:
1778 return ret_val;
1779}
1780

--- 86 unchanged lines hidden (view full) ---

1867
1868 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
1869 if (ret_val)
1870 goto out;
1871
1872 if (!active) {
1873 data &= ~IGP02E1000_PM_D3_LPLU;
1874 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
1952 if (ret_val)
1953 goto out;
1954 }
1955
1956out:
1957 return ret_val;
1958}
1959

--- 86 unchanged lines hidden (view full) ---

2046
2047 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data);
2048 if (ret_val)
2049 goto out;
2050
2051 if (!active) {
2052 data &= ~IGP02E1000_PM_D3_LPLU;
2053 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
1875 data);
2054 data);
1876 if (ret_val)
1877 goto out;
1878 /*
1879 * LPLU and SmartSpeed are mutually exclusive. LPLU is used
1880 * during Dx states where the power conservation is most
1881 * important. During driver activity we should enable
1882 * SmartSpeed, so performance is maintained.
1883 */
1884 if (phy->smart_speed == e1000_smart_speed_on) {
1885 ret_val = phy->ops.read_reg(hw,
2055 if (ret_val)
2056 goto out;
2057 /*
2058 * LPLU and SmartSpeed are mutually exclusive. LPLU is used
2059 * during Dx states where the power conservation is most
2060 * important. During driver activity we should enable
2061 * SmartSpeed, so performance is maintained.
2062 */
2063 if (phy->smart_speed == e1000_smart_speed_on) {
2064 ret_val = phy->ops.read_reg(hw,
1886 IGP01E1000_PHY_PORT_CONFIG,
1887 &data);
2065 IGP01E1000_PHY_PORT_CONFIG,
2066 &data);
1888 if (ret_val)
1889 goto out;
1890
1891 data |= IGP01E1000_PSCFR_SMART_SPEED;
1892 ret_val = phy->ops.write_reg(hw,
2067 if (ret_val)
2068 goto out;
2069
2070 data |= IGP01E1000_PSCFR_SMART_SPEED;
2071 ret_val = phy->ops.write_reg(hw,
1893 IGP01E1000_PHY_PORT_CONFIG,
1894 data);
2072 IGP01E1000_PHY_PORT_CONFIG,
2073 data);
1895 if (ret_val)
1896 goto out;
1897 } else if (phy->smart_speed == e1000_smart_speed_off) {
1898 ret_val = phy->ops.read_reg(hw,
2074 if (ret_val)
2075 goto out;
2076 } else if (phy->smart_speed == e1000_smart_speed_off) {
2077 ret_val = phy->ops.read_reg(hw,
1899 IGP01E1000_PHY_PORT_CONFIG,
1900 &data);
2078 IGP01E1000_PHY_PORT_CONFIG,
2079 &data);
1901 if (ret_val)
1902 goto out;
1903
1904 data &= ~IGP01E1000_PSCFR_SMART_SPEED;
1905 ret_val = phy->ops.write_reg(hw,
2080 if (ret_val)
2081 goto out;
2082
2083 data &= ~IGP01E1000_PSCFR_SMART_SPEED;
2084 ret_val = phy->ops.write_reg(hw,
1906 IGP01E1000_PHY_PORT_CONFIG,
1907 data);
2085 IGP01E1000_PHY_PORT_CONFIG,
2086 data);
1908 if (ret_val)
1909 goto out;
1910 }
1911 } else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
2087 if (ret_val)
2088 goto out;
2089 }
2090 } else if ((phy->autoneg_advertised == E1000_ALL_SPEED_DUPLEX) ||
1912 (phy->autoneg_advertised == E1000_ALL_NOT_GIG) ||
1913 (phy->autoneg_advertised == E1000_ALL_10_SPEED)) {
2091 (phy->autoneg_advertised == E1000_ALL_NOT_GIG) ||
2092 (phy->autoneg_advertised == E1000_ALL_10_SPEED)) {
1914 data |= IGP02E1000_PM_D3_LPLU;
1915 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
2093 data |= IGP02E1000_PM_D3_LPLU;
2094 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT,
1916 data);
2095 data);
1917 if (ret_val)
1918 goto out;
1919
1920 /* When LPLU is enabled, we should disable SmartSpeed */
1921 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
2096 if (ret_val)
2097 goto out;
2098
2099 /* When LPLU is enabled, we should disable SmartSpeed */
2100 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1922 &data);
2101 &data);
1923 if (ret_val)
1924 goto out;
1925
1926 data &= ~IGP01E1000_PSCFR_SMART_SPEED;
1927 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
2102 if (ret_val)
2103 goto out;
2104
2105 data &= ~IGP01E1000_PSCFR_SMART_SPEED;
2106 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG,
1928 data);
2107 data);
1929 }
1930
1931out:
1932 return ret_val;
1933}
1934
1935/**
1936 * e1000_check_downshift_generic - Checks whether a downshift in speed occurred

--- 11 unchanged lines hidden (view full) ---

1948
1949 DEBUGFUNC("e1000_check_downshift_generic");
1950
1951 switch (phy->type) {
1952 case e1000_phy_m88:
1953 case e1000_phy_gg82563:
1954 case e1000_phy_bm:
1955 case e1000_phy_82578:
2108 }
2109
2110out:
2111 return ret_val;
2112}
2113
2114/**
2115 * e1000_check_downshift_generic - Checks whether a downshift in speed occurred

--- 11 unchanged lines hidden (view full) ---

2127
2128 DEBUGFUNC("e1000_check_downshift_generic");
2129
2130 switch (phy->type) {
2131 case e1000_phy_m88:
2132 case e1000_phy_gg82563:
2133 case e1000_phy_bm:
2134 case e1000_phy_82578:
1956 offset = M88E1000_PHY_SPEC_STATUS;
1957 mask = M88E1000_PSSR_DOWNSHIFT;
2135 offset = M88E1000_PHY_SPEC_STATUS;
2136 mask = M88E1000_PSSR_DOWNSHIFT;
1958 break;
1959 case e1000_phy_igp:
1960 case e1000_phy_igp_2:
1961 case e1000_phy_igp_3:
2137 break;
2138 case e1000_phy_igp:
2139 case e1000_phy_igp_2:
2140 case e1000_phy_igp_3:
1962 offset = IGP01E1000_PHY_LINK_HEALTH;
1963 mask = IGP01E1000_PLHR_SS_DOWNGRADE;
2141 offset = IGP01E1000_PHY_LINK_HEALTH;
2142 mask = IGP01E1000_PLHR_SS_DOWNGRADE;
1964 break;
1965 default:
1966 /* speed downshift not supported */
1967 phy->speed_downgraded = FALSE;
1968 ret_val = E1000_SUCCESS;
1969 goto out;
1970 }
1971

--- 21 unchanged lines hidden (view full) ---

1993 u16 data;
1994
1995 DEBUGFUNC("e1000_check_polarity_m88");
1996
1997 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data);
1998
1999 if (!ret_val)
2000 phy->cable_polarity = (data & M88E1000_PSSR_REV_POLARITY)
2143 break;
2144 default:
2145 /* speed downshift not supported */
2146 phy->speed_downgraded = FALSE;
2147 ret_val = E1000_SUCCESS;
2148 goto out;
2149 }
2150

--- 21 unchanged lines hidden (view full) ---

2172 u16 data;
2173
2174 DEBUGFUNC("e1000_check_polarity_m88");
2175
2176 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &data);
2177
2178 if (!ret_val)
2179 phy->cable_polarity = (data & M88E1000_PSSR_REV_POLARITY)
2001 ? e1000_rev_polarity_reversed
2002 : e1000_rev_polarity_normal;
2180 ? e1000_rev_polarity_reversed
2181 : e1000_rev_polarity_normal;
2003
2004 return ret_val;
2005}
2006
2007/**
2008 * e1000_check_polarity_igp - Checks the polarity.
2009 * @hw: pointer to the HW structure
2010 *

--- 15 unchanged lines hidden (view full) ---

2026 * our connection.
2027 */
2028 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
2029 if (ret_val)
2030 goto out;
2031
2032 if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
2033 IGP01E1000_PSSR_SPEED_1000MBPS) {
2182
2183 return ret_val;
2184}
2185
2186/**
2187 * e1000_check_polarity_igp - Checks the polarity.
2188 * @hw: pointer to the HW structure
2189 *

--- 15 unchanged lines hidden (view full) ---

2205 * our connection.
2206 */
2207 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_STATUS, &data);
2208 if (ret_val)
2209 goto out;
2210
2211 if ((data & IGP01E1000_PSSR_SPEED_MASK) ==
2212 IGP01E1000_PSSR_SPEED_1000MBPS) {
2034 offset = IGP01E1000_PHY_PCS_INIT_REG;
2035 mask = IGP01E1000_PHY_POLARITY_MASK;
2213 offset = IGP01E1000_PHY_PCS_INIT_REG;
2214 mask = IGP01E1000_PHY_POLARITY_MASK;
2036 } else {
2037 /*
2038 * This really only applies to 10Mbps since
2039 * there is no polarity for 100Mbps (always 0).
2040 */
2215 } else {
2216 /*
2217 * This really only applies to 10Mbps since
2218 * there is no polarity for 100Mbps (always 0).
2219 */
2041 offset = IGP01E1000_PHY_PORT_STATUS;
2042 mask = IGP01E1000_PSSR_POLARITY_REVERSED;
2220 offset = IGP01E1000_PHY_PORT_STATUS;
2221 mask = IGP01E1000_PSSR_POLARITY_REVERSED;
2043 }
2044
2045 ret_val = phy->ops.read_reg(hw, offset, &data);
2046
2047 if (!ret_val)
2048 phy->cable_polarity = (data & mask)
2222 }
2223
2224 ret_val = phy->ops.read_reg(hw, offset, &data);
2225
2226 if (!ret_val)
2227 phy->cable_polarity = (data & mask)
2049 ? e1000_rev_polarity_reversed
2050 : e1000_rev_polarity_normal;
2228 ? e1000_rev_polarity_reversed
2229 : e1000_rev_polarity_normal;
2051
2052out:
2053 return ret_val;
2054}
2055
2056/**
2057 * e1000_check_polarity_ife - Check cable polarity for IFE PHY
2058 * @hw: pointer to the HW structure

--- 18 unchanged lines hidden (view full) ---

2077 offset = IFE_PHY_SPECIAL_CONTROL;
2078 mask = IFE_PSC_FORCE_POLARITY;
2079 }
2080
2081 ret_val = phy->ops.read_reg(hw, offset, &phy_data);
2082
2083 if (!ret_val)
2084 phy->cable_polarity = (phy_data & mask)
2230
2231out:
2232 return ret_val;
2233}
2234
2235/**
2236 * e1000_check_polarity_ife - Check cable polarity for IFE PHY
2237 * @hw: pointer to the HW structure

--- 18 unchanged lines hidden (view full) ---

2256 offset = IFE_PHY_SPECIAL_CONTROL;
2257 mask = IFE_PSC_FORCE_POLARITY;
2258 }
2259
2260 ret_val = phy->ops.read_reg(hw, offset, &phy_data);
2261
2262 if (!ret_val)
2263 phy->cable_polarity = (phy_data & mask)
2085 ? e1000_rev_polarity_reversed
2086 : e1000_rev_polarity_normal;
2264 ? e1000_rev_polarity_reversed
2265 : e1000_rev_polarity_normal;
2087
2088 return ret_val;
2089}
2090
2091/**
2092 * e1000_wait_autoneg_generic - Wait for auto-neg completion
2093 * @hw: pointer to the HW structure
2094 *

--- 35 unchanged lines hidden (view full) ---

2130 * @hw: pointer to the HW structure
2131 * @iterations: number of times to poll for link
2132 * @usec_interval: delay between polling attempts
2133 * @success: pointer to whether polling was successful or not
2134 *
2135 * Polls the PHY status register for link, 'iterations' number of times.
2136 **/
2137s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
2266
2267 return ret_val;
2268}
2269
2270/**
2271 * e1000_wait_autoneg_generic - Wait for auto-neg completion
2272 * @hw: pointer to the HW structure
2273 *

--- 35 unchanged lines hidden (view full) ---

2309 * @hw: pointer to the HW structure
2310 * @iterations: number of times to poll for link
2311 * @usec_interval: delay between polling attempts
2312 * @success: pointer to whether polling was successful or not
2313 *
2314 * Polls the PHY status register for link, 'iterations' number of times.
2315 **/
2316s32 e1000_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
2138 u32 usec_interval, bool *success)
2317 u32 usec_interval, bool *success)
2139{
2140 s32 ret_val = E1000_SUCCESS;
2141 u16 i, phy_status;
2142
2143 DEBUGFUNC("e1000_phy_has_link_generic");
2144
2145 if (!(hw->phy.ops.read_reg))
2146 return E1000_SUCCESS;

--- 51 unchanged lines hidden (view full) ---

2198
2199 DEBUGFUNC("e1000_get_cable_length_m88");
2200
2201 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
2202 if (ret_val)
2203 goto out;
2204
2205 index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
2318{
2319 s32 ret_val = E1000_SUCCESS;
2320 u16 i, phy_status;
2321
2322 DEBUGFUNC("e1000_phy_has_link_generic");
2323
2324 if (!(hw->phy.ops.read_reg))
2325 return E1000_SUCCESS;

--- 51 unchanged lines hidden (view full) ---

2377
2378 DEBUGFUNC("e1000_get_cable_length_m88");
2379
2380 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
2381 if (ret_val)
2382 goto out;
2383
2384 index = (phy_data & M88E1000_PSSR_CABLE_LENGTH) >>
2206 M88E1000_PSSR_CABLE_LENGTH_SHIFT;
2385 M88E1000_PSSR_CABLE_LENGTH_SHIFT;
2207 if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE - 1) {
2208 ret_val = -E1000_ERR_PHY;
2209 goto out;
2210 }
2211
2212 phy->min_cable_length = e1000_m88_cable_length_table[index];
2213 phy->max_cable_length = e1000_m88_cable_length_table[index + 1];
2214

--- 30 unchanged lines hidden (view full) ---

2245 if (ret_val)
2246 goto out;
2247
2248 /* Check if the unit of cable length is meters or cm */
2249 ret_val = phy->ops.read_reg(hw, I347AT4_PCDC, &phy_data2);
2250 if (ret_val)
2251 goto out;
2252
2386 if (index >= M88E1000_CABLE_LENGTH_TABLE_SIZE - 1) {
2387 ret_val = -E1000_ERR_PHY;
2388 goto out;
2389 }
2390
2391 phy->min_cable_length = e1000_m88_cable_length_table[index];
2392 phy->max_cable_length = e1000_m88_cable_length_table[index + 1];
2393

--- 30 unchanged lines hidden (view full) ---

2424 if (ret_val)
2425 goto out;
2426
2427 /* Check if the unit of cable length is meters or cm */
2428 ret_val = phy->ops.read_reg(hw, I347AT4_PCDC, &phy_data2);
2429 if (ret_val)
2430 goto out;
2431
2253 is_cm = !(phy_data & I347AT4_PCDC_CABLE_LENGTH_UNIT);
2432 is_cm = !(phy_data2 & I347AT4_PCDC_CABLE_LENGTH_UNIT);
2254
2255 /* Populate the phy structure with cable length in meters */
2256 phy->min_cable_length = phy_data / (is_cm ? 100 : 1);
2257 phy->max_cable_length = phy_data / (is_cm ? 100 : 1);
2258 phy->cable_length = phy_data / (is_cm ? 100 : 1);
2259
2433
2434 /* Populate the phy structure with cable length in meters */
2435 phy->min_cable_length = phy_data / (is_cm ? 100 : 1);
2436 phy->max_cable_length = phy_data / (is_cm ? 100 : 1);
2437 phy->cable_length = phy_data / (is_cm ? 100 : 1);
2438
2260 /* Reset the page selec to its original value */
2439 /* Reset the page select to its original value */
2261 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT,
2262 default_page);
2263 if (ret_val)
2264 goto out;
2265 break;
2266 case M88E1112_E_PHY_ID:
2267 /* Remember the original page select and set it to 5 */
2268 ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT,

--- 53 unchanged lines hidden (view full) ---

2322s32 e1000_get_cable_length_igp_2(struct e1000_hw *hw)
2323{
2324 struct e1000_phy_info *phy = &hw->phy;
2325 s32 ret_val = E1000_SUCCESS;
2326 u16 phy_data, i, agc_value = 0;
2327 u16 cur_agc_index, max_agc_index = 0;
2328 u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;
2329 static const u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] = {
2440 ret_val = phy->ops.write_reg(hw, I347AT4_PAGE_SELECT,
2441 default_page);
2442 if (ret_val)
2443 goto out;
2444 break;
2445 case M88E1112_E_PHY_ID:
2446 /* Remember the original page select and set it to 5 */
2447 ret_val = phy->ops.read_reg(hw, I347AT4_PAGE_SELECT,

--- 53 unchanged lines hidden (view full) ---

2501s32 e1000_get_cable_length_igp_2(struct e1000_hw *hw)
2502{
2503 struct e1000_phy_info *phy = &hw->phy;
2504 s32 ret_val = E1000_SUCCESS;
2505 u16 phy_data, i, agc_value = 0;
2506 u16 cur_agc_index, max_agc_index = 0;
2507 u16 min_agc_index = IGP02E1000_CABLE_LENGTH_TABLE_SIZE - 1;
2508 static const u16 agc_reg_array[IGP02E1000_PHY_CHANNEL_NUM] = {
2330 IGP02E1000_PHY_AGC_A,
2331 IGP02E1000_PHY_AGC_B,
2332 IGP02E1000_PHY_AGC_C,
2333 IGP02E1000_PHY_AGC_D
2509 IGP02E1000_PHY_AGC_A,
2510 IGP02E1000_PHY_AGC_B,
2511 IGP02E1000_PHY_AGC_C,
2512 IGP02E1000_PHY_AGC_D
2334 };
2335
2336 DEBUGFUNC("e1000_get_cable_length_igp_2");
2337
2338 /* Read the AGC registers for all channels */
2339 for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) {
2340 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data);
2341 if (ret_val)
2342 goto out;
2343
2344 /*
2345 * Getting bits 15:9, which represent the combination of
2346 * coarse and fine gain values. The result is a number
2347 * that can be put into the lookup table to obtain the
2348 * approximate cable length.
2349 */
2350 cur_agc_index = (phy_data >> IGP02E1000_AGC_LENGTH_SHIFT) &
2513 };
2514
2515 DEBUGFUNC("e1000_get_cable_length_igp_2");
2516
2517 /* Read the AGC registers for all channels */
2518 for (i = 0; i < IGP02E1000_PHY_CHANNEL_NUM; i++) {
2519 ret_val = phy->ops.read_reg(hw, agc_reg_array[i], &phy_data);
2520 if (ret_val)
2521 goto out;
2522
2523 /*
2524 * Getting bits 15:9, which represent the combination of
2525 * coarse and fine gain values. The result is a number
2526 * that can be put into the lookup table to obtain the
2527 * approximate cable length.
2528 */
2529 cur_agc_index = (phy_data >> IGP02E1000_AGC_LENGTH_SHIFT) &
2351 IGP02E1000_AGC_LENGTH_MASK;
2530 IGP02E1000_AGC_LENGTH_MASK;
2352
2353 /* Array index bound check. */
2354 if ((cur_agc_index >= IGP02E1000_CABLE_LENGTH_TABLE_SIZE) ||
2355 (cur_agc_index == 0)) {
2356 ret_val = -E1000_ERR_PHY;
2357 goto out;
2358 }
2359

--- 4 unchanged lines hidden (view full) ---

2364 if (e1000_igp_2_cable_length_table[max_agc_index] <
2365 e1000_igp_2_cable_length_table[cur_agc_index])
2366 max_agc_index = cur_agc_index;
2367
2368 agc_value += e1000_igp_2_cable_length_table[cur_agc_index];
2369 }
2370
2371 agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] +
2531
2532 /* Array index bound check. */
2533 if ((cur_agc_index >= IGP02E1000_CABLE_LENGTH_TABLE_SIZE) ||
2534 (cur_agc_index == 0)) {
2535 ret_val = -E1000_ERR_PHY;
2536 goto out;
2537 }
2538

--- 4 unchanged lines hidden (view full) ---

2543 if (e1000_igp_2_cable_length_table[max_agc_index] <
2544 e1000_igp_2_cable_length_table[cur_agc_index])
2545 max_agc_index = cur_agc_index;
2546
2547 agc_value += e1000_igp_2_cable_length_table[cur_agc_index];
2548 }
2549
2550 agc_value -= (e1000_igp_2_cable_length_table[min_agc_index] +
2372 e1000_igp_2_cable_length_table[max_agc_index]);
2551 e1000_igp_2_cable_length_table[max_agc_index]);
2373 agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2);
2374
2375 /* Calculate cable length with the error range of +/- 10 meters. */
2376 phy->min_cable_length = ((agc_value - IGP02E1000_AGC_RANGE) > 0) ?
2552 agc_value /= (IGP02E1000_PHY_CHANNEL_NUM - 2);
2553
2554 /* Calculate cable length with the error range of +/- 10 meters. */
2555 phy->min_cable_length = ((agc_value - IGP02E1000_AGC_RANGE) > 0) ?
2377 (agc_value - IGP02E1000_AGC_RANGE) : 0;
2556 (agc_value - IGP02E1000_AGC_RANGE) : 0;
2378 phy->max_cable_length = agc_value + IGP02E1000_AGC_RANGE;
2379
2380 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
2381
2382out:
2383 return ret_val;
2384}
2385

--- 32 unchanged lines hidden (view full) ---

2418 goto out;
2419 }
2420
2421 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
2422 if (ret_val)
2423 goto out;
2424
2425 phy->polarity_correction = (phy_data & M88E1000_PSCR_POLARITY_REVERSAL)
2557 phy->max_cable_length = agc_value + IGP02E1000_AGC_RANGE;
2558
2559 phy->cable_length = (phy->min_cable_length + phy->max_cable_length) / 2;
2560
2561out:
2562 return ret_val;
2563}
2564

--- 32 unchanged lines hidden (view full) ---

2597 goto out;
2598 }
2599
2600 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
2601 if (ret_val)
2602 goto out;
2603
2604 phy->polarity_correction = (phy_data & M88E1000_PSCR_POLARITY_REVERSAL)
2426 ? TRUE : FALSE;
2605 ? TRUE : FALSE;
2427
2428 ret_val = e1000_check_polarity_m88(hw);
2429 if (ret_val)
2430 goto out;
2431
2432 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
2433 if (ret_val)
2434 goto out;

--- 5 unchanged lines hidden (view full) ---

2440 if (ret_val)
2441 goto out;
2442
2443 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
2444 if (ret_val)
2445 goto out;
2446
2447 phy->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS)
2606
2607 ret_val = e1000_check_polarity_m88(hw);
2608 if (ret_val)
2609 goto out;
2610
2611 ret_val = phy->ops.read_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
2612 if (ret_val)
2613 goto out;

--- 5 unchanged lines hidden (view full) ---

2619 if (ret_val)
2620 goto out;
2621
2622 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &phy_data);
2623 if (ret_val)
2624 goto out;
2625
2626 phy->local_rx = (phy_data & SR_1000T_LOCAL_RX_STATUS)
2448 ? e1000_1000t_rx_status_ok
2449 : e1000_1000t_rx_status_not_ok;
2627 ? e1000_1000t_rx_status_ok
2628 : e1000_1000t_rx_status_not_ok;
2450
2451 phy->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS)
2629
2630 phy->remote_rx = (phy_data & SR_1000T_REMOTE_RX_STATUS)
2452 ? e1000_1000t_rx_status_ok
2453 : e1000_1000t_rx_status_not_ok;
2631 ? e1000_1000t_rx_status_ok
2632 : e1000_1000t_rx_status_not_ok;
2454 } else {
2455 /* Set values to "undefined" */
2456 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
2457 phy->local_rx = e1000_1000t_rx_status_undefined;
2458 phy->remote_rx = e1000_1000t_rx_status_undefined;
2459 }
2460
2461out:

--- 46 unchanged lines hidden (view full) ---

2508 if (ret_val)
2509 goto out;
2510
2511 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
2512 if (ret_val)
2513 goto out;
2514
2515 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
2633 } else {
2634 /* Set values to "undefined" */
2635 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
2636 phy->local_rx = e1000_1000t_rx_status_undefined;
2637 phy->remote_rx = e1000_1000t_rx_status_undefined;
2638 }
2639
2640out:

--- 46 unchanged lines hidden (view full) ---

2687 if (ret_val)
2688 goto out;
2689
2690 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
2691 if (ret_val)
2692 goto out;
2693
2694 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
2516 ? e1000_1000t_rx_status_ok
2517 : e1000_1000t_rx_status_not_ok;
2695 ? e1000_1000t_rx_status_ok
2696 : e1000_1000t_rx_status_not_ok;
2518
2519 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
2697
2698 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
2520 ? e1000_1000t_rx_status_ok
2521 : e1000_1000t_rx_status_not_ok;
2699 ? e1000_1000t_rx_status_ok
2700 : e1000_1000t_rx_status_not_ok;
2522 } else {
2523 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
2524 phy->local_rx = e1000_1000t_rx_status_undefined;
2525 phy->remote_rx = e1000_1000t_rx_status_undefined;
2526 }
2527
2528out:
2529 return ret_val;

--- 23 unchanged lines hidden (view full) ---

2553 ret_val = -E1000_ERR_CONFIG;
2554 goto out;
2555 }
2556
2557 ret_val = phy->ops.read_reg(hw, IFE_PHY_SPECIAL_CONTROL, &data);
2558 if (ret_val)
2559 goto out;
2560 phy->polarity_correction = (data & IFE_PSC_AUTO_POLARITY_DISABLE)
2701 } else {
2702 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
2703 phy->local_rx = e1000_1000t_rx_status_undefined;
2704 phy->remote_rx = e1000_1000t_rx_status_undefined;
2705 }
2706
2707out:
2708 return ret_val;

--- 23 unchanged lines hidden (view full) ---

2732 ret_val = -E1000_ERR_CONFIG;
2733 goto out;
2734 }
2735
2736 ret_val = phy->ops.read_reg(hw, IFE_PHY_SPECIAL_CONTROL, &data);
2737 if (ret_val)
2738 goto out;
2739 phy->polarity_correction = (data & IFE_PSC_AUTO_POLARITY_DISABLE)
2561 ? FALSE : TRUE;
2740 ? FALSE : TRUE;
2562
2563 if (phy->polarity_correction) {
2564 ret_val = e1000_check_polarity_ife(hw);
2565 if (ret_val)
2566 goto out;
2567 } else {
2568 /* Polarity is forced */
2569 phy->cable_polarity = (data & IFE_PSC_FORCE_POLARITY)
2741
2742 if (phy->polarity_correction) {
2743 ret_val = e1000_check_polarity_ife(hw);
2744 if (ret_val)
2745 goto out;
2746 } else {
2747 /* Polarity is forced */
2748 phy->cable_polarity = (data & IFE_PSC_FORCE_POLARITY)
2570 ? e1000_rev_polarity_reversed
2571 : e1000_rev_polarity_normal;
2749 ? e1000_rev_polarity_reversed
2750 : e1000_rev_polarity_normal;
2572 }
2573
2574 ret_val = phy->ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, &data);
2575 if (ret_val)
2576 goto out;
2577
2578 phy->is_mdix = (data & IFE_PMC_MDIX_STATUS) ? TRUE : FALSE;
2579

--- 318 unchanged lines hidden (view full) ---

2898
2899 ret_val = hw->phy.ops.acquire(hw);
2900 if (ret_val)
2901 return ret_val;
2902
2903 /* Page 800 works differently than the rest so it has its own func */
2904 if (page == BM_WUC_PAGE) {
2905 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
2751 }
2752
2753 ret_val = phy->ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, &data);
2754 if (ret_val)
2755 goto out;
2756
2757 phy->is_mdix = (data & IFE_PMC_MDIX_STATUS) ? TRUE : FALSE;
2758

--- 318 unchanged lines hidden (view full) ---

3077
3078 ret_val = hw->phy.ops.acquire(hw);
3079 if (ret_val)
3080 return ret_val;
3081
3082 /* Page 800 works differently than the rest so it has its own func */
3083 if (page == BM_WUC_PAGE) {
3084 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
2906 FALSE);
3085 FALSE, FALSE);
2907 goto out;
2908 }
2909
2910 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
2911
2912 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2913 u32 page_shift, page_select;
2914

--- 7 unchanged lines hidden (view full) ---

2922 page_select = IGP01E1000_PHY_PAGE_SELECT;
2923 } else {
2924 page_shift = 0;
2925 page_select = BM_PHY_PAGE_SELECT;
2926 }
2927
2928 /* Page is shifted left, PHY expects (page x 32) */
2929 ret_val = e1000_write_phy_reg_mdic(hw, page_select,
3086 goto out;
3087 }
3088
3089 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
3090
3091 if (offset > MAX_PHY_MULTI_PAGE_REG) {
3092 u32 page_shift, page_select;
3093

--- 7 unchanged lines hidden (view full) ---

3101 page_select = IGP01E1000_PHY_PAGE_SELECT;
3102 } else {
3103 page_shift = 0;
3104 page_select = BM_PHY_PAGE_SELECT;
3105 }
3106
3107 /* Page is shifted left, PHY expects (page x 32) */
3108 ret_val = e1000_write_phy_reg_mdic(hw, page_select,
2930 (page << page_shift));
3109 (page << page_shift));
2931 if (ret_val)
2932 goto out;
2933 }
2934
2935 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
3110 if (ret_val)
3111 goto out;
3112 }
3113
3114 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2936 data);
3115 data);
2937
2938out:
2939 hw->phy.ops.release(hw);
2940 return ret_val;
2941}
2942
2943/**
2944 * e1000_read_phy_reg_bm - Read BM PHY register

--- 14 unchanged lines hidden (view full) ---

2959
2960 ret_val = hw->phy.ops.acquire(hw);
2961 if (ret_val)
2962 return ret_val;
2963
2964 /* Page 800 works differently than the rest so it has its own func */
2965 if (page == BM_WUC_PAGE) {
2966 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
3116
3117out:
3118 hw->phy.ops.release(hw);
3119 return ret_val;
3120}
3121
3122/**
3123 * e1000_read_phy_reg_bm - Read BM PHY register

--- 14 unchanged lines hidden (view full) ---

3138
3139 ret_val = hw->phy.ops.acquire(hw);
3140 if (ret_val)
3141 return ret_val;
3142
3143 /* Page 800 works differently than the rest so it has its own func */
3144 if (page == BM_WUC_PAGE) {
3145 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
2967 TRUE);
3146 TRUE, FALSE);
2968 goto out;
2969 }
2970
2971 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
2972
2973 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2974 u32 page_shift, page_select;
2975

--- 7 unchanged lines hidden (view full) ---

2983 page_select = IGP01E1000_PHY_PAGE_SELECT;
2984 } else {
2985 page_shift = 0;
2986 page_select = BM_PHY_PAGE_SELECT;
2987 }
2988
2989 /* Page is shifted left, PHY expects (page x 32) */
2990 ret_val = e1000_write_phy_reg_mdic(hw, page_select,
3147 goto out;
3148 }
3149
3150 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
3151
3152 if (offset > MAX_PHY_MULTI_PAGE_REG) {
3153 u32 page_shift, page_select;
3154

--- 7 unchanged lines hidden (view full) ---

3162 page_select = IGP01E1000_PHY_PAGE_SELECT;
3163 } else {
3164 page_shift = 0;
3165 page_select = BM_PHY_PAGE_SELECT;
3166 }
3167
3168 /* Page is shifted left, PHY expects (page x 32) */
3169 ret_val = e1000_write_phy_reg_mdic(hw, page_select,
2991 (page << page_shift));
3170 (page << page_shift));
2992 if (ret_val)
2993 goto out;
2994 }
2995
2996 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
3171 if (ret_val)
3172 goto out;
3173 }
3174
3175 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2997 data);
3176 data);
2998out:
2999 hw->phy.ops.release(hw);
3000 return ret_val;
3001}
3002
3003/**
3004 * e1000_read_phy_reg_bm2 - Read BM PHY register
3005 * @hw: pointer to the HW structure

--- 4 unchanged lines hidden (view full) ---

3010 * and storing the retrieved information in data. Release any acquired
3011 * semaphores before exiting.
3012 **/
3013s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
3014{
3015 s32 ret_val;
3016 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
3017
3177out:
3178 hw->phy.ops.release(hw);
3179 return ret_val;
3180}
3181
3182/**
3183 * e1000_read_phy_reg_bm2 - Read BM PHY register
3184 * @hw: pointer to the HW structure

--- 4 unchanged lines hidden (view full) ---

3189 * and storing the retrieved information in data. Release any acquired
3190 * semaphores before exiting.
3191 **/
3192s32 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
3193{
3194 s32 ret_val;
3195 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
3196
3018 DEBUGFUNC("e1000_write_phy_reg_bm2");
3197 DEBUGFUNC("e1000_read_phy_reg_bm2");
3019
3020 ret_val = hw->phy.ops.acquire(hw);
3021 if (ret_val)
3022 return ret_val;
3023
3024 /* Page 800 works differently than the rest so it has its own func */
3025 if (page == BM_WUC_PAGE) {
3026 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
3198
3199 ret_val = hw->phy.ops.acquire(hw);
3200 if (ret_val)
3201 return ret_val;
3202
3203 /* Page 800 works differently than the rest so it has its own func */
3204 if (page == BM_WUC_PAGE) {
3205 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
3027 TRUE);
3206 TRUE, FALSE);
3028 goto out;
3029 }
3030
3031 hw->phy.addr = 1;
3032
3033 if (offset > MAX_PHY_MULTI_PAGE_REG) {
3034
3035 /* Page is shifted left, PHY expects (page x 32) */
3036 ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
3207 goto out;
3208 }
3209
3210 hw->phy.addr = 1;
3211
3212 if (offset > MAX_PHY_MULTI_PAGE_REG) {
3213
3214 /* Page is shifted left, PHY expects (page x 32) */
3215 ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
3037 page);
3216 page);
3038
3039 if (ret_val)
3040 goto out;
3041 }
3042
3043 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
3217
3218 if (ret_val)
3219 goto out;
3220 }
3221
3222 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
3044 data);
3223 data);
3045out:
3046 hw->phy.ops.release(hw);
3047 return ret_val;
3048}
3049
3050/**
3051 * e1000_write_phy_reg_bm2 - Write BM PHY register
3052 * @hw: pointer to the HW structure

--- 12 unchanged lines hidden (view full) ---

3065
3066 ret_val = hw->phy.ops.acquire(hw);
3067 if (ret_val)
3068 return ret_val;
3069
3070 /* Page 800 works differently than the rest so it has its own func */
3071 if (page == BM_WUC_PAGE) {
3072 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
3224out:
3225 hw->phy.ops.release(hw);
3226 return ret_val;
3227}
3228
3229/**
3230 * e1000_write_phy_reg_bm2 - Write BM PHY register
3231 * @hw: pointer to the HW structure

--- 12 unchanged lines hidden (view full) ---

3244
3245 ret_val = hw->phy.ops.acquire(hw);
3246 if (ret_val)
3247 return ret_val;
3248
3249 /* Page 800 works differently than the rest so it has its own func */
3250 if (page == BM_WUC_PAGE) {
3251 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
3073 FALSE);
3252 FALSE, FALSE);
3074 goto out;
3075 }
3076
3077 hw->phy.addr = 1;
3078
3079 if (offset > MAX_PHY_MULTI_PAGE_REG) {
3080 /* Page is shifted left, PHY expects (page x 32) */
3081 ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
3253 goto out;
3254 }
3255
3256 hw->phy.addr = 1;
3257
3258 if (offset > MAX_PHY_MULTI_PAGE_REG) {
3259 /* Page is shifted left, PHY expects (page x 32) */
3260 ret_val = e1000_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
3082 page);
3261 page);
3083
3084 if (ret_val)
3085 goto out;
3086 }
3087
3088 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
3262
3263 if (ret_val)
3264 goto out;
3265 }
3266
3267 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
3089 data);
3268 data);
3090
3091out:
3092 hw->phy.ops.release(hw);
3093 return ret_val;
3094}
3095
3096/**
3269
3270out:
3271 hw->phy.ops.release(hw);
3272 return ret_val;
3273}
3274
3275/**
3097 * e1000_access_phy_wakeup_reg_bm - Read BM PHY wakeup register
3276 * e1000_enable_phy_wakeup_reg_access_bm - enable access to BM wakeup registers
3098 * @hw: pointer to the HW structure
3277 * @hw: pointer to the HW structure
3099 * @offset: register offset to be read or written
3100 * @data: pointer to the data to read or write
3101 * @read: determines if operation is read or write
3278 * @phy_reg: pointer to store original contents of BM_WUC_ENABLE_REG
3102 *
3279 *
3103 * Acquires semaphore, if necessary, then reads the PHY register at offset
3104 * and storing the retrieved information in data. Release any acquired
3105 * semaphores before exiting. Note that procedure to read the wakeup
3106 * registers are different. It works as such:
3107 * 1) Set page 769, register 17, bit 2 = 1
3108 * 2) Set page to 800 for host (801 if we were manageability)
3109 * 3) Write the address using the address opcode (0x11)
3110 * 4) Read or write the data using the data opcode (0x12)
3111 * 5) Restore 769_17.2 to its original value
3112 *
3113 * Assumes semaphore already acquired.
3280 * Assumes semaphore already acquired and phy_reg points to a valid memory
3281 * address to store contents of the BM_WUC_ENABLE_REG register.
3114 **/
3282 **/
3115static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
3116 u16 *data, bool read)
3283s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg)
3117{
3118 s32 ret_val;
3284{
3285 s32 ret_val;
3119 u16 reg = BM_PHY_REG_NUM(offset);
3120 u16 phy_reg = 0;
3286 u16 temp;
3121
3287
3122 DEBUGFUNC("e1000_access_phy_wakeup_reg_bm");
3288 DEBUGFUNC("e1000_enable_phy_wakeup_reg_access_bm");
3123
3289
3124 /* Gig must be disabled for MDIO accesses to page 800 */
3125 if ((hw->mac.type == e1000_pchlan) &&
3126 (!(E1000_READ_REG(hw, E1000_PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE)))
3127 DEBUGOUT("Attempting to access page 800 while gig enabled.\n");
3290 if (!phy_reg) {
3291 ret_val = -E1000_ERR_PARAM;
3292 goto out;
3293 }
3128
3294
3129 /* All operations in this function are phy address 1 */
3295 /* All page select, port ctrl and wakeup registers use phy address 1 */
3130 hw->phy.addr = 1;
3131
3296 hw->phy.addr = 1;
3297
3132 /* Set page 769 */
3133 e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3134 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
3298 /* Select Port Control Registers page */
3299 ret_val = e1000_set_page_igp(hw, (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));
3300 if (ret_val) {
3301 DEBUGOUT("Could not set Port Control page\n");
3302 goto out;
3303 }
3135
3304
3136 ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
3305 ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
3137 if (ret_val) {
3306 if (ret_val) {
3138 DEBUGOUT("Could not read PHY page 769\n");
3307 DEBUGOUT2("Could not read PHY register %d.%d\n",
3308 BM_PORT_CTRL_PAGE, BM_WUC_ENABLE_REG);
3139 goto out;
3140 }
3141
3309 goto out;
3310 }
3311
3142 /* First clear bit 4 to avoid a power state change */
3143 phy_reg &= ~(BM_WUC_HOST_WU_BIT);
3144 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
3312 /*
3313 * Enable both PHY wakeup mode and Wakeup register page writes.
3314 * Prevent a power state change by disabling ME and Host PHY wakeup.
3315 */
3316 temp = *phy_reg;
3317 temp |= BM_WUC_ENABLE_BIT;
3318 temp &= ~(BM_WUC_ME_WU_BIT | BM_WUC_HOST_WU_BIT);
3319
3320 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, temp);
3145 if (ret_val) {
3321 if (ret_val) {
3146 DEBUGOUT("Could not clear PHY page 769 bit 4\n");
3322 DEBUGOUT2("Could not write PHY register %d.%d\n",
3323 BM_PORT_CTRL_PAGE, BM_WUC_ENABLE_REG);
3147 goto out;
3148 }
3149
3324 goto out;
3325 }
3326
3150 /* Write bit 2 = 1, and clear bit 4 to 769_17 */
3151 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG,
3152 phy_reg | BM_WUC_ENABLE_BIT);
3327 /* Select Host Wakeup Registers page */
3328 ret_val = e1000_set_page_igp(hw, (BM_WUC_PAGE << IGP_PAGE_SHIFT));
3329
3330 /* caller now able to write registers on the Wakeup registers page */
3331out:
3332 return ret_val;
3333}
3334
3335/**
3336 * e1000_disable_phy_wakeup_reg_access_bm - disable access to BM wakeup regs
3337 * @hw: pointer to the HW structure
3338 * @phy_reg: pointer to original contents of BM_WUC_ENABLE_REG
3339 *
3340 * Restore BM_WUC_ENABLE_REG to its original value.
3341 *
3342 * Assumes semaphore already acquired and *phy_reg is the contents of the
3343 * BM_WUC_ENABLE_REG before register(s) on BM_WUC_PAGE were accessed by
3344 * caller.
3345 **/
3346s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, u16 *phy_reg)
3347{
3348 s32 ret_val = E1000_SUCCESS;
3349
3350 DEBUGFUNC("e1000_disable_phy_wakeup_reg_access_bm");
3351
3352 if (!phy_reg)
3353 return -E1000_ERR_PARAM;
3354
3355 /* Select Port Control Registers page */
3356 ret_val = e1000_set_page_igp(hw, (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));
3153 if (ret_val) {
3357 if (ret_val) {
3154 DEBUGOUT("Could not write PHY page 769 bit 2\n");
3358 DEBUGOUT("Could not set Port Control page\n");
3155 goto out;
3156 }
3157
3359 goto out;
3360 }
3361
3158 /* Select page 800 */
3159 ret_val = e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3160 (BM_WUC_PAGE << IGP_PAGE_SHIFT));
3362 /* Restore 769.17 to its original value */
3363 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, *phy_reg);
3364 if (ret_val)
3365 DEBUGOUT2("Could not restore PHY register %d.%d\n",
3366 BM_PORT_CTRL_PAGE, BM_WUC_ENABLE_REG);
3367out:
3368 return ret_val;
3369}
3161
3370
3162 /* Write the page 800 offset value using opcode 0x11 */
3371/**
3372 * e1000_access_phy_wakeup_reg_bm - Read/write BM PHY wakeup register
3373 * @hw: pointer to the HW structure
3374 * @offset: register offset to be read or written
3375 * @data: pointer to the data to read or write
3376 * @read: determines if operation is read or write
3377 * @page_set: BM_WUC_PAGE already set and access enabled
3378 *
3379 * Read the PHY register at offset and store the retrieved information in
3380 * data, or write data to PHY register at offset. Note the procedure to
3381 * access the PHY wakeup registers is different than reading the other PHY
3382 * registers. It works as such:
3383 * 1) Set 769.17.2 (page 769, register 17, bit 2) = 1
3384 * 2) Set page to 800 for host (801 if we were manageability)
3385 * 3) Write the address using the address opcode (0x11)
3386 * 4) Read or write the data using the data opcode (0x12)
3387 * 5) Restore 769.17.2 to its original value
3388 *
3389 * Steps 1 and 2 are done by e1000_enable_phy_wakeup_reg_access_bm() and
3390 * step 5 is done by e1000_disable_phy_wakeup_reg_access_bm().
3391 *
3392 * Assumes semaphore is already acquired. When page_set==TRUE, assumes
3393 * the PHY page is set to BM_WUC_PAGE (i.e. a function in the call stack
3394 * is responsible for calls to e1000_[enable|disable]_phy_wakeup_reg_bm()).
3395 **/
3396static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
3397 u16 *data, bool read, bool page_set)
3398{
3399 s32 ret_val;
3400 u16 reg = BM_PHY_REG_NUM(offset);
3401 u16 phy_reg = 0;
3402
3403 DEBUGFUNC("e1000_access_phy_wakeup_reg_bm");
3404
3405 /* Gig must be disabled for MDIO accesses to Host Wakeup reg page */
3406 if ((hw->mac.type == e1000_pchlan) &&
3407 (!(E1000_READ_REG(hw, E1000_PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE)))
3408 DEBUGOUT1("Attempting to access page %d while gig enabled.\n",
3409 page);
3410
3411 if (!page_set) {
3412 /* Enable access to PHY wakeup registers */
3413 ret_val = e1000_enable_phy_wakeup_reg_access_bm(hw, &phy_reg);
3414 if (ret_val) {
3415 DEBUGOUT("Could not enable PHY wakeup reg access\n");
3416 goto out;
3417 }
3418 }
3419
3420 DEBUGOUT2("Accessing PHY page %d reg 0x%x\n", page, reg);
3421
3422 /* Write the Wakeup register page offset value using opcode 0x11 */
3163 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg);
3164 if (ret_val) {
3423 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ADDRESS_OPCODE, reg);
3424 if (ret_val) {
3165 DEBUGOUT("Could not write address opcode to page 800\n");
3425 DEBUGOUT1("Could not write address opcode to page %d\n", page);
3166 goto out;
3167 }
3168
3169 if (read) {
3426 goto out;
3427 }
3428
3429 if (read) {
3170 /* Read the page 800 value using opcode 0x12 */
3430 /* Read the Wakeup register page value using opcode 0x12 */
3171 ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
3431 ret_val = e1000_read_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
3172 data);
3432 data);
3173 } else {
3433 } else {
3174 /* Write the page 800 value using opcode 0x12 */
3434 /* Write the Wakeup register page value using opcode 0x12 */
3175 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
3435 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_DATA_OPCODE,
3176 *data);
3436 *data);
3177 }
3178
3179 if (ret_val) {
3437 }
3438
3439 if (ret_val) {
3180 DEBUGOUT("Could not access data value from page 800\n");
3440 DEBUGOUT2("Could not access PHY reg %d.%d\n", page, reg);
3181 goto out;
3182 }
3183
3441 goto out;
3442 }
3443
3184 /*
3185 * Restore 769_17.2 to its original value
3186 * Set page 769
3187 */
3188 e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3189 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
3444 if (!page_set)
3445 ret_val = e1000_disable_phy_wakeup_reg_access_bm(hw, &phy_reg);
3190
3446
3191 /* Clear 769_17.2 */
3192 ret_val = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
3193 if (ret_val) {
3194 DEBUGOUT("Could not clear PHY page 769 bit 2\n");
3195 goto out;
3196 }
3197
3198out:
3199 return ret_val;
3200}
3201
3202/**
3203 * e1000_power_up_phy_copper - Restore copper link in case of PHY power down
3204 * @hw: pointer to the HW structure
3205 *

--- 37 unchanged lines hidden (view full) ---

3243 * @data: pointer to the read data
3244 * @locked: semaphore has already been acquired or not
3245 *
3246 * Acquires semaphore, if necessary, then reads the PHY register at offset
3247 * and stores the retrieved information in data. Release any acquired
3248 * semaphore before exiting.
3249 **/
3250static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
3447out:
3448 return ret_val;
3449}
3450
3451/**
3452 * e1000_power_up_phy_copper - Restore copper link in case of PHY power down
3453 * @hw: pointer to the HW structure
3454 *

--- 37 unchanged lines hidden (view full) ---

3492 * @data: pointer to the read data
3493 * @locked: semaphore has already been acquired or not
3494 *
3495 * Acquires semaphore, if necessary, then reads the PHY register at offset
3496 * and stores the retrieved information in data. Release any acquired
3497 * semaphore before exiting.
3498 **/
3499static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
3251 bool locked)
3500 bool locked, bool page_set)
3252{
3253 s32 ret_val;
3254 u16 page = BM_PHY_REG_PAGE(offset);
3255 u16 reg = BM_PHY_REG_NUM(offset);
3501{
3502 s32 ret_val;
3503 u16 page = BM_PHY_REG_PAGE(offset);
3504 u16 reg = BM_PHY_REG_NUM(offset);
3505 u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
3256
3257 DEBUGFUNC("__e1000_read_phy_reg_hv");
3258
3259 if (!locked) {
3260 ret_val = hw->phy.ops.acquire(hw);
3261 if (ret_val)
3262 return ret_val;
3263 }
3264
3265 /* Page 800 works differently than the rest so it has its own func */
3266 if (page == BM_WUC_PAGE) {
3506
3507 DEBUGFUNC("__e1000_read_phy_reg_hv");
3508
3509 if (!locked) {
3510 ret_val = hw->phy.ops.acquire(hw);
3511 if (ret_val)
3512 return ret_val;
3513 }
3514
3515 /* Page 800 works differently than the rest so it has its own func */
3516 if (page == BM_WUC_PAGE) {
3267 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
3268 data, TRUE);
3517 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
3518 TRUE, page_set);
3269 goto out;
3270 }
3271
3272 if (page > 0 && page < HV_INTC_FC_PAGE_START) {
3273 ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
3519 goto out;
3520 }
3521
3522 if (page > 0 && page < HV_INTC_FC_PAGE_START) {
3523 ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
3274 data, TRUE);
3524 data, TRUE);
3275 goto out;
3276 }
3277
3525 goto out;
3526 }
3527
3278 hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
3528 if (!page_set) {
3529 if (page == HV_INTC_FC_PAGE_START)
3530 page = 0;
3279
3531
3280 if (page == HV_INTC_FC_PAGE_START)
3281 page = 0;
3532 if (reg > MAX_PHY_MULTI_PAGE_REG) {
3533 /* Page is shifted left, PHY expects (page x 32) */
3534 ret_val = e1000_set_page_igp(hw,
3535 (page << IGP_PAGE_SHIFT));
3282
3536
3283 if (reg > MAX_PHY_MULTI_PAGE_REG) {
3284 u32 phy_addr = hw->phy.addr;
3537 hw->phy.addr = phy_addr;
3285
3538
3286 hw->phy.addr = 1;
3287
3288 /* Page is shifted left, PHY expects (page x 32) */
3289 ret_val = e1000_write_phy_reg_mdic(hw,
3290 IGP01E1000_PHY_PAGE_SELECT,
3291 (page << IGP_PAGE_SHIFT));
3292 hw->phy.addr = phy_addr;
3293
3294 if (ret_val)
3295 goto out;
3539 if (ret_val)
3540 goto out;
3541 }
3296 }
3297
3542 }
3543
3544 DEBUGOUT3("reading PHY page %d (or 0x%x shifted) reg 0x%x\n", page,
3545 page << IGP_PAGE_SHIFT, reg);
3546
3298 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
3547 ret_val = e1000_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
3299 data);
3548 data);
3300out:
3301 if (!locked)
3302 hw->phy.ops.release(hw);
3303
3304 return ret_val;
3305}
3306
3307/**
3308 * e1000_read_phy_reg_hv - Read HV PHY register
3309 * @hw: pointer to the HW structure
3310 * @offset: register offset to be read
3311 * @data: pointer to the read data
3312 *
3313 * Acquires semaphore then reads the PHY register at offset and stores
3314 * the retrieved information in data. Release the acquired semaphore
3315 * before exiting.
3316 **/
3317s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
3318{
3549out:
3550 if (!locked)
3551 hw->phy.ops.release(hw);
3552
3553 return ret_val;
3554}
3555
3556/**
3557 * e1000_read_phy_reg_hv - Read HV PHY register
3558 * @hw: pointer to the HW structure
3559 * @offset: register offset to be read
3560 * @data: pointer to the read data
3561 *
3562 * Acquires semaphore then reads the PHY register at offset and stores
3563 * the retrieved information in data. Release the acquired semaphore
3564 * before exiting.
3565 **/
3566s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
3567{
3319 return __e1000_read_phy_reg_hv(hw, offset, data, FALSE);
3568 return __e1000_read_phy_reg_hv(hw, offset, data, FALSE, FALSE);
3320}
3321
3322/**
3323 * e1000_read_phy_reg_hv_locked - Read HV PHY register
3324 * @hw: pointer to the HW structure
3325 * @offset: register offset to be read
3326 * @data: pointer to the read data
3327 *
3328 * Reads the PHY register at offset and stores the retrieved information
3329 * in data. Assumes semaphore already acquired.
3330 **/
3331s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
3332{
3569}
3570
3571/**
3572 * e1000_read_phy_reg_hv_locked - Read HV PHY register
3573 * @hw: pointer to the HW structure
3574 * @offset: register offset to be read
3575 * @data: pointer to the read data
3576 *
3577 * Reads the PHY register at offset and stores the retrieved information
3578 * in data. Assumes semaphore already acquired.
3579 **/
3580s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
3581{
3333 return __e1000_read_phy_reg_hv(hw, offset, data, TRUE);
3582 return __e1000_read_phy_reg_hv(hw, offset, data, TRUE, FALSE);
3334}
3335
3336/**
3583}
3584
3585/**
3586 * e1000_read_phy_reg_page_hv - Read HV PHY register
3587 * @hw: pointer to the HW structure
3588 * @offset: register offset to write to
3589 * @data: data to write at register offset
3590 *
3591 * Reads the PHY register at offset and stores the retrieved information
3592 * in data. Assumes semaphore already acquired and page already set.
3593 **/
3594s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
3595{
3596 return __e1000_read_phy_reg_hv(hw, offset, data, TRUE, true);
3597}
3598
3599/**
3337 * __e1000_write_phy_reg_hv - Write HV PHY register
3338 * @hw: pointer to the HW structure
3339 * @offset: register offset to write to
3340 * @data: data to write at register offset
3341 * @locked: semaphore has already been acquired or not
3342 *
3343 * Acquires semaphore, if necessary, then writes the data to PHY register
3344 * at the offset. Release any acquired semaphores before exiting.
3345 **/
3346static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
3600 * __e1000_write_phy_reg_hv - Write HV PHY register
3601 * @hw: pointer to the HW structure
3602 * @offset: register offset to write to
3603 * @data: data to write at register offset
3604 * @locked: semaphore has already been acquired or not
3605 *
3606 * Acquires semaphore, if necessary, then writes the data to PHY register
3607 * at the offset. Release any acquired semaphores before exiting.
3608 **/
3609static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
3347 bool locked)
3610 bool locked, bool page_set)
3348{
3349 s32 ret_val;
3350 u16 page = BM_PHY_REG_PAGE(offset);
3351 u16 reg = BM_PHY_REG_NUM(offset);
3611{
3612 s32 ret_val;
3613 u16 page = BM_PHY_REG_PAGE(offset);
3614 u16 reg = BM_PHY_REG_NUM(offset);
3615 u32 phy_addr = hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
3352
3353 DEBUGFUNC("__e1000_write_phy_reg_hv");
3354
3355 if (!locked) {
3356 ret_val = hw->phy.ops.acquire(hw);
3357 if (ret_val)
3358 return ret_val;
3359 }
3360
3361 /* Page 800 works differently than the rest so it has its own func */
3362 if (page == BM_WUC_PAGE) {
3616
3617 DEBUGFUNC("__e1000_write_phy_reg_hv");
3618
3619 if (!locked) {
3620 ret_val = hw->phy.ops.acquire(hw);
3621 if (ret_val)
3622 return ret_val;
3623 }
3624
3625 /* Page 800 works differently than the rest so it has its own func */
3626 if (page == BM_WUC_PAGE) {
3363 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset,
3364 &data, FALSE);
3627 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
3628 FALSE, page_set);
3365 goto out;
3366 }
3367
3368 if (page > 0 && page < HV_INTC_FC_PAGE_START) {
3369 ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
3629 goto out;
3630 }
3631
3632 if (page > 0 && page < HV_INTC_FC_PAGE_START) {
3633 ret_val = e1000_access_phy_debug_regs_hv(hw, offset,
3370 &data, FALSE);
3634 &data, FALSE);
3371 goto out;
3372 }
3373
3635 goto out;
3636 }
3637
3374 hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
3638 if (!page_set) {
3639 if (page == HV_INTC_FC_PAGE_START)
3640 page = 0;
3375
3641
3376 if (page == HV_INTC_FC_PAGE_START)
3377 page = 0;
3642 /*
3643 * Workaround MDIO accesses being disabled after entering IEEE
3644 * Power Down (when bit 11 of the PHY Control register is set)
3645 */
3646 if ((hw->phy.type == e1000_phy_82578) &&
3647 (hw->phy.revision >= 1) &&
3648 (hw->phy.addr == 2) &&
3649 ((MAX_PHY_REG_ADDRESS & reg) == 0) &&
3650 (data & (1 << 11))) {
3651 u16 data2 = 0x7EFF;
3652 ret_val = e1000_access_phy_debug_regs_hv(hw,
3653 (1 << 6) | 0x3,
3654 &data2, FALSE);
3655 if (ret_val)
3656 goto out;
3657 }
3378
3658
3379 /*
3380 * Workaround MDIO accesses being disabled after entering IEEE Power
3381 * Down (whenever bit 11 of the PHY Control register is set)
3382 */
3383 if ((hw->phy.type == e1000_phy_82578) &&
3384 (hw->phy.revision >= 1) &&
3385 (hw->phy.addr == 2) &&
3386 ((MAX_PHY_REG_ADDRESS & reg) == 0) &&
3387 (data & (1 << 11))) {
3388 u16 data2 = 0x7EFF;
3389 ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3,
3390 &data2, FALSE);
3391 if (ret_val)
3392 goto out;
3393 }
3659 if (reg > MAX_PHY_MULTI_PAGE_REG) {
3660 /* Page is shifted left, PHY expects (page x 32) */
3661 ret_val = e1000_set_page_igp(hw,
3662 (page << IGP_PAGE_SHIFT));
3394
3663
3395 if (reg > MAX_PHY_MULTI_PAGE_REG) {
3396 u32 phy_addr = hw->phy.addr;
3664 hw->phy.addr = phy_addr;
3397
3665
3398 hw->phy.addr = 1;
3399
3400 /* Page is shifted left, PHY expects (page x 32) */
3401 ret_val = e1000_write_phy_reg_mdic(hw,
3402 IGP01E1000_PHY_PAGE_SELECT,
3403 (page << IGP_PAGE_SHIFT));
3404 hw->phy.addr = phy_addr;
3405
3406 if (ret_val)
3407 goto out;
3666 if (ret_val)
3667 goto out;
3668 }
3408 }
3409
3669 }
3670
3671 DEBUGOUT3("writing PHY page %d (or 0x%x shifted) reg 0x%x\n", page,
3672 page << IGP_PAGE_SHIFT, reg);
3673
3410 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
3674 ret_val = e1000_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
3411 data);
3675 data);
3412
3413out:
3414 if (!locked)
3415 hw->phy.ops.release(hw);
3416
3417 return ret_val;
3418}
3419
3420/**
3421 * e1000_write_phy_reg_hv - Write HV PHY register
3422 * @hw: pointer to the HW structure
3423 * @offset: register offset to write to
3424 * @data: data to write at register offset
3425 *
3426 * Acquires semaphore then writes the data to PHY register at the offset.
3427 * Release the acquired semaphores before exiting.
3428 **/
3429s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
3430{
3676
3677out:
3678 if (!locked)
3679 hw->phy.ops.release(hw);
3680
3681 return ret_val;
3682}
3683
3684/**
3685 * e1000_write_phy_reg_hv - Write HV PHY register
3686 * @hw: pointer to the HW structure
3687 * @offset: register offset to write to
3688 * @data: data to write at register offset
3689 *
3690 * Acquires semaphore then writes the data to PHY register at the offset.
3691 * Release the acquired semaphores before exiting.
3692 **/
3693s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
3694{
3431 return __e1000_write_phy_reg_hv(hw, offset, data, FALSE);
3695 return __e1000_write_phy_reg_hv(hw, offset, data, FALSE, FALSE);
3432}
3433
3434/**
3435 * e1000_write_phy_reg_hv_locked - Write HV PHY register
3436 * @hw: pointer to the HW structure
3437 * @offset: register offset to write to
3438 * @data: data to write at register offset
3439 *
3440 * Writes the data to PHY register at the offset. Assumes semaphore
3441 * already acquired.
3442 **/
3443s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
3444{
3696}
3697
3698/**
3699 * e1000_write_phy_reg_hv_locked - Write HV PHY register
3700 * @hw: pointer to the HW structure
3701 * @offset: register offset to write to
3702 * @data: data to write at register offset
3703 *
3704 * Writes the data to PHY register at the offset. Assumes semaphore
3705 * already acquired.
3706 **/
3707s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
3708{
3445 return __e1000_write_phy_reg_hv(hw, offset, data, TRUE);
3709 return __e1000_write_phy_reg_hv(hw, offset, data, TRUE, FALSE);
3446}
3447
3448/**
3710}
3711
3712/**
3713 * e1000_write_phy_reg_page_hv - Write HV PHY register
3714 * @hw: pointer to the HW structure
3715 * @offset: register offset to write to
3716 * @data: data to write at register offset
3717 *
3718 * Writes the data to PHY register at the offset. Assumes semaphore
3719 * already acquired and page already set.
3720 **/
3721s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data)
3722{
3723 return __e1000_write_phy_reg_hv(hw, offset, data, TRUE, true);
3724}
3725
3726/**
3449 * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page
3450 * @page: page to be accessed
3451 **/
3452static u32 e1000_get_phy_addr_for_hv_page(u32 page)
3453{
3454 u32 phy_addr = 2;
3455
3456 if (page >= HV_INTC_FC_PAGE_START)
3457 phy_addr = 1;
3458
3459 return phy_addr;
3460}
3461
3462/**
3463 * e1000_access_phy_debug_regs_hv - Read HV PHY vendor specific high registers
3464 * @hw: pointer to the HW structure
3465 * @offset: register offset to be read or written
3466 * @data: pointer to the data to be read or written
3727 * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page
3728 * @page: page to be accessed
3729 **/
3730static u32 e1000_get_phy_addr_for_hv_page(u32 page)
3731{
3732 u32 phy_addr = 2;
3733
3734 if (page >= HV_INTC_FC_PAGE_START)
3735 phy_addr = 1;
3736
3737 return phy_addr;
3738}
3739
3740/**
3741 * e1000_access_phy_debug_regs_hv - Read HV PHY vendor specific high registers
3742 * @hw: pointer to the HW structure
3743 * @offset: register offset to be read or written
3744 * @data: pointer to the data to be read or written
3467 * @read: determines if operation is read or written
3745 * @read: determines if operation is read or write
3468 *
3469 * Reads the PHY register at offset and stores the retreived information
3470 * in data. Assumes semaphore already acquired. Note that the procedure
3746 *
3747 * Reads the PHY register at offset and stores the retreived information
3748 * in data. Assumes semaphore already acquired. Note that the procedure
3471 * to read these regs uses the address port and data port to read/write.
3749 * to access these regs uses the address port and data port to read/write.
3750 * These accesses done with PHY address 2 and without using pages.
3472 **/
3473static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
3751 **/
3752static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
3474 u16 *data, bool read)
3753 u16 *data, bool read)
3475{
3476 s32 ret_val;
3477 u32 addr_reg = 0;
3478 u32 data_reg = 0;
3479
3480 DEBUGFUNC("e1000_access_phy_debug_regs_hv");
3481
3482 /* This takes care of the difference with desktop vs mobile phy */
3483 addr_reg = (hw->phy.type == e1000_phy_82578) ?
3754{
3755 s32 ret_val;
3756 u32 addr_reg = 0;
3757 u32 data_reg = 0;
3758
3759 DEBUGFUNC("e1000_access_phy_debug_regs_hv");
3760
3761 /* This takes care of the difference with desktop vs mobile phy */
3762 addr_reg = (hw->phy.type == e1000_phy_82578) ?
3484 I82578_ADDR_REG : I82577_ADDR_REG;
3763 I82578_ADDR_REG : I82577_ADDR_REG;
3485 data_reg = addr_reg + 1;
3486
3487 /* All operations in this function are phy address 2 */
3488 hw->phy.addr = 2;
3489
3490 /* masking with 0x3F to remove the page from offset */
3491 ret_val = e1000_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F);
3492 if (ret_val) {
3764 data_reg = addr_reg + 1;
3765
3766 /* All operations in this function are phy address 2 */
3767 hw->phy.addr = 2;
3768
3769 /* masking with 0x3F to remove the page from offset */
3770 ret_val = e1000_write_phy_reg_mdic(hw, addr_reg, (u16)offset & 0x3F);
3771 if (ret_val) {
3493 DEBUGOUT("Could not write PHY the HV address register\n");
3772 DEBUGOUT("Could not write the Address Offset port register\n");
3494 goto out;
3495 }
3496
3497 /* Read or write the data value next */
3498 if (read)
3499 ret_val = e1000_read_phy_reg_mdic(hw, data_reg, data);
3500 else
3501 ret_val = e1000_write_phy_reg_mdic(hw, data_reg, *data);
3502
3503 if (ret_val) {
3773 goto out;
3774 }
3775
3776 /* Read or write the data value next */
3777 if (read)
3778 ret_val = e1000_read_phy_reg_mdic(hw, data_reg, data);
3779 else
3780 ret_val = e1000_write_phy_reg_mdic(hw, data_reg, *data);
3781
3782 if (ret_val) {
3504 DEBUGOUT("Could not read data value from HV data register\n");
3783 DEBUGOUT("Could not access the Data port register\n");
3505 goto out;
3506 }
3507
3508out:
3509 return ret_val;
3510}
3511
3512/**

--- 22 unchanged lines hidden (view full) ---

3535 if (data & PHY_CONTROL_LB)
3536 goto out;
3537
3538 /* check if link is up and at 1Gbps */
3539 ret_val = hw->phy.ops.read_reg(hw, BM_CS_STATUS, &data);
3540 if (ret_val)
3541 goto out;
3542
3784 goto out;
3785 }
3786
3787out:
3788 return ret_val;
3789}
3790
3791/**

--- 22 unchanged lines hidden (view full) ---

3814 if (data & PHY_CONTROL_LB)
3815 goto out;
3816
3817 /* check if link is up and at 1Gbps */
3818 ret_val = hw->phy.ops.read_reg(hw, BM_CS_STATUS, &data);
3819 if (ret_val)
3820 goto out;
3821
3543 data &= BM_CS_STATUS_LINK_UP |
3544 BM_CS_STATUS_RESOLVED |
3545 BM_CS_STATUS_SPEED_MASK;
3822 data &= BM_CS_STATUS_LINK_UP | BM_CS_STATUS_RESOLVED |
3823 BM_CS_STATUS_SPEED_MASK;
3546
3824
3547 if (data != (BM_CS_STATUS_LINK_UP |
3548 BM_CS_STATUS_RESOLVED |
3549 BM_CS_STATUS_SPEED_1000))
3825 if (data != (BM_CS_STATUS_LINK_UP | BM_CS_STATUS_RESOLVED |
3826 BM_CS_STATUS_SPEED_1000))
3550 goto out;
3551
3552 msec_delay(200);
3553
3554 /* flush the packets in the fifo buffer */
3555 ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,
3827 goto out;
3828
3829 msec_delay(200);
3830
3831 /* flush the packets in the fifo buffer */
3832 ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,
3556 HV_MUX_DATA_CTRL_GEN_TO_MAC |
3557 HV_MUX_DATA_CTRL_FORCE_SPEED);
3833 HV_MUX_DATA_CTRL_GEN_TO_MAC |
3834 HV_MUX_DATA_CTRL_FORCE_SPEED);
3558 if (ret_val)
3559 goto out;
3560
3561 ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,
3835 if (ret_val)
3836 goto out;
3837
3838 ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL,
3562 HV_MUX_DATA_CTRL_GEN_TO_MAC);
3839 HV_MUX_DATA_CTRL_GEN_TO_MAC);
3563
3564out:
3565 return ret_val;
3566}
3567
3568/**
3569 * e1000_check_polarity_82577 - Checks the polarity.
3570 * @hw: pointer to the HW structure

--- 9 unchanged lines hidden (view full) ---

3580 u16 data;
3581
3582 DEBUGFUNC("e1000_check_polarity_82577");
3583
3584 ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data);
3585
3586 if (!ret_val)
3587 phy->cable_polarity = (data & I82577_PHY_STATUS2_REV_POLARITY)
3840
3841out:
3842 return ret_val;
3843}
3844
3845/**
3846 * e1000_check_polarity_82577 - Checks the polarity.
3847 * @hw: pointer to the HW structure

--- 9 unchanged lines hidden (view full) ---

3857 u16 data;
3858
3859 DEBUGFUNC("e1000_check_polarity_82577");
3860
3861 ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data);
3862
3863 if (!ret_val)
3864 phy->cable_polarity = (data & I82577_PHY_STATUS2_REV_POLARITY)
3588 ? e1000_rev_polarity_reversed
3589 : e1000_rev_polarity_normal;
3865 ? e1000_rev_polarity_reversed
3866 : e1000_rev_polarity_normal;
3590
3591 return ret_val;
3592}
3593
3594/**
3595 * e1000_phy_force_speed_duplex_82577 - Force speed/duplex for I82577 PHY
3596 * @hw: pointer to the HW structure
3597 *

--- 18 unchanged lines hidden (view full) ---

3616 if (ret_val)
3617 goto out;
3618
3619 usec_delay(1);
3620
3621 if (phy->autoneg_wait_to_complete) {
3622 DEBUGOUT("Waiting for forced speed/duplex link on 82577 phy\n");
3623
3867
3868 return ret_val;
3869}
3870
3871/**
3872 * e1000_phy_force_speed_duplex_82577 - Force speed/duplex for I82577 PHY
3873 * @hw: pointer to the HW structure
3874 *

--- 18 unchanged lines hidden (view full) ---

3893 if (ret_val)
3894 goto out;
3895
3896 usec_delay(1);
3897
3898 if (phy->autoneg_wait_to_complete) {
3899 DEBUGOUT("Waiting for forced speed/duplex link on 82577 phy\n");
3900
3624 ret_val = e1000_phy_has_link_generic(hw,
3625 PHY_FORCE_LIMIT,
3626 100000,
3627 &link);
3901 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
3902 100000, &link);
3628 if (ret_val)
3629 goto out;
3630
3631 if (!link)
3632 DEBUGOUT("Link taking longer than expected.\n");
3633
3634 /* Try once more */
3903 if (ret_val)
3904 goto out;
3905
3906 if (!link)
3907 DEBUGOUT("Link taking longer than expected.\n");
3908
3909 /* Try once more */
3635 ret_val = e1000_phy_has_link_generic(hw,
3636 PHY_FORCE_LIMIT,
3637 100000,
3638 &link);
3910 ret_val = e1000_phy_has_link_generic(hw, PHY_FORCE_LIMIT,
3911 100000, &link);
3639 if (ret_val)
3640 goto out;
3641 }
3642
3643out:
3644 return ret_val;
3645}
3646

--- 43 unchanged lines hidden (view full) ---

3690 if (ret_val)
3691 goto out;
3692
3693 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
3694 if (ret_val)
3695 goto out;
3696
3697 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
3912 if (ret_val)
3913 goto out;
3914 }
3915
3916out:
3917 return ret_val;
3918}
3919

--- 43 unchanged lines hidden (view full) ---

3963 if (ret_val)
3964 goto out;
3965
3966 ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data);
3967 if (ret_val)
3968 goto out;
3969
3970 phy->local_rx = (data & SR_1000T_LOCAL_RX_STATUS)
3698 ? e1000_1000t_rx_status_ok
3699 : e1000_1000t_rx_status_not_ok;
3971 ? e1000_1000t_rx_status_ok
3972 : e1000_1000t_rx_status_not_ok;
3700
3701 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
3973
3974 phy->remote_rx = (data & SR_1000T_REMOTE_RX_STATUS)
3702 ? e1000_1000t_rx_status_ok
3703 : e1000_1000t_rx_status_not_ok;
3975 ? e1000_1000t_rx_status_ok
3976 : e1000_1000t_rx_status_not_ok;
3704 } else {
3705 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
3706 phy->local_rx = e1000_1000t_rx_status_undefined;
3707 phy->remote_rx = e1000_1000t_rx_status_undefined;
3708 }
3709
3710out:
3711 return ret_val;

--- 14 unchanged lines hidden (view full) ---

3726
3727 DEBUGFUNC("e1000_get_cable_length_82577");
3728
3729 ret_val = phy->ops.read_reg(hw, I82577_PHY_DIAG_STATUS, &phy_data);
3730 if (ret_val)
3731 goto out;
3732
3733 length = (phy_data & I82577_DSTATUS_CABLE_LENGTH) >>
3977 } else {
3978 phy->cable_length = E1000_CABLE_LENGTH_UNDEFINED;
3979 phy->local_rx = e1000_1000t_rx_status_undefined;
3980 phy->remote_rx = e1000_1000t_rx_status_undefined;
3981 }
3982
3983out:
3984 return ret_val;

--- 14 unchanged lines hidden (view full) ---

3999
4000 DEBUGFUNC("e1000_get_cable_length_82577");
4001
4002 ret_val = phy->ops.read_reg(hw, I82577_PHY_DIAG_STATUS, &phy_data);
4003 if (ret_val)
4004 goto out;
4005
4006 length = (phy_data & I82577_DSTATUS_CABLE_LENGTH) >>
3734 I82577_DSTATUS_CABLE_LENGTH_SHIFT;
4007 I82577_DSTATUS_CABLE_LENGTH_SHIFT;
3735
3736 if (length == E1000_CABLE_LENGTH_UNDEFINED)
3737 ret_val = -E1000_ERR_PHY;
3738
3739 phy->cable_length = length;
3740
3741out:
3742 return ret_val;
3743}
4008
4009 if (length == E1000_CABLE_LENGTH_UNDEFINED)
4010 ret_val = -E1000_ERR_PHY;
4011
4012 phy->cable_length = length;
4013
4014out:
4015 return ret_val;
4016}