| socfpga-sockit-beri.dts (273380) | socfpga-sockit-beri.dts (273469) |
|---|---|
| 1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * | 1/*- 2 * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * --- 13 unchanged lines hidden (view full) --- 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * |
| 30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts 273380 2014-10-21 09:14:16Z br $ | 30 * $FreeBSD: head/sys/boot/fdt/dts/arm/socfpga-sockit-beri.dts 273469 2014-10-22 11:30:03Z br $ |
| 31 */ 32 33/dts-v1/; 34 35/include/ "socfpga.dtsi" 36 37/ { 38 model = "Terasic SoCKit"; --- 37 unchanged lines hidden (view full) --- 76 bus-frequency = <25000000>; 77 78 slot@0 { 79 reg = <0>; 80 bus-width = <4>; 81 }; 82 }; 83 | 31 */ 32 33/dts-v1/; 34 35/include/ "socfpga.dtsi" 36 37/ { 38 model = "Terasic SoCKit"; --- 37 unchanged lines hidden (view full) --- 76 bus-frequency = <25000000>; 77 78 slot@0 { 79 reg = <0>; 80 bus-width = <4>; 81 }; 82 }; 83 |
| 84 beri_mem: mem@d0000000 { 85 compatible = "sri-cambridge,beri-mem"; 86 reg = <0xd0000000 0x10000000>; 87 status = "okay"; 88 }; 89 |
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| 84 beri_debug: ring@c0000000 { 85 compatible = "sri-cambridge,beri-ring"; 86 reg = <0xc0000000 0x3000>; 87 interrupts = < 72 73 >; 88 interrupt-parent = <&GIC>; 89 device_name = "beri_debug"; 90 data_size = <0x1000>; 91 data_read = <0x0>; --- 27 unchanged lines hidden --- | 90 beri_debug: ring@c0000000 { 91 compatible = "sri-cambridge,beri-ring"; 92 reg = <0xc0000000 0x3000>; 93 interrupts = < 72 73 >; 94 interrupt-parent = <&GIC>; 95 device_name = "beri_debug"; 96 data_size = <0x1000>; 97 data_read = <0x0>; --- 27 unchanged lines hidden --- |