| cpufunc.h (243576) | cpufunc.h (244480) |
|---|---|
| 1/* $NetBSD: cpufunc.h,v 1.29 2003/09/06 09:08:35 rearnsha Exp $ */ 2 3/*- 4 * Copyright (c) 1997 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 24 unchanged lines hidden (view full) --- 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * cpufunc.h 38 * 39 * Prototypes for cpu, mmu and tlb related functions. 40 * | 1/* $NetBSD: cpufunc.h,v 1.29 2003/09/06 09:08:35 rearnsha Exp $ */ 2 3/*- 4 * Copyright (c) 1997 Mark Brinicombe. 5 * Copyright (c) 1997 Causality Limited 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 24 unchanged lines hidden (view full) --- 33 * SUCH DAMAGE. 34 * 35 * RiscBSD kernel project 36 * 37 * cpufunc.h 38 * 39 * Prototypes for cpu, mmu and tlb related functions. 40 * |
| 41 * $FreeBSD: head/sys/arm/include/cpufunc.h 243576 2012-11-27 00:41:39Z marcel $ | 41 * $FreeBSD: head/sys/arm/include/cpufunc.h 244480 2012-12-20 04:32:02Z gonzo $ |
| 42 */ 43 44#ifndef _MACHINE_CPUFUNC_H_ 45#define _MACHINE_CPUFUNC_H_ 46 47#ifdef _KERNEL 48 49#include <sys/types.h> --- 407 unchanged lines hidden (view full) --- 457void sheeva_idcache_wbinv_range (vm_offset_t, vm_size_t); 458 459void sheeva_l2cache_wbinv_range (vm_offset_t, vm_size_t); 460void sheeva_l2cache_inv_range (vm_offset_t, vm_size_t); 461void sheeva_l2cache_wb_range (vm_offset_t, vm_size_t); 462void sheeva_l2cache_wbinv_all (void); 463#endif 464 | 42 */ 43 44#ifndef _MACHINE_CPUFUNC_H_ 45#define _MACHINE_CPUFUNC_H_ 46 47#ifdef _KERNEL 48 49#include <sys/types.h> --- 407 unchanged lines hidden (view full) --- 457void sheeva_idcache_wbinv_range (vm_offset_t, vm_size_t); 458 459void sheeva_l2cache_wbinv_range (vm_offset_t, vm_size_t); 460void sheeva_l2cache_inv_range (vm_offset_t, vm_size_t); 461void sheeva_l2cache_wb_range (vm_offset_t, vm_size_t); 462void sheeva_l2cache_wbinv_all (void); 463#endif 464 |
| 465#if defined(CPU_ARM11) || defined(CPU_MV_PJ4B) || defined(CPU_CORTEXA) | 465#if defined(CPU_ARM1136) || defined(CPU_ARM1176) || \ 466 defined(CPU_MV_PJ4B) || defined(CPU_CORTEXA) |
| 466void arm11_setttb (u_int); 467void arm11_sleep (int); 468 469void arm11_tlb_flushID_SE (u_int); 470void arm11_tlb_flushI_SE (u_int); 471 472void arm11_context_switch (void); 473 --- 53 unchanged lines hidden (view full) --- 527 528int get_core_id (void); 529 530void armadaxp_idcache_wbinv_all (void); 531 532void cortexa_setup (char *); 533#endif 534 | 467void arm11_setttb (u_int); 468void arm11_sleep (int); 469 470void arm11_tlb_flushID_SE (u_int); 471void arm11_tlb_flushI_SE (u_int); 472 473void arm11_context_switch (void); 474 --- 53 unchanged lines hidden (view full) --- 528 529int get_core_id (void); 530 531void armadaxp_idcache_wbinv_all (void); 532 533void cortexa_setup (char *); 534#endif 535 |
| 536#if defined(CPU_ARM1136) || defined(CPU_ARM1176) 537void arm11x6_setttb (u_int); 538void arm11x6_idcache_wbinv_all (void); 539void arm11x6_dcache_wbinv_all (void); 540void arm11x6_icache_sync_all (void); 541void arm11x6_flush_prefetchbuf (void); 542void arm11x6_icache_sync_range (vm_offset_t, vm_size_t); 543void arm11x6_idcache_wbinv_range (vm_offset_t, vm_size_t); 544void arm11x6_setup (char *string); 545void arm11x6_sleep (int); /* no ref. for errata */ 546#endif 547#if defined(CPU_ARM1136) 548void arm1136_sleep_rev0 (int); /* for errata 336501 */ 549#endif 550 |
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| 535#if defined(CPU_ARM9E) || defined (CPU_ARM10) 536void armv5_ec_setttb(u_int); 537 538void armv5_ec_icache_sync_all(void); 539void armv5_ec_icache_sync_range(vm_offset_t, vm_size_t); 540 541void armv5_ec_dcache_wbinv_all(void); 542void armv5_ec_dcache_wbinv_range(vm_offset_t, vm_size_t); --- 222 unchanged lines hidden --- | 551#if defined(CPU_ARM9E) || defined (CPU_ARM10) 552void armv5_ec_setttb(u_int); 553 554void armv5_ec_icache_sync_all(void); 555void armv5_ec_icache_sync_range(vm_offset_t, vm_size_t); 556 557void armv5_ec_dcache_wbinv_all(void); 558void armv5_ec_dcache_wbinv_range(vm_offset_t, vm_size_t); --- 222 unchanged lines hidden --- |