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if_rl.c (131605) if_rl.c (131606)
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 17 unchanged lines hidden (view full) ---

26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 131605 2004-07-05 02:46:42Z bms $");
34__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 131606 2004-07-05 02:51:32Z bms $");
35
36/*
37 * RealTek 8129/8139 PCI NIC driver
38 *
39 * Supports several extremely cheap PCI 10/100 adapters based on
40 * the RealTek chipset. Datasheets can be obtained from
41 * www.realtek.com.tw.
42 *

--- 494 unchanged lines hidden (view full) ---

537rl_miibus_readreg(device_t dev, int phy, int reg)
538{
539 struct rl_softc *sc;
540 struct rl_mii_frame frame;
541 uint16_t rval = 0;
542 uint16_t rl8139_reg = 0;
543
544 sc = device_get_softc(dev);
35
36/*
37 * RealTek 8129/8139 PCI NIC driver
38 *
39 * Supports several extremely cheap PCI 10/100 adapters based on
40 * the RealTek chipset. Datasheets can be obtained from
41 * www.realtek.com.tw.
42 *

--- 494 unchanged lines hidden (view full) ---

537rl_miibus_readreg(device_t dev, int phy, int reg)
538{
539 struct rl_softc *sc;
540 struct rl_mii_frame frame;
541 uint16_t rval = 0;
542 uint16_t rl8139_reg = 0;
543
544 sc = device_get_softc(dev);
545 RL_LOCK(sc);
546
547 if (sc->rl_type == RL_8139) {
548 /* Pretend the internal PHY is only at address 0 */
549 if (phy) {
545
546 if (sc->rl_type == RL_8139) {
547 /* Pretend the internal PHY is only at address 0 */
548 if (phy) {
550 RL_UNLOCK(sc);
551 return (0);
552 }
553 switch (reg) {
554 case MII_BMCR:
555 rl8139_reg = RL_BMCR;
556 break;
557 case MII_BMSR:
558 rl8139_reg = RL_BMSR;

--- 4 unchanged lines hidden (view full) ---

563 case MII_ANER:
564 rl8139_reg = RL_ANER;
565 break;
566 case MII_ANLPAR:
567 rl8139_reg = RL_LPAR;
568 break;
569 case MII_PHYIDR1:
570 case MII_PHYIDR2:
549 return (0);
550 }
551 switch (reg) {
552 case MII_BMCR:
553 rl8139_reg = RL_BMCR;
554 break;
555 case MII_BMSR:
556 rl8139_reg = RL_BMSR;

--- 4 unchanged lines hidden (view full) ---

561 case MII_ANER:
562 rl8139_reg = RL_ANER;
563 break;
564 case MII_ANLPAR:
565 rl8139_reg = RL_LPAR;
566 break;
567 case MII_PHYIDR1:
568 case MII_PHYIDR2:
571 RL_UNLOCK(sc);
572 return (0);
573 /*
574 * Allow the rlphy driver to read the media status
575 * register. If we have a link partner which does not
576 * support NWAY, this is the register which will tell
577 * us the results of parallel detection.
578 */
579 case RL_MEDIASTAT:
580 rval = CSR_READ_1(sc, RL_MEDIASTAT);
569 return (0);
570 /*
571 * Allow the rlphy driver to read the media status
572 * register. If we have a link partner which does not
573 * support NWAY, this is the register which will tell
574 * us the results of parallel detection.
575 */
576 case RL_MEDIASTAT:
577 rval = CSR_READ_1(sc, RL_MEDIASTAT);
581 RL_UNLOCK(sc);
582 return (rval);
583 default:
584 if_printf(&sc->arpcom.ac_if, "bad phy register\n");
578 return (rval);
579 default:
580 if_printf(&sc->arpcom.ac_if, "bad phy register\n");
585 RL_UNLOCK(sc);
586 return (0);
587 }
588 rval = CSR_READ_2(sc, rl8139_reg);
581 return (0);
582 }
583 rval = CSR_READ_2(sc, rl8139_reg);
589 RL_UNLOCK(sc);
590 return (rval);
591 }
592
593 bzero((char *)&frame, sizeof(frame));
594 frame.mii_phyaddr = phy;
595 frame.mii_regaddr = reg;
596 rl_mii_readreg(sc, &frame);
597
584 return (rval);
585 }
586
587 bzero((char *)&frame, sizeof(frame));
588 frame.mii_phyaddr = phy;
589 frame.mii_regaddr = reg;
590 rl_mii_readreg(sc, &frame);
591
598 RL_UNLOCK(sc);
599
600 return (frame.mii_data);
601}
602
603static int
604rl_miibus_writereg(device_t dev, int phy, int reg, int data)
605{
606 struct rl_softc *sc;
607 struct rl_mii_frame frame;
608 uint16_t rl8139_reg = 0;
609
610 sc = device_get_softc(dev);
592 return (frame.mii_data);
593}
594
595static int
596rl_miibus_writereg(device_t dev, int phy, int reg, int data)
597{
598 struct rl_softc *sc;
599 struct rl_mii_frame frame;
600 uint16_t rl8139_reg = 0;
601
602 sc = device_get_softc(dev);
611 RL_LOCK(sc);
612
613 if (sc->rl_type == RL_8139) {
614 /* Pretend the internal PHY is only at address 0 */
615 if (phy) {
603
604 if (sc->rl_type == RL_8139) {
605 /* Pretend the internal PHY is only at address 0 */
606 if (phy) {
616 RL_UNLOCK(sc);
617 return (0);
618 }
619 switch (reg) {
620 case MII_BMCR:
621 rl8139_reg = RL_BMCR;
622 break;
623 case MII_BMSR:
624 rl8139_reg = RL_BMSR;

--- 4 unchanged lines hidden (view full) ---

629 case MII_ANER:
630 rl8139_reg = RL_ANER;
631 break;
632 case MII_ANLPAR:
633 rl8139_reg = RL_LPAR;
634 break;
635 case MII_PHYIDR1:
636 case MII_PHYIDR2:
607 return (0);
608 }
609 switch (reg) {
610 case MII_BMCR:
611 rl8139_reg = RL_BMCR;
612 break;
613 case MII_BMSR:
614 rl8139_reg = RL_BMSR;

--- 4 unchanged lines hidden (view full) ---

619 case MII_ANER:
620 rl8139_reg = RL_ANER;
621 break;
622 case MII_ANLPAR:
623 rl8139_reg = RL_LPAR;
624 break;
625 case MII_PHYIDR1:
626 case MII_PHYIDR2:
637 RL_UNLOCK(sc);
638 return (0);
639 break;
640 default:
641 if_printf(&sc->arpcom.ac_if, "bad phy register\n");
627 return (0);
628 break;
629 default:
630 if_printf(&sc->arpcom.ac_if, "bad phy register\n");
642 RL_UNLOCK(sc);
643 return (0);
644 }
645 CSR_WRITE_2(sc, rl8139_reg, data);
631 return (0);
632 }
633 CSR_WRITE_2(sc, rl8139_reg, data);
646 RL_UNLOCK(sc);
647 return (0);
648 }
649
650 bzero((char *)&frame, sizeof(frame));
651 frame.mii_phyaddr = phy;
652 frame.mii_regaddr = reg;
653 frame.mii_data = data;
654 rl_mii_writereg(sc, &frame);
655
634 return (0);
635 }
636
637 bzero((char *)&frame, sizeof(frame));
638 frame.mii_phyaddr = phy;
639 frame.mii_regaddr = reg;
640 frame.mii_data = data;
641 rl_mii_writereg(sc, &frame);
642
656 RL_UNLOCK(sc);
657
658 return (0);
659}
660
661static void
662rl_miibus_statchg(device_t dev)
663{
664}
665

--- 5 unchanged lines hidden (view full) ---

671{
672 struct ifnet *ifp = &sc->arpcom.ac_if;
673 int h = 0;
674 uint32_t hashes[2] = { 0, 0 };
675 struct ifmultiaddr *ifma;
676 uint32_t rxfilt;
677 int mcnt = 0;
678
643 return (0);
644}
645
646static void
647rl_miibus_statchg(device_t dev)
648{
649}
650

--- 5 unchanged lines hidden (view full) ---

656{
657 struct ifnet *ifp = &sc->arpcom.ac_if;
658 int h = 0;
659 uint32_t hashes[2] = { 0, 0 };
660 struct ifmultiaddr *ifma;
661 uint32_t rxfilt;
662 int mcnt = 0;
663
664 RL_LOCK_ASSERT(sc);
665
679 rxfilt = CSR_READ_4(sc, RL_RXCFG);
680
681 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
682 rxfilt |= RL_RXCFG_RX_MULTI;
683 CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
684 CSR_WRITE_4(sc, RL_MAR0, 0xFFFFFFFF);
685 CSR_WRITE_4(sc, RL_MAR4, 0xFFFFFFFF);
686 return;

--- 26 unchanged lines hidden (view full) ---

713 CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
714}
715
716static void
717rl_reset(struct rl_softc *sc)
718{
719 register int i;
720
666 rxfilt = CSR_READ_4(sc, RL_RXCFG);
667
668 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
669 rxfilt |= RL_RXCFG_RX_MULTI;
670 CSR_WRITE_4(sc, RL_RXCFG, rxfilt);
671 CSR_WRITE_4(sc, RL_MAR0, 0xFFFFFFFF);
672 CSR_WRITE_4(sc, RL_MAR4, 0xFFFFFFFF);
673 return;

--- 26 unchanged lines hidden (view full) ---

700 CSR_WRITE_4(sc, RL_MAR4, hashes[1]);
701}
702
703static void
704rl_reset(struct rl_softc *sc)
705{
706 register int i;
707
708 RL_LOCK_ASSERT(sc);
709
721 CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RESET);
722
723 for (i = 0; i < RL_TIMEOUT; i++) {
724 DELAY(10);
725 if (!(CSR_READ_1(sc, RL_COMMAND) & RL_CMD_RESET))
726 break;
727 }
728 if (i == RL_TIMEOUT)

--- 27 unchanged lines hidden (view full) ---

756 if (sc->rl_res == NULL) {
757 device_printf(dev,
758 "couldn't map ports/memory\n");
759 return (ENXIO);
760 }
761 sc->rl_btag = rman_get_bustag(sc->rl_res);
762 sc->rl_bhandle = rman_get_bushandle(sc->rl_res);
763
710 CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RESET);
711
712 for (i = 0; i < RL_TIMEOUT; i++) {
713 DELAY(10);
714 if (!(CSR_READ_1(sc, RL_COMMAND) & RL_CMD_RESET))
715 break;
716 }
717 if (i == RL_TIMEOUT)

--- 27 unchanged lines hidden (view full) ---

745 if (sc->rl_res == NULL) {
746 device_printf(dev,
747 "couldn't map ports/memory\n");
748 return (ENXIO);
749 }
750 sc->rl_btag = rman_get_bustag(sc->rl_res);
751 sc->rl_bhandle = rman_get_bushandle(sc->rl_res);
752
764 mtx_init(&sc->rl_mtx,
765 device_get_nameunit(dev),
766 MTX_NETWORK_LOCK, MTX_DEF);
767 RL_LOCK(sc);
768
769 hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
770 bus_release_resource(dev, RL_RES, RL_RID, sc->rl_res);
771
753 hwrev = CSR_READ_4(sc, RL_TXCFG) & RL_TXCFG_HWREV;
754 bus_release_resource(dev, RL_RES, RL_RID, sc->rl_res);
755
772 RL_UNLOCK(sc);
773 mtx_destroy(&sc->rl_mtx);
774
775 /* Don't attach to 8139C+ or 8169/8110 chips. */
776 if (hwrev == RL_HWREV_8139CPLUS ||
777 (hwrev == RL_HWREV_8169 &&
778 t->rl_did == RT_DEVICEID_8169) ||
779 hwrev == RL_HWREV_8169S ||
780 hwrev == RL_HWREV_8110S) {
781 t++;
782 continue;

--- 23 unchanged lines hidden (view full) ---

806 int error = 0, i, rid;
807 int unit;
808 uint16_t rl_did = 0;
809
810 sc = device_get_softc(dev);
811 unit = device_get_unit(dev);
812
813 mtx_init(&sc->rl_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
756 /* Don't attach to 8139C+ or 8169/8110 chips. */
757 if (hwrev == RL_HWREV_8139CPLUS ||
758 (hwrev == RL_HWREV_8169 &&
759 t->rl_did == RT_DEVICEID_8169) ||
760 hwrev == RL_HWREV_8169S ||
761 hwrev == RL_HWREV_8110S) {
762 t++;
763 continue;

--- 23 unchanged lines hidden (view full) ---

787 int error = 0, i, rid;
788 int unit;
789 uint16_t rl_did = 0;
790
791 sc = device_get_softc(dev);
792 unit = device_get_unit(dev);
793
794 mtx_init(&sc->rl_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
814 MTX_DEF | MTX_RECURSE);
795 MTX_DEF);
815
816 pci_enable_busmaster(dev);
817
818 /* Map control/status registers. */
819 rid = RL_RID;
820 sc->rl_res = bus_alloc_resource_any(dev, RL_RES, &rid, RF_ACTIVE);
821
822 if (sc->rl_res == NULL) {

--- 23 unchanged lines hidden (view full) ---

846 RF_SHAREABLE | RF_ACTIVE);
847
848 if (sc->rl_irq == NULL) {
849 device_printf(dev, "couldn't map interrupt\n");
850 error = ENXIO;
851 goto fail;
852 }
853
796
797 pci_enable_busmaster(dev);
798
799 /* Map control/status registers. */
800 rid = RL_RID;
801 sc->rl_res = bus_alloc_resource_any(dev, RL_RES, &rid, RF_ACTIVE);
802
803 if (sc->rl_res == NULL) {

--- 23 unchanged lines hidden (view full) ---

827 RF_SHAREABLE | RF_ACTIVE);
828
829 if (sc->rl_irq == NULL) {
830 device_printf(dev, "couldn't map interrupt\n");
831 error = ENXIO;
832 goto fail;
833 }
834
854 /* Reset the adapter. */
835 /*
836 * Reset the adapter. Only take the lock here as it's needed in
837 * order to call rl_reset().
838 */
839 RL_LOCK(sc);
855 rl_reset(sc);
840 rl_reset(sc);
841 RL_UNLOCK(sc);
842
856 sc->rl_eecmd_read = RL_EECMD_READ_6BIT;
857 rl_read_eeprom(sc, (uint8_t *)&rl_did, 0, 1, 0);
858 if (rl_did != 0x8129)
859 sc->rl_eecmd_read = RL_EECMD_READ_8BIT;
860
861 /*
862 * Get station address from the EEPROM.
863 */

--- 111 unchanged lines hidden (view full) ---

975 callout_handle_init(&sc->rl_stat_ch);
976
977 /*
978 * Call MI attach routine.
979 */
980 ether_ifattach(ifp, eaddr);
981
982 /* Hook interrupt last to avoid having to lock softc */
843 sc->rl_eecmd_read = RL_EECMD_READ_6BIT;
844 rl_read_eeprom(sc, (uint8_t *)&rl_did, 0, 1, 0);
845 if (rl_did != 0x8129)
846 sc->rl_eecmd_read = RL_EECMD_READ_8BIT;
847
848 /*
849 * Get station address from the EEPROM.
850 */

--- 111 unchanged lines hidden (view full) ---

962 callout_handle_init(&sc->rl_stat_ch);
963
964 /*
965 * Call MI attach routine.
966 */
967 ether_ifattach(ifp, eaddr);
968
969 /* Hook interrupt last to avoid having to lock softc */
983 error = bus_setup_intr(dev, sc->rl_irq, INTR_TYPE_NET,
970 error = bus_setup_intr(dev, sc->rl_irq, INTR_TYPE_NET | INTR_MPSAFE,
984 rl_intr, sc, &sc->rl_intrhand);
971 rl_intr, sc, &sc->rl_intrhand);
985
986 if (error) {
987 if_printf(ifp, "couldn't set up irq\n");
988 ether_ifdetach(ifp);
972 if (error) {
973 if_printf(ifp, "couldn't set up irq\n");
974 ether_ifdetach(ifp);
989 goto fail;
990 }
991
992fail:
993 if (error)
994 rl_detach(dev);
995
996 return (error);
997}

--- 11 unchanged lines hidden (view full) ---

1009 struct rl_softc *sc;
1010 struct ifnet *ifp;
1011
1012 sc = device_get_softc(dev);
1013 ifp = &sc->arpcom.ac_if;
1014
1015 KASSERT(mtx_initialized(&sc->rl_mtx), ("rl mutex not initialized"));
1016 RL_LOCK(sc);
975 }
976
977fail:
978 if (error)
979 rl_detach(dev);
980
981 return (error);
982}

--- 11 unchanged lines hidden (view full) ---

994 struct rl_softc *sc;
995 struct ifnet *ifp;
996
997 sc = device_get_softc(dev);
998 ifp = &sc->arpcom.ac_if;
999
1000 KASSERT(mtx_initialized(&sc->rl_mtx), ("rl mutex not initialized"));
1001 RL_LOCK(sc);
1002#if 0
1003 sc->suspended = 1;
1004#endif
1017
1018 /* These should only be active if attach succeeded */
1019 if (device_is_attached(dev)) {
1020 rl_stop(sc);
1021 ether_ifdetach(ifp);
1022 }
1023 if (sc->rl_miibus)
1024 device_delete_child(dev, sc->rl_miibus);

--- 25 unchanged lines hidden (view full) ---

1050 * Initialize the transmit descriptors.
1051 */
1052static int
1053rl_list_tx_init(struct rl_softc *sc)
1054{
1055 struct rl_chain_data *cd;
1056 int i;
1057
1005
1006 /* These should only be active if attach succeeded */
1007 if (device_is_attached(dev)) {
1008 rl_stop(sc);
1009 ether_ifdetach(ifp);
1010 }
1011 if (sc->rl_miibus)
1012 device_delete_child(dev, sc->rl_miibus);

--- 25 unchanged lines hidden (view full) ---

1038 * Initialize the transmit descriptors.
1039 */
1040static int
1041rl_list_tx_init(struct rl_softc *sc)
1042{
1043 struct rl_chain_data *cd;
1044 int i;
1045
1046 RL_LOCK_ASSERT(sc);
1047
1058 cd = &sc->rl_cdata;
1059 for (i = 0; i < RL_TX_LIST_CNT; i++) {
1060 cd->rl_tx_chain[i] = NULL;
1061 CSR_WRITE_4(sc,
1062 RL_TXADDR0 + (i * sizeof(uint32_t)), 0x0000000);
1063 }
1064
1065 sc->rl_cdata.cur_tx = 0;

--- 142 unchanged lines hidden (view full) ---

1208 * the list buffers.
1209 */
1210static void
1211rl_txeof(struct rl_softc *sc)
1212{
1213 struct ifnet *ifp = &sc->arpcom.ac_if;
1214 uint32_t txstat;
1215
1048 cd = &sc->rl_cdata;
1049 for (i = 0; i < RL_TX_LIST_CNT; i++) {
1050 cd->rl_tx_chain[i] = NULL;
1051 CSR_WRITE_4(sc,
1052 RL_TXADDR0 + (i * sizeof(uint32_t)), 0x0000000);
1053 }
1054
1055 sc->rl_cdata.cur_tx = 0;

--- 142 unchanged lines hidden (view full) ---

1198 * the list buffers.
1199 */
1200static void
1201rl_txeof(struct rl_softc *sc)
1202{
1203 struct ifnet *ifp = &sc->arpcom.ac_if;
1204 uint32_t txstat;
1205
1206 RL_LOCK_ASSERT(sc);
1207
1216 /*
1217 * Go through our tx list and free mbufs for those
1218 * frames that have been uploaded.
1219 */
1220 do {
1221 if (RL_LAST_TXMBUF(sc) == NULL)
1222 break;
1223 txstat = CSR_READ_4(sc, RL_LAST_TXSTAT(sc));

--- 69 unchanged lines hidden (view full) ---

1293 CSR_WRITE_2(sc, RL_IMR, RL_INTRS);
1294 goto done;
1295 }
1296
1297 sc->rxcycles = count;
1298 rl_rxeof(sc);
1299 rl_txeof(sc);
1300
1208 /*
1209 * Go through our tx list and free mbufs for those
1210 * frames that have been uploaded.
1211 */
1212 do {
1213 if (RL_LAST_TXMBUF(sc) == NULL)
1214 break;
1215 txstat = CSR_READ_4(sc, RL_LAST_TXSTAT(sc));

--- 69 unchanged lines hidden (view full) ---

1285 CSR_WRITE_2(sc, RL_IMR, RL_INTRS);
1286 goto done;
1287 }
1288
1289 sc->rxcycles = count;
1290 rl_rxeof(sc);
1291 rl_txeof(sc);
1292
1301 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1293 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
1294 RL_UNLOCK(sc);
1302 rl_start(ifp);
1295 rl_start(ifp);
1296 RL_LOCK(sc);
1297 }
1303
1304 if (cmd == POLL_AND_CHECK_STATUS) {
1305 uint16_t status;
1306
1307 /* We should also check the status register. */
1308 status = CSR_READ_2(sc, RL_ISR);
1309 if (status == 0xffff)
1310 goto done;
1311 if (status != 0)
1312 CSR_WRITE_2(sc, RL_ISR, status);
1313
1314 /* XXX We should check behaviour on receiver stalls. */
1315
1316 if (status & RL_ISR_SYSTEM_ERR) {
1317 rl_reset(sc);
1298
1299 if (cmd == POLL_AND_CHECK_STATUS) {
1300 uint16_t status;
1301
1302 /* We should also check the status register. */
1303 status = CSR_READ_2(sc, RL_ISR);
1304 if (status == 0xffff)
1305 goto done;
1306 if (status != 0)
1307 CSR_WRITE_2(sc, RL_ISR, status);
1308
1309 /* XXX We should check behaviour on receiver stalls. */
1310
1311 if (status & RL_ISR_SYSTEM_ERR) {
1312 rl_reset(sc);
1313 RL_UNLOCK(sc);
1318 rl_init(sc);
1314 rl_init(sc);
1315 RL_LOCK(sc);
1319 }
1320 }
1321done:
1322 RL_UNLOCK(sc);
1323}
1324#endif /* DEVICE_POLLING */
1325
1326static void
1327rl_intr(void *arg)
1328{
1329 struct rl_softc *sc = arg;
1316 }
1317 }
1318done:
1319 RL_UNLOCK(sc);
1320}
1321#endif /* DEVICE_POLLING */
1322
1323static void
1324rl_intr(void *arg)
1325{
1326 struct rl_softc *sc = arg;
1330 struct ifnet *ifp;
1327 struct ifnet *ifp = &sc->arpcom.ac_if;
1331 uint16_t status;
1332
1328 uint16_t status;
1329
1333 if (sc->suspended)
1334 return;
1335
1336 RL_LOCK(sc);
1330 RL_LOCK(sc);
1337 ifp = &sc->arpcom.ac_if;
1338
1331
1332 if (sc->suspended) {
1333 RL_UNLOCK(sc);
1334 return;
1335 }
1336
1339#ifdef DEVICE_POLLING
1337#ifdef DEVICE_POLLING
1340 if (ifp->if_flags & IFF_POLLING)
1341 goto done;
1338 if (ifp->if_flags & IFF_POLLING) {
1339 RL_UNLOCK(sc);
1340 return;
1341 }
1342 if ((ifp->if_capenable & IFCAP_POLLING) &&
1343 ether_poll_register(rl_poll, ifp)) {
1344 /* Disable interrupts. */
1345 CSR_WRITE_2(sc, RL_IMR, 0x0000);
1342 if ((ifp->if_capenable & IFCAP_POLLING) &&
1343 ether_poll_register(rl_poll, ifp)) {
1344 /* Disable interrupts. */
1345 CSR_WRITE_2(sc, RL_IMR, 0x0000);
1346 RL_UNLOCK(sc);
1346 rl_poll(ifp, 0, 1);
1347 rl_poll(ifp, 0, 1);
1347 goto done;
1348 return;
1348 }
1349#endif /* DEVICE_POLLING */
1350
1351 for (;;) {
1352 status = CSR_READ_2(sc, RL_ISR);
1353 /* If the card has gone away, the read returns 0xffff. */
1354 if (status == 0xffff)
1355 break;

--- 4 unchanged lines hidden (view full) ---

1360 if (status & RL_ISR_RX_OK)
1361 rl_rxeof(sc);
1362 if (status & RL_ISR_RX_ERR)
1363 rl_rxeof(sc);
1364 if ((status & RL_ISR_TX_OK) || (status & RL_ISR_TX_ERR))
1365 rl_txeof(sc);
1366 if (status & RL_ISR_SYSTEM_ERR) {
1367 rl_reset(sc);
1349 }
1350#endif /* DEVICE_POLLING */
1351
1352 for (;;) {
1353 status = CSR_READ_2(sc, RL_ISR);
1354 /* If the card has gone away, the read returns 0xffff. */
1355 if (status == 0xffff)
1356 break;

--- 4 unchanged lines hidden (view full) ---

1361 if (status & RL_ISR_RX_OK)
1362 rl_rxeof(sc);
1363 if (status & RL_ISR_RX_ERR)
1364 rl_rxeof(sc);
1365 if ((status & RL_ISR_TX_OK) || (status & RL_ISR_TX_ERR))
1366 rl_txeof(sc);
1367 if (status & RL_ISR_SYSTEM_ERR) {
1368 rl_reset(sc);
1369 RL_UNLOCK(sc);
1368 rl_init(sc);
1370 rl_init(sc);
1371 RL_LOCK(sc);
1369 }
1370 }
1371
1372 }
1373 }
1374
1375 RL_UNLOCK(sc);
1376
1372 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1373 rl_start(ifp);
1377 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
1378 rl_start(ifp);
1374
1375#ifdef DEVICE_POLLING
1376done:
1377#endif
1378 RL_UNLOCK(sc);
1379}
1380
1381/*
1382 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1383 * pointers to the fragment pointers.
1384 */
1385static int
1386rl_encap(struct rl_softc *sc, struct mbuf *m_head)
1387{
1388 struct mbuf *m_new = NULL;
1389
1379}
1380
1381/*
1382 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1383 * pointers to the fragment pointers.
1384 */
1385static int
1386rl_encap(struct rl_softc *sc, struct mbuf *m_head)
1387{
1388 struct mbuf *m_new = NULL;
1389
1390 RL_LOCK_ASSERT(sc);
1391
1390 /*
1391 * The RealTek is brain damaged and wants longword-aligned
1392 * TX buffers, plus we can only have one fragment buffer
1393 * per packet. We have to copy pretty much all the time.
1394 */
1395 m_new = m_defrag(m_head, M_DONTWAIT);
1396
1397 if (m_new == NULL) {

--- 212 unchanged lines hidden (view full) ---

1610static int
1611rl_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1612{
1613 struct ifreq *ifr = (struct ifreq *)data;
1614 struct mii_data *mii;
1615 struct rl_softc *sc = ifp->if_softc;
1616 int error = 0;
1617
1392 /*
1393 * The RealTek is brain damaged and wants longword-aligned
1394 * TX buffers, plus we can only have one fragment buffer
1395 * per packet. We have to copy pretty much all the time.
1396 */
1397 m_new = m_defrag(m_head, M_DONTWAIT);
1398
1399 if (m_new == NULL) {

--- 212 unchanged lines hidden (view full) ---

1612static int
1613rl_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1614{
1615 struct ifreq *ifr = (struct ifreq *)data;
1616 struct mii_data *mii;
1617 struct rl_softc *sc = ifp->if_softc;
1618 int error = 0;
1619
1618 RL_LOCK(sc);
1619
1620 switch (command) {
1621 case SIOCSIFFLAGS:
1622 if (ifp->if_flags & IFF_UP) {
1623 rl_init(sc);
1624 } else {
1625 if (ifp->if_flags & IFF_RUNNING)
1620 switch (command) {
1621 case SIOCSIFFLAGS:
1622 if (ifp->if_flags & IFF_UP) {
1623 rl_init(sc);
1624 } else {
1625 if (ifp->if_flags & IFF_RUNNING)
1626 RL_LOCK(sc);
1626 rl_stop(sc);
1627 rl_stop(sc);
1628 RL_UNLOCK(sc);
1627 }
1628 error = 0;
1629 break;
1630 case SIOCADDMULTI:
1631 case SIOCDELMULTI:
1629 }
1630 error = 0;
1631 break;
1632 case SIOCADDMULTI:
1633 case SIOCDELMULTI:
1634 RL_LOCK(sc);
1632 rl_setmulti(sc);
1635 rl_setmulti(sc);
1636 RL_UNLOCK(sc);
1633 error = 0;
1634 break;
1635 case SIOCGIFMEDIA:
1636 case SIOCSIFMEDIA:
1637 mii = device_get_softc(sc->rl_miibus);
1638 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1639 break;
1640 case SIOCSIFCAP:
1641 ifp->if_capenable &= ~IFCAP_POLLING;
1642 ifp->if_capenable |= ifr->ifr_reqcap & IFCAP_POLLING;
1643 break;
1644 default:
1645 error = ether_ioctl(ifp, command, data);
1646 break;
1647 }
1648
1637 error = 0;
1638 break;
1639 case SIOCGIFMEDIA:
1640 case SIOCSIFMEDIA:
1641 mii = device_get_softc(sc->rl_miibus);
1642 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1643 break;
1644 case SIOCSIFCAP:
1645 ifp->if_capenable &= ~IFCAP_POLLING;
1646 ifp->if_capenable |= ifr->ifr_reqcap & IFCAP_POLLING;
1647 break;
1648 default:
1649 error = ether_ioctl(ifp, command, data);
1650 break;
1651 }
1652
1649 RL_UNLOCK(sc);
1650
1651 return (error);
1652}
1653
1654static void
1655rl_watchdog(struct ifnet *ifp)
1656{
1657 struct rl_softc *sc = ifp->if_softc;
1658
1659 RL_LOCK(sc);
1660
1661 if_printf(ifp, "watchdog timeout\n");
1662 ifp->if_oerrors++;
1663
1664 rl_txeof(sc);
1665 rl_rxeof(sc);
1653 return (error);
1654}
1655
1656static void
1657rl_watchdog(struct ifnet *ifp)
1658{
1659 struct rl_softc *sc = ifp->if_softc;
1660
1661 RL_LOCK(sc);
1662
1663 if_printf(ifp, "watchdog timeout\n");
1664 ifp->if_oerrors++;
1665
1666 rl_txeof(sc);
1667 rl_rxeof(sc);
1666 rl_init(sc);
1667
1668 RL_UNLOCK(sc);
1668
1669 RL_UNLOCK(sc);
1670
1671 rl_init(sc);
1669}
1670
1671/*
1672 * Stop the adapter and free any mbufs allocated to the
1673 * RX and TX lists.
1674 */
1675static void
1676rl_stop(struct rl_softc *sc)
1677{
1678 register int i;
1679 struct ifnet *ifp = &sc->arpcom.ac_if;
1680
1672}
1673
1674/*
1675 * Stop the adapter and free any mbufs allocated to the
1676 * RX and TX lists.
1677 */
1678static void
1679rl_stop(struct rl_softc *sc)
1680{
1681 register int i;
1682 struct ifnet *ifp = &sc->arpcom.ac_if;
1683
1681 ifp->if_timer = 0;
1684 RL_LOCK_ASSERT(sc);
1682
1685
1683 RL_LOCK(sc);
1684
1686 ifp->if_timer = 0;
1685 untimeout(rl_tick, sc, sc->rl_stat_ch);
1686 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1687#ifdef DEVICE_POLLING
1688 ether_poll_deregister(ifp);
1689#endif /* DEVICE_POLLING */
1690
1691 CSR_WRITE_1(sc, RL_COMMAND, 0x00);
1692 CSR_WRITE_2(sc, RL_IMR, 0x0000);

--- 9 unchanged lines hidden (view full) ---

1702 bus_dmamap_destroy(sc->rl_tag,
1703 sc->rl_cdata.rl_tx_dmamap[i]);
1704 m_freem(sc->rl_cdata.rl_tx_chain[i]);
1705 sc->rl_cdata.rl_tx_chain[i] = NULL;
1706 CSR_WRITE_4(sc, RL_TXADDR0 + (i * sizeof(uint32_t)),
1707 0x0000000);
1708 }
1709 }
1687 untimeout(rl_tick, sc, sc->rl_stat_ch);
1688 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1689#ifdef DEVICE_POLLING
1690 ether_poll_deregister(ifp);
1691#endif /* DEVICE_POLLING */
1692
1693 CSR_WRITE_1(sc, RL_COMMAND, 0x00);
1694 CSR_WRITE_2(sc, RL_IMR, 0x0000);

--- 9 unchanged lines hidden (view full) ---

1704 bus_dmamap_destroy(sc->rl_tag,
1705 sc->rl_cdata.rl_tx_dmamap[i]);
1706 m_freem(sc->rl_cdata.rl_tx_chain[i]);
1707 sc->rl_cdata.rl_tx_chain[i] = NULL;
1708 CSR_WRITE_4(sc, RL_TXADDR0 + (i * sizeof(uint32_t)),
1709 0x0000000);
1710 }
1711 }
1710
1711 RL_UNLOCK(sc);
1712}
1713
1714/*
1715 * Device suspend routine. Stop the interface and save some PCI
1716 * settings in case the BIOS doesn't restore them properly on
1717 * resume.
1718 */
1719static int
1720rl_suspend(device_t dev)
1721{
1722 struct rl_softc *sc;
1723
1724 sc = device_get_softc(dev);
1712}
1713
1714/*
1715 * Device suspend routine. Stop the interface and save some PCI
1716 * settings in case the BIOS doesn't restore them properly on
1717 * resume.
1718 */
1719static int
1720rl_suspend(device_t dev)
1721{
1722 struct rl_softc *sc;
1723
1724 sc = device_get_softc(dev);
1725
1726 RL_LOCK(sc);
1725 rl_stop(sc);
1726 sc->suspended = 1;
1727 rl_stop(sc);
1728 sc->suspended = 1;
1729 RL_UNLOCK(sc);
1727
1728 return (0);
1729}
1730
1731/*
1732 * Device resume routine. Restore some PCI settings in case the BIOS
1733 * doesn't, re-enable busmastering, and restart the interface if
1734 * appropriate.

--- 6 unchanged lines hidden (view full) ---

1741
1742 sc = device_get_softc(dev);
1743 ifp = &sc->arpcom.ac_if;
1744
1745 /* reinitialize interface if necessary */
1746 if (ifp->if_flags & IFF_UP)
1747 rl_init(sc);
1748
1730
1731 return (0);
1732}
1733
1734/*
1735 * Device resume routine. Restore some PCI settings in case the BIOS
1736 * doesn't, re-enable busmastering, and restart the interface if
1737 * appropriate.

--- 6 unchanged lines hidden (view full) ---

1744
1745 sc = device_get_softc(dev);
1746 ifp = &sc->arpcom.ac_if;
1747
1748 /* reinitialize interface if necessary */
1749 if (ifp->if_flags & IFF_UP)
1750 rl_init(sc);
1751
1752 RL_LOCK(sc);
1749 sc->suspended = 0;
1753 sc->suspended = 0;
1754 RL_UNLOCK(sc);
1750
1751 return (0);
1752}
1753
1754/*
1755 * Stop all chip I/O so that the kernel's probe routines don't
1756 * get confused by errant DMAs when rebooting.
1757 */
1758static void
1759rl_shutdown(device_t dev)
1760{
1761 struct rl_softc *sc;
1762
1763 sc = device_get_softc(dev);
1755
1756 return (0);
1757}
1758
1759/*
1760 * Stop all chip I/O so that the kernel's probe routines don't
1761 * get confused by errant DMAs when rebooting.
1762 */
1763static void
1764rl_shutdown(device_t dev)
1765{
1766 struct rl_softc *sc;
1767
1768 sc = device_get_softc(dev);
1769
1770 RL_LOCK(sc);
1764 rl_stop(sc);
1771 rl_stop(sc);
1772 RL_UNLOCK(sc);
1765}
1773}