| if_rl.c (118714) | if_rl.c (118889) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 120 unchanged lines hidden (view full) --- 129 * PCI ID. Two new NIC type codes, RL_8139CPLUS and RL_8169 have 130 * been added to distinguish the chips at runtime. Separate RX and 131 * TX handling routines have been added to handle C+ mode, which 132 * are selected via function pointers that are initialized during 133 * the driver attach phase. 134 */ 135 136#include <sys/cdefs.h> | 1/* 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 120 unchanged lines hidden (view full) --- 129 * PCI ID. Two new NIC type codes, RL_8139CPLUS and RL_8169 have 130 * been added to distinguish the chips at runtime. Separate RX and 131 * TX handling routines have been added to handle C+ mode, which 132 * are selected via function pointers that are initialized during 133 * the driver attach phase. 134 */ 135 136#include <sys/cdefs.h> |
| 137__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 118714 2003-08-10 02:41:18Z wpaul $"); | 137__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 118889 2003-08-13 22:39:21Z wpaul $"); |
| 138 139#include <sys/param.h> 140#include <sys/endian.h> 141#include <sys/systm.h> 142#include <sys/sockio.h> 143#include <sys/mbuf.h> 144#include <sys/malloc.h> 145#include <sys/kernel.h> --- 35 unchanged lines hidden (view full) --- 181 * can hang the bus. I'm inclined to blame this on crummy design/construction 182 * on the part of RealTek. Memory mapped mode does appear to work on 183 * uniprocessor systems though. 184 */ 185#define RL_USEIOSPACE 186 187#include <pci/if_rlreg.h> 188 | 138 139#include <sys/param.h> 140#include <sys/endian.h> 141#include <sys/systm.h> 142#include <sys/sockio.h> 143#include <sys/mbuf.h> 144#include <sys/malloc.h> 145#include <sys/kernel.h> --- 35 unchanged lines hidden (view full) --- 181 * can hang the bus. I'm inclined to blame this on crummy design/construction 182 * on the part of RealTek. Memory mapped mode does appear to work on 183 * uniprocessor systems though. 184 */ 185#define RL_USEIOSPACE 186 187#include <pci/if_rlreg.h> 188 |
| 189__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 118714 2003-08-10 02:41:18Z wpaul $"); | 189__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 118889 2003-08-13 22:39:21Z wpaul $"); |
| 190 191#define RL_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 192 193/* 194 * Various supported device vendors/types and their names. 195 */ 196static struct rl_type rl_devs[] = { 197 { RT_VENDORID, RT_DEVICEID_8129, RL_8129, --- 937 unchanged lines hidden (view full) --- 1135 d->rl_bufaddr_lo = htole32(RL_ADDR_LO(segs[i].ds_addr)); 1136 d->rl_bufaddr_hi = htole32(RL_ADDR_HI(segs[i].ds_addr)); 1137 if (i == 0) 1138 cmdstat |= RL_TDESC_CMD_SOF; 1139 else 1140 cmdstat |= RL_TDESC_CMD_OWN; 1141 if (idx == (RL_RX_DESC_CNT - 1)) 1142 cmdstat |= RL_TDESC_CMD_EOR; | 190 191#define RL_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 192 193/* 194 * Various supported device vendors/types and their names. 195 */ 196static struct rl_type rl_devs[] = { 197 { RT_VENDORID, RT_DEVICEID_8129, RL_8129, --- 937 unchanged lines hidden (view full) --- 1135 d->rl_bufaddr_lo = htole32(RL_ADDR_LO(segs[i].ds_addr)); 1136 d->rl_bufaddr_hi = htole32(RL_ADDR_HI(segs[i].ds_addr)); 1137 if (i == 0) 1138 cmdstat |= RL_TDESC_CMD_SOF; 1139 else 1140 cmdstat |= RL_TDESC_CMD_OWN; 1141 if (idx == (RL_RX_DESC_CNT - 1)) 1142 cmdstat |= RL_TDESC_CMD_EOR; |
| 1143 d->rl_cmdstat = htole32(cmdstat); | 1143 d->rl_cmdstat = htole32(cmdstat | ctx->rl_flags); |
| 1144 i++; 1145 if (i == nseg) 1146 break; 1147 RL_DESC_INC(idx); 1148 } 1149 1150 d->rl_cmdstat |= htole32(RL_TDESC_CMD_EOF); 1151 ctx->rl_maxsegs = nseg; --- 559 unchanged lines hidden (view full) --- 1711 * longword aligned. 1712 */ 1713 m->m_len = m->m_pkthdr.len = 1536; 1714 m_adj(m, ETHER_ALIGN); 1715 1716 arg.sc = sc; 1717 arg.rl_idx = idx; 1718 arg.rl_maxsegs = 1; | 1144 i++; 1145 if (i == nseg) 1146 break; 1147 RL_DESC_INC(idx); 1148 } 1149 1150 d->rl_cmdstat |= htole32(RL_TDESC_CMD_EOF); 1151 ctx->rl_maxsegs = nseg; --- 559 unchanged lines hidden (view full) --- 1711 * longword aligned. 1712 */ 1713 m->m_len = m->m_pkthdr.len = 1536; 1714 m_adj(m, ETHER_ALIGN); 1715 1716 arg.sc = sc; 1717 arg.rl_idx = idx; 1718 arg.rl_maxsegs = 1; |
| 1719 arg.rl_flags = 0; |
|
| 1719 arg.rl_ring = sc->rl_ldata.rl_rx_list; 1720 1721 error = bus_dmamap_load_mbuf(sc->rl_ldata.rl_mtag, 1722 sc->rl_ldata.rl_rx_dmamap[idx], m, rl_dma_map_desc, 1723 &arg, BUS_DMA_NOWAIT); 1724 if (error || arg.rl_maxsegs != 1) { 1725 if (n != NULL) 1726 m_freem(n); --- 641 unchanged lines hidden (view full) --- 2368 struct rl_softc *sc; 2369 struct mbuf *m_head; 2370 int *idx; 2371{ 2372 struct mbuf *m_new = NULL; 2373 struct rl_dmaload_arg arg; 2374 bus_dmamap_t map; 2375 int error; | 1720 arg.rl_ring = sc->rl_ldata.rl_rx_list; 1721 1722 error = bus_dmamap_load_mbuf(sc->rl_ldata.rl_mtag, 1723 sc->rl_ldata.rl_rx_dmamap[idx], m, rl_dma_map_desc, 1724 &arg, BUS_DMA_NOWAIT); 1725 if (error || arg.rl_maxsegs != 1) { 1726 if (n != NULL) 1727 m_freem(n); --- 641 unchanged lines hidden (view full) --- 2369 struct rl_softc *sc; 2370 struct mbuf *m_head; 2371 int *idx; 2372{ 2373 struct mbuf *m_new = NULL; 2374 struct rl_dmaload_arg arg; 2375 bus_dmamap_t map; 2376 int error; |
| 2376 u_int32_t csumcmd = RL_TDESC_CMD_OWN; | |
| 2377 struct m_tag *mtag; 2378 2379 if (sc->rl_ldata.rl_tx_free < 4) 2380 return(EFBIG); 2381 | 2377 struct m_tag *mtag; 2378 2379 if (sc->rl_ldata.rl_tx_free < 4) 2380 return(EFBIG); 2381 |
| 2382 /* 2383 * Set up checksum offload. Note: checksum offload bits must 2384 * appear in all descriptors of a multi-descriptor transmit 2385 * attempt. (This is according to testing done with an 8169 2386 * chip. I'm not sure if this is a requirement or a bug.) 2387 */ 2388 2389 arg.rl_flags = 0; 2390 2391 if (m_head->m_pkthdr.csum_flags & CSUM_IP) 2392 arg.rl_flags |= RL_TDESC_CMD_IPCSUM; 2393 if (m_head->m_pkthdr.csum_flags & CSUM_TCP) 2394 arg.rl_flags |= RL_TDESC_CMD_TCPCSUM; 2395 if (m_head->m_pkthdr.csum_flags & CSUM_UDP) 2396 arg.rl_flags |= RL_TDESC_CMD_UDPCSUM; 2397 |
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| 2382 arg.sc = sc; 2383 arg.rl_idx = *idx; 2384 arg.rl_maxsegs = sc->rl_ldata.rl_tx_free; 2385 arg.rl_ring = sc->rl_ldata.rl_tx_list; 2386 2387 map = sc->rl_ldata.rl_tx_dmamap[*idx]; 2388 error = bus_dmamap_load_mbuf(sc->rl_ldata.rl_mtag, map, 2389 m_head, rl_dma_map_desc, &arg, BUS_DMA_NOWAIT); --- 44 unchanged lines hidden (view full) --- 2434 * transmission attempt. 2435 */ 2436 2437 mtag = VLAN_OUTPUT_TAG(&sc->arpcom.ac_if, m_head); 2438 if (mtag != NULL) 2439 sc->rl_ldata.rl_tx_list[*idx].rl_vlanctl = 2440 htole32(htons(VLAN_TAG_VALUE(mtag)) | RL_TDESC_VLANCTL_TAG); 2441 | 2398 arg.sc = sc; 2399 arg.rl_idx = *idx; 2400 arg.rl_maxsegs = sc->rl_ldata.rl_tx_free; 2401 arg.rl_ring = sc->rl_ldata.rl_tx_list; 2402 2403 map = sc->rl_ldata.rl_tx_dmamap[*idx]; 2404 error = bus_dmamap_load_mbuf(sc->rl_ldata.rl_mtag, map, 2405 m_head, rl_dma_map_desc, &arg, BUS_DMA_NOWAIT); --- 44 unchanged lines hidden (view full) --- 2450 * transmission attempt. 2451 */ 2452 2453 mtag = VLAN_OUTPUT_TAG(&sc->arpcom.ac_if, m_head); 2454 if (mtag != NULL) 2455 sc->rl_ldata.rl_tx_list[*idx].rl_vlanctl = 2456 htole32(htons(VLAN_TAG_VALUE(mtag)) | RL_TDESC_VLANCTL_TAG); 2457 |
| 2442 /* 2443 * Set up checksum offload. Note: checksum offload bits must 2444 * appear in the first descriptor of a multi-descriptor 2445 * transmission attempt. 2446 */ 2447 2448 if (m_head->m_pkthdr.csum_flags & CSUM_IP) 2449 csumcmd |= RL_TDESC_CMD_IPCSUM; 2450 if (m_head->m_pkthdr.csum_flags & CSUM_TCP) 2451 csumcmd |= RL_TDESC_CMD_TCPCSUM; 2452 if (m_head->m_pkthdr.csum_flags & CSUM_UDP) 2453 csumcmd |= RL_TDESC_CMD_UDPCSUM; 2454 | |
| 2455 /* Transfer ownership of packet to the chip. */ 2456 | 2458 /* Transfer ownership of packet to the chip. */ 2459 |
| 2457 sc->rl_ldata.rl_tx_list[arg.rl_idx].rl_cmdstat |= htole32(csumcmd); | 2460 sc->rl_ldata.rl_tx_list[arg.rl_idx].rl_cmdstat |= 2461 htole32(RL_TDESC_CMD_OWN); |
| 2458 if (*idx != arg.rl_idx) | 2462 if (*idx != arg.rl_idx) |
| 2459 sc->rl_ldata.rl_tx_list[*idx].rl_cmdstat |= htole32(csumcmd); | 2463 sc->rl_ldata.rl_tx_list[*idx].rl_cmdstat |= 2464 htole32(RL_TDESC_CMD_OWN); |
| 2460 2461 RL_DESC_INC(arg.rl_idx); 2462 *idx = arg.rl_idx; 2463 2464 return(0); 2465} 2466 2467/* --- 618 unchanged lines hidden --- | 2465 2466 RL_DESC_INC(arg.rl_idx); 2467 *idx = arg.rl_idx; 2468 2469 return(0); 2470} 2471 2472/* --- 618 unchanged lines hidden --- |