Deleted Added
full compact
if_rl.c (117388) if_rl.c (117748)
1/*
2 * Copyright (c) 1997, 1998-2003
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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119 * PCI ID. Two new NIC type codes, RL_8139CPLUS and RL_8169 have
120 * been added to distinguish the chips at runtime. Separate RX and
121 * TX handling routines have been added to handle C+ mode, which
122 * are selected via function pointers that are initialized during
123 * the driver attach phase.
124 */
125
126#include <sys/cdefs.h>
1/*
2 * Copyright (c) 1997, 1998-2003
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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119 * PCI ID. Two new NIC type codes, RL_8139CPLUS and RL_8169 have
120 * been added to distinguish the chips at runtime. Separate RX and
121 * TX handling routines have been added to handle C+ mode, which
122 * are selected via function pointers that are initialized during
123 * the driver attach phase.
124 */
125
126#include <sys/cdefs.h>
127__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 117388 2003-07-10 20:38:48Z wpaul $");
127__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 117748 2003-07-18 22:11:47Z wpaul $");
128
129#include <sys/param.h>
130#include <sys/endian.h>
131#include <sys/systm.h>
132#include <sys/sockio.h>
133#include <sys/mbuf.h>
134#include <sys/malloc.h>
135#include <sys/kernel.h>

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171 * can hang the bus. I'm inclined to blame this on crummy design/construction
172 * on the part of RealTek. Memory mapped mode does appear to work on
173 * uniprocessor systems though.
174 */
175#define RL_USEIOSPACE
176
177#include <pci/if_rlreg.h>
178
128
129#include <sys/param.h>
130#include <sys/endian.h>
131#include <sys/systm.h>
132#include <sys/sockio.h>
133#include <sys/mbuf.h>
134#include <sys/malloc.h>
135#include <sys/kernel.h>

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171 * can hang the bus. I'm inclined to blame this on crummy design/construction
172 * on the part of RealTek. Memory mapped mode does appear to work on
173 * uniprocessor systems though.
174 */
175#define RL_USEIOSPACE
176
177#include <pci/if_rlreg.h>
178
179__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 117388 2003-07-10 20:38:48Z wpaul $");
179__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 117748 2003-07-18 22:11:47Z wpaul $");
180
181#define RL_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
182
183/*
184 * Various supported device vendors/types and their names.
185 */
186static struct rl_type rl_devs[] = {
187 { RT_VENDORID, RT_DEVICEID_8129, RL_8129,

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1699 struct rl_desc *cur_rx;
1700 u_int32_t rxstat, rxvlan;
1701
1702 ifp = &sc->arpcom.ac_if;
1703 i = sc->rl_ldata.rl_rx_prodidx;
1704
1705 /* Invalidate the descriptor memory */
1706
180
181#define RL_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
182
183/*
184 * Various supported device vendors/types and their names.
185 */
186static struct rl_type rl_devs[] = {
187 { RT_VENDORID, RT_DEVICEID_8129, RL_8129,

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1699 struct rl_desc *cur_rx;
1700 u_int32_t rxstat, rxvlan;
1701
1702 ifp = &sc->arpcom.ac_if;
1703 i = sc->rl_ldata.rl_rx_prodidx;
1704
1705 /* Invalidate the descriptor memory */
1706
1707 bus_dmamap_sync(sc->rl_ldata.rl_mtag,
1707 bus_dmamap_sync(sc->rl_ldata.rl_rx_list_tag,
1708 sc->rl_ldata.rl_rx_list_map,
1709 BUS_DMASYNC_POSTREAD);
1710
1711 while (!RL_OWN(&sc->rl_ldata.rl_rx_list[i])) {
1712
1713 cur_rx = &sc->rl_ldata.rl_rx_list[i];
1714 m = sc->rl_ldata.rl_rx_mbuf[i];
1715 total_len = RL_RXBYTES(cur_rx) - ETHER_CRC_LEN;

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1931 u_int32_t txstat;
1932 int idx;
1933
1934 ifp = &sc->arpcom.ac_if;
1935 idx = sc->rl_ldata.rl_tx_considx;
1936
1937 /* Invalidate the TX descriptor list */
1938
1708 sc->rl_ldata.rl_rx_list_map,
1709 BUS_DMASYNC_POSTREAD);
1710
1711 while (!RL_OWN(&sc->rl_ldata.rl_rx_list[i])) {
1712
1713 cur_rx = &sc->rl_ldata.rl_rx_list[i];
1714 m = sc->rl_ldata.rl_rx_mbuf[i];
1715 total_len = RL_RXBYTES(cur_rx) - ETHER_CRC_LEN;

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1931 u_int32_t txstat;
1932 int idx;
1933
1934 ifp = &sc->arpcom.ac_if;
1935 idx = sc->rl_ldata.rl_tx_considx;
1936
1937 /* Invalidate the TX descriptor list */
1938
1939 bus_dmamap_sync(sc->rl_ldata.rl_mtag,
1939 bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag,
1940 sc->rl_ldata.rl_tx_list_map,
1941 BUS_DMASYNC_POSTREAD);
1942
1943 while (idx != sc->rl_ldata.rl_tx_prodidx) {
1944
1945 txstat = le32toh(sc->rl_ldata.rl_tx_list[idx].rl_cmdstat);
1946 if (txstat & RL_TDESC_CMD_OWN)
1947 break;

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2378 * If there's a BPF listener, bounce a copy of this frame
2379 * to him.
2380 */
2381 BPF_MTAP(ifp, m_head);
2382 }
2383
2384 /* Flush the TX descriptors */
2385
1940 sc->rl_ldata.rl_tx_list_map,
1941 BUS_DMASYNC_POSTREAD);
1942
1943 while (idx != sc->rl_ldata.rl_tx_prodidx) {
1944
1945 txstat = le32toh(sc->rl_ldata.rl_tx_list[idx].rl_cmdstat);
1946 if (txstat & RL_TDESC_CMD_OWN)
1947 break;

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2378 * If there's a BPF listener, bounce a copy of this frame
2379 * to him.
2380 */
2381 BPF_MTAP(ifp, m_head);
2382 }
2383
2384 /* Flush the TX descriptors */
2385
2386 bus_dmamap_sync(sc->rl_ldata.rl_mtag,
2386 bus_dmamap_sync(sc->rl_ldata.rl_tx_list_tag,
2387 sc->rl_ldata.rl_tx_list_map,
2388 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
2389
2390 sc->rl_ldata.rl_tx_prodidx = idx;
2391
2392 /*
2393 * RealTek put the TX poll request register in a different
2394 * location on the 8169 gigE chip. I don't know why.

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2387 sc->rl_ldata.rl_tx_list_map,
2388 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
2389
2390 sc->rl_ldata.rl_tx_prodidx = idx;
2391
2392 /*
2393 * RealTek put the TX poll request register in a different
2394 * location on the 8169 gigE chip. I don't know why.

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