| if_rl.c (113496) | if_rl.c (113506) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 97 unchanged lines hidden (view full) --- 106#include <sys/rman.h> 107 108#include <dev/mii/mii.h> 109#include <dev/mii/miivar.h> 110 111#include <pci/pcireg.h> 112#include <pci/pcivar.h> 113 | 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 97 unchanged lines hidden (view full) --- 106#include <sys/rman.h> 107 108#include <dev/mii/mii.h> 109#include <dev/mii/miivar.h> 110 111#include <pci/pcireg.h> 112#include <pci/pcivar.h> 113 |
| 114MODULE_DEPEND(rl, pci, 1, 1, 1); 115MODULE_DEPEND(rl, ether, 1, 1, 1); |
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| 114MODULE_DEPEND(rl, miibus, 1, 1, 1); 115 116/* "controller miibus0" required. See GENERIC if you get errors here. */ 117#include "miibus_if.h" 118 119/* 120 * Default to using PIO access for this driver. On SMP systems, 121 * there appear to be problems with memory mapped mode: it looks like 122 * doing too many memory mapped access back to back in rapid succession 123 * can hang the bus. I'm inclined to blame this on crummy design/construction 124 * on the part of RealTek. Memory mapped mode does appear to work on 125 * uniprocessor systems though. 126 */ 127#define RL_USEIOSPACE 128 129#include <pci/if_rlreg.h> 130 | 116MODULE_DEPEND(rl, miibus, 1, 1, 1); 117 118/* "controller miibus0" required. See GENERIC if you get errors here. */ 119#include "miibus_if.h" 120 121/* 122 * Default to using PIO access for this driver. On SMP systems, 123 * there appear to be problems with memory mapped mode: it looks like 124 * doing too many memory mapped access back to back in rapid succession 125 * can hang the bus. I'm inclined to blame this on crummy design/construction 126 * on the part of RealTek. Memory mapped mode does appear to work on 127 * uniprocessor systems though. 128 */ 129#define RL_USEIOSPACE 130 131#include <pci/if_rlreg.h> 132 |
| 131__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 113496 2003-04-15 04:06:01Z silby $"); | 133__FBSDID("$FreeBSD: head/sys/pci/if_rl.c 113506 2003-04-15 06:37:30Z mdodd $"); |
| 132 133/* 134 * Various supported device vendors/types and their names. 135 */ 136static struct rl_type rl_devs[] = { 137 { RT_VENDORID, RT_DEVICEID_8129, 138 "RealTek 8129 10/100BaseTX" }, 139 { RT_VENDORID, RT_DEVICEID_8139, --- 96 unchanged lines hidden (view full) --- 236static driver_t rl_driver = { 237 "rl", 238 rl_methods, 239 sizeof(struct rl_softc) 240}; 241 242static devclass_t rl_devclass; 243 | 134 135/* 136 * Various supported device vendors/types and their names. 137 */ 138static struct rl_type rl_devs[] = { 139 { RT_VENDORID, RT_DEVICEID_8129, 140 "RealTek 8129 10/100BaseTX" }, 141 { RT_VENDORID, RT_DEVICEID_8139, --- 96 unchanged lines hidden (view full) --- 238static driver_t rl_driver = { 239 "rl", 240 rl_methods, 241 sizeof(struct rl_softc) 242}; 243 244static devclass_t rl_devclass; 245 |
| 244DRIVER_MODULE(if_rl, pci, rl_driver, rl_devclass, 0, 0); 245DRIVER_MODULE(if_rl, cardbus, rl_driver, rl_devclass, 0, 0); | 246DRIVER_MODULE(rl, pci, rl_driver, rl_devclass, 0, 0); 247DRIVER_MODULE(rl, cardbus, rl_driver, rl_devclass, 0, 0); |
| 246DRIVER_MODULE(miibus, rl, miibus_driver, miibus_devclass, 0, 0); 247 248#define EE_SET(x) \ 249 CSR_WRITE_1(sc, RL_EECMD, \ 250 CSR_READ_1(sc, RL_EECMD) | x) 251 252#define EE_CLR(x) \ 253 CSR_WRITE_1(sc, RL_EECMD, \ --- 1676 unchanged lines hidden --- | 248DRIVER_MODULE(miibus, rl, miibus_driver, miibus_devclass, 0, 0); 249 250#define EE_SET(x) \ 251 CSR_WRITE_1(sc, RL_EECMD, \ 252 CSR_READ_1(sc, RL_EECMD) | x) 253 254#define EE_CLR(x) \ 255 CSR_WRITE_1(sc, RL_EECMD, \ --- 1676 unchanged lines hidden --- |