1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
32 * $Id: if_rl.c,v 1.16 1998/12/07 00:16:44 wpaul Exp $ |
33 */ 34 35/* 36 * RealTek 8129/8139 PCI NIC driver 37 * 38 * Supports several extremely cheap PCI 10/100 adapters based on 39 * the RealTek chipset. Datasheets can be obtained from 40 * www.realtek.com.tw. --- 7 unchanged lines hidden (view full) --- 48 * The RealTek 8139 PCI NIC redefines the meaning of 'low end.' This is 49 * probably the worst PCI ethernet controller ever made, with the possible 50 * exception of the FEAST chip made by SMC. The 8139 supports bus-master 51 * DMA, but it has a terrible interface that nullifies any performance 52 * gains that bus-master DMA usually offers. 53 * 54 * For transmission, the chip offers a series of four TX descriptor 55 * registers. Each transmit frame must be in a contiguous buffer, aligned |
56 * on a longword (32-bit) boundary. This means we almost always have to |
57 * do mbuf copies in order to transmit a frame, except in the unlikely 58 * case where a) the packet fits into a single mbuf, and b) the packet 59 * is 32-bit aligned within the mbuf's data area. The presence of only 60 * four descriptor registers means that we can never have more than four 61 * packets queued for transmission at any one time. 62 * 63 * Reception is not much better. The driver has to allocate a single large 64 * buffer area (up to 64K in size) into which the chip will DMA received --- 11 unchanged lines hidden (view full) --- 76 * PHY registers are directly accessible through the 8139's register 77 * space. The 8139 supports autonegotiation, as well as a 64-bit multicast 78 * filter. 79 * 80 * The 8129 chip is an older version of the 8139 that uses an external PHY 81 * chip. The 8129 has a serial MDIO interface for accessing the MII where 82 * the 8139 lets you directly access the on-board PHY registers. We need 83 * to select which interface to use depending on the chip type. |
84 */ 85 86#include "bpfilter.h" 87 88#include <sys/param.h> 89#include <sys/systm.h> 90#include <sys/sockio.h> 91#include <sys/mbuf.h> --- 9 unchanged lines hidden (view full) --- 101 102#if NBPFILTER > 0 103#include <net/bpf.h> 104#endif 105 106#include <vm/vm.h> /* for vtophys */ 107#include <vm/pmap.h> /* for vtophys */ 108#include <machine/clock.h> /* for DELAY */ |
109#include <machine/bus_pio.h> 110#include <machine/bus_memio.h> 111#include <machine/bus.h> |
112 113#include <pci/pcireg.h> 114#include <pci/pcivar.h> 115 116/* 117 * Default to using PIO access for this driver. On SMP systems, 118 * there appear to be problems with memory mapped mode: it looks like 119 * doing too many memory mapped access back to back in rapid succession 120 * can hang the bus. I'm inclined to blame this on crummy design/construction 121 * on the part of RealTek. Memory mapped mode does appear to work on 122 * uniprocessor systems though. 123 */ 124#define RL_USEIOSPACE 125 126#include <pci/if_rlreg.h> 127 128#ifndef lint 129static char rcsid[] = |
130 "$Id: if_rl.c,v 1.16 1998/12/07 00:16:44 wpaul Exp $"; |
131#endif 132 133/* 134 * Various supported device vendors/types and their names. 135 */ 136static struct rl_type rl_devs[] = { 137 { RT_VENDORID, RT_DEVICEID_8129, 138 "RealTek 8129 10/100BaseTX" }, --- 933 unchanged lines hidden (view full) --- 1072 1073#ifdef RL_USEIOSPACE 1074 if (!(command & PCIM_CMD_PORTEN)) { 1075 printf("rl%d: failed to enable I/O ports!\n", unit); 1076 free(sc, M_DEVBUF); 1077 goto fail; 1078 } 1079 |
1080 if (!pci_map_port(config_id, RL_PCI_LOIO, 1081 (u_int16_t *)&(sc->rl_bhandle))) { 1082 printf ("rl%d: couldn't map ports\n", unit); 1083 goto fail; 1084 } 1085 sc->rl_btag = I386_BUS_SPACE_IO; |
1086#else 1087 if (!(command & PCIM_CMD_MEMEN)) { 1088 printf("rl%d: failed to enable memory mapping!\n", unit); 1089 goto fail; 1090 } 1091 1092 if (!pci_map_mem(config_id, RL_PCI_LOMEM, &vbase, &pbase)) { 1093 printf ("rl%d: couldn't map memory\n", unit); 1094 goto fail; 1095 } |
1096 sc->rl_btag = I386_BUS_SPACE_MEM; 1097 sc->rl_bhandle = vbase; |
1098#endif 1099 1100 /* Allocate interrupt */ 1101 if (!pci_map_int(config_id, rl_intr, sc, &net_imask)) { 1102 printf("rl%d: couldn't map interrupt\n", unit); 1103 goto fail; 1104 } 1105 --- 14 unchanged lines hidden (view full) --- 1120 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); 1121 1122 /* 1123 * Now read the exact device type from the EEPROM to find 1124 * out if it's an 8129 or 8139. 1125 */ 1126 rl_read_eeprom(sc, (caddr_t)&rl_did, RL_EE_PCI_DID, 1, 0); 1127 |
1128 if (rl_did == RT_DEVICEID_8139 || rl_did == ACCTON_DEVICEID_5030) |
1129 sc->rl_type = RL_8139; 1130 else if (rl_did == RT_DEVICEID_8129) 1131 sc->rl_type = RL_8129; 1132 else { 1133 printf("rl%d: unknown device ID: %x\n", unit, rl_did); 1134 free(sc, M_DEVBUF); 1135 goto fail; 1136 } --- 853 unchanged lines hidden --- |