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if_nfe.c (183509) if_nfe.c (183561)
1/* $OpenBSD: if_nfe.c,v 1.54 2006/04/07 12:38:12 jsg Exp $ */
2
3/*-
4 * Copyright (c) 2006 Shigeaki Tagashira <shigeaki@se.hiroshima-u.ac.jp>
5 * Copyright (c) 2006 Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2005, 2006 Jonathan Gray <jsg@openbsd.org>
7 *
8 * Permission to use, copy, modify, and distribute this software for any

--- 7 unchanged lines hidden (view full) ---

16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21/* Driver for NVIDIA nForce MCP Fast Ethernet and Gigabit Ethernet */
22
23#include <sys/cdefs.h>
1/* $OpenBSD: if_nfe.c,v 1.54 2006/04/07 12:38:12 jsg Exp $ */
2
3/*-
4 * Copyright (c) 2006 Shigeaki Tagashira <shigeaki@se.hiroshima-u.ac.jp>
5 * Copyright (c) 2006 Damien Bergamini <damien.bergamini@free.fr>
6 * Copyright (c) 2005, 2006 Jonathan Gray <jsg@openbsd.org>
7 *
8 * Permission to use, copy, modify, and distribute this software for any

--- 7 unchanged lines hidden (view full) ---

16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 */
20
21/* Driver for NVIDIA nForce MCP Fast Ethernet and Gigabit Ethernet */
22
23#include <sys/cdefs.h>
24__FBSDID("$FreeBSD: head/sys/dev/nfe/if_nfe.c 183509 2008-10-01 00:17:54Z yongari $");
24__FBSDID("$FreeBSD: head/sys/dev/nfe/if_nfe.c 183561 2008-10-03 03:58:16Z yongari $");
25
26#ifdef HAVE_KERNEL_OPTION_HEADERS
27#include "opt_device_polling.h"
28#endif
29
30#include <sys/param.h>
31#include <sys/endian.h>
32#include <sys/systm.h>

--- 84 unchanged lines hidden (view full) ---

117static void nfe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
118static void nfe_tick(void *);
119static void nfe_get_macaddr(struct nfe_softc *, uint8_t *);
120static void nfe_set_macaddr(struct nfe_softc *, uint8_t *);
121static void nfe_dma_map_segs(void *, bus_dma_segment_t *, int, int);
122
123static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int, int);
124static int sysctl_hw_nfe_proc_limit(SYSCTL_HANDLER_ARGS);
25
26#ifdef HAVE_KERNEL_OPTION_HEADERS
27#include "opt_device_polling.h"
28#endif
29
30#include <sys/param.h>
31#include <sys/endian.h>
32#include <sys/systm.h>

--- 84 unchanged lines hidden (view full) ---

117static void nfe_ifmedia_sts(struct ifnet *, struct ifmediareq *);
118static void nfe_tick(void *);
119static void nfe_get_macaddr(struct nfe_softc *, uint8_t *);
120static void nfe_set_macaddr(struct nfe_softc *, uint8_t *);
121static void nfe_dma_map_segs(void *, bus_dma_segment_t *, int, int);
122
123static int sysctl_int_range(SYSCTL_HANDLER_ARGS, int, int);
124static int sysctl_hw_nfe_proc_limit(SYSCTL_HANDLER_ARGS);
125static void nfe_sysctl_node(struct nfe_softc *);
126static void nfe_stats_clear(struct nfe_softc *);
127static void nfe_stats_update(struct nfe_softc *);
125
126#ifdef NFE_DEBUG
127static int nfedebug = 0;
128#define DPRINTF(sc, ...) do { \
129 if (nfedebug) \
130 device_printf((sc)->nfe_dev, __VA_ARGS__); \
131} while (0)
132#define DPRINTFN(sc, n, ...) do { \

--- 316 unchanged lines hidden (view full) ---

449 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN2:
450 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN3:
451 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN4:
452 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN5:
453 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_HW_CSUM;
454 break;
455 case PCI_PRODUCT_NVIDIA_MCP51_LAN1:
456 case PCI_PRODUCT_NVIDIA_MCP51_LAN2:
128
129#ifdef NFE_DEBUG
130static int nfedebug = 0;
131#define DPRINTF(sc, ...) do { \
132 if (nfedebug) \
133 device_printf((sc)->nfe_dev, __VA_ARGS__); \
134} while (0)
135#define DPRINTFN(sc, n, ...) do { \

--- 316 unchanged lines hidden (view full) ---

452 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN2:
453 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN3:
454 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN4:
455 case PCI_PRODUCT_NVIDIA_NFORCE3_LAN5:
456 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_HW_CSUM;
457 break;
458 case PCI_PRODUCT_NVIDIA_MCP51_LAN1:
459 case PCI_PRODUCT_NVIDIA_MCP51_LAN2:
457 sc->nfe_flags |= NFE_40BIT_ADDR | NFE_PWR_MGMT;
460 sc->nfe_flags |= NFE_40BIT_ADDR | NFE_PWR_MGMT | NFE_MIB_V1;
458 break;
459 case PCI_PRODUCT_NVIDIA_CK804_LAN1:
460 case PCI_PRODUCT_NVIDIA_CK804_LAN2:
461 case PCI_PRODUCT_NVIDIA_MCP04_LAN1:
462 case PCI_PRODUCT_NVIDIA_MCP04_LAN2:
461 break;
462 case PCI_PRODUCT_NVIDIA_CK804_LAN1:
463 case PCI_PRODUCT_NVIDIA_CK804_LAN2:
464 case PCI_PRODUCT_NVIDIA_MCP04_LAN1:
465 case PCI_PRODUCT_NVIDIA_MCP04_LAN2:
463 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM;
466 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM |
467 NFE_MIB_V1;
464 break;
465 case PCI_PRODUCT_NVIDIA_MCP55_LAN1:
466 case PCI_PRODUCT_NVIDIA_MCP55_LAN2:
467 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM |
468 break;
469 case PCI_PRODUCT_NVIDIA_MCP55_LAN1:
470 case PCI_PRODUCT_NVIDIA_MCP55_LAN2:
471 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM |
468 NFE_HW_VLAN | NFE_PWR_MGMT | NFE_TX_FLOW_CTRL;
472 NFE_HW_VLAN | NFE_PWR_MGMT | NFE_TX_FLOW_CTRL | NFE_MIB_V2;
469 break;
470
471 case PCI_PRODUCT_NVIDIA_MCP61_LAN1:
472 case PCI_PRODUCT_NVIDIA_MCP61_LAN2:
473 case PCI_PRODUCT_NVIDIA_MCP61_LAN3:
474 case PCI_PRODUCT_NVIDIA_MCP61_LAN4:
475 case PCI_PRODUCT_NVIDIA_MCP67_LAN1:
476 case PCI_PRODUCT_NVIDIA_MCP67_LAN2:
477 case PCI_PRODUCT_NVIDIA_MCP67_LAN3:
478 case PCI_PRODUCT_NVIDIA_MCP67_LAN4:
479 case PCI_PRODUCT_NVIDIA_MCP73_LAN1:
480 case PCI_PRODUCT_NVIDIA_MCP73_LAN2:
481 case PCI_PRODUCT_NVIDIA_MCP73_LAN3:
482 case PCI_PRODUCT_NVIDIA_MCP73_LAN4:
483 sc->nfe_flags |= NFE_40BIT_ADDR | NFE_PWR_MGMT |
473 break;
474
475 case PCI_PRODUCT_NVIDIA_MCP61_LAN1:
476 case PCI_PRODUCT_NVIDIA_MCP61_LAN2:
477 case PCI_PRODUCT_NVIDIA_MCP61_LAN3:
478 case PCI_PRODUCT_NVIDIA_MCP61_LAN4:
479 case PCI_PRODUCT_NVIDIA_MCP67_LAN1:
480 case PCI_PRODUCT_NVIDIA_MCP67_LAN2:
481 case PCI_PRODUCT_NVIDIA_MCP67_LAN3:
482 case PCI_PRODUCT_NVIDIA_MCP67_LAN4:
483 case PCI_PRODUCT_NVIDIA_MCP73_LAN1:
484 case PCI_PRODUCT_NVIDIA_MCP73_LAN2:
485 case PCI_PRODUCT_NVIDIA_MCP73_LAN3:
486 case PCI_PRODUCT_NVIDIA_MCP73_LAN4:
487 sc->nfe_flags |= NFE_40BIT_ADDR | NFE_PWR_MGMT |
484 NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL;
488 NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL | NFE_MIB_V2;
485 break;
486 case PCI_PRODUCT_NVIDIA_MCP77_LAN1:
487 case PCI_PRODUCT_NVIDIA_MCP77_LAN2:
488 case PCI_PRODUCT_NVIDIA_MCP77_LAN3:
489 case PCI_PRODUCT_NVIDIA_MCP77_LAN4:
490 /* XXX flow control */
491 sc->nfe_flags |= NFE_40BIT_ADDR | NFE_HW_CSUM | NFE_PWR_MGMT |
489 break;
490 case PCI_PRODUCT_NVIDIA_MCP77_LAN1:
491 case PCI_PRODUCT_NVIDIA_MCP77_LAN2:
492 case PCI_PRODUCT_NVIDIA_MCP77_LAN3:
493 case PCI_PRODUCT_NVIDIA_MCP77_LAN4:
494 /* XXX flow control */
495 sc->nfe_flags |= NFE_40BIT_ADDR | NFE_HW_CSUM | NFE_PWR_MGMT |
492 NFE_CORRECT_MACADDR;
496 NFE_CORRECT_MACADDR | NFE_MIB_V3;
493 break;
494 case PCI_PRODUCT_NVIDIA_MCP79_LAN1:
495 case PCI_PRODUCT_NVIDIA_MCP79_LAN2:
496 case PCI_PRODUCT_NVIDIA_MCP79_LAN3:
497 case PCI_PRODUCT_NVIDIA_MCP79_LAN4:
498 /* XXX flow control */
499 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM |
497 break;
498 case PCI_PRODUCT_NVIDIA_MCP79_LAN1:
499 case PCI_PRODUCT_NVIDIA_MCP79_LAN2:
500 case PCI_PRODUCT_NVIDIA_MCP79_LAN3:
501 case PCI_PRODUCT_NVIDIA_MCP79_LAN4:
502 /* XXX flow control */
503 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | NFE_HW_CSUM |
500 NFE_PWR_MGMT | NFE_CORRECT_MACADDR;
504 NFE_PWR_MGMT | NFE_CORRECT_MACADDR | NFE_MIB_V3;
501 break;
502 case PCI_PRODUCT_NVIDIA_MCP65_LAN1:
503 case PCI_PRODUCT_NVIDIA_MCP65_LAN2:
504 case PCI_PRODUCT_NVIDIA_MCP65_LAN3:
505 case PCI_PRODUCT_NVIDIA_MCP65_LAN4:
506 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR |
505 break;
506 case PCI_PRODUCT_NVIDIA_MCP65_LAN1:
507 case PCI_PRODUCT_NVIDIA_MCP65_LAN2:
508 case PCI_PRODUCT_NVIDIA_MCP65_LAN3:
509 case PCI_PRODUCT_NVIDIA_MCP65_LAN4:
510 sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR |
507 NFE_PWR_MGMT | NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL;
511 NFE_PWR_MGMT | NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL |
512 NFE_MIB_V2;
508 break;
509 }
510
511 nfe_power(sc);
512 /* Check for reversed ethernet address */
513 if ((NFE_READ(sc, NFE_TX_UNK) & NFE_MAC_ADDR_INORDER) != 0)
514 sc->nfe_flags |= NFE_CORRECT_MACADDR;
515 nfe_get_macaddr(sc, sc->eaddr);

--- 30 unchanged lines hidden (view full) ---

546 */
547 if ((error = nfe_alloc_tx_ring(sc, &sc->txq)) != 0)
548 goto fail;
549
550 if ((error = nfe_alloc_rx_ring(sc, &sc->rxq)) != 0)
551 goto fail;
552
553 nfe_alloc_jrx_ring(sc, &sc->jrxq);
513 break;
514 }
515
516 nfe_power(sc);
517 /* Check for reversed ethernet address */
518 if ((NFE_READ(sc, NFE_TX_UNK) & NFE_MAC_ADDR_INORDER) != 0)
519 sc->nfe_flags |= NFE_CORRECT_MACADDR;
520 nfe_get_macaddr(sc, sc->eaddr);

--- 30 unchanged lines hidden (view full) ---

551 */
552 if ((error = nfe_alloc_tx_ring(sc, &sc->txq)) != 0)
553 goto fail;
554
555 if ((error = nfe_alloc_rx_ring(sc, &sc->rxq)) != 0)
556 goto fail;
557
558 nfe_alloc_jrx_ring(sc, &sc->jrxq);
559 /* Create sysctl node. */
560 nfe_sysctl_node(sc);
554
561
555 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
556 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
557 OID_AUTO, "process_limit", CTLTYPE_INT | CTLFLAG_RW,
558 &sc->nfe_process_limit, 0, sysctl_hw_nfe_proc_limit, "I",
559 "max number of Rx events to process");
560
561 sc->nfe_process_limit = NFE_PROC_DEFAULT;
562 error = resource_int_value(device_get_name(dev), device_get_unit(dev),
563 "process_limit", &sc->nfe_process_limit);
564 if (error == 0) {
565 if (sc->nfe_process_limit < NFE_PROC_MIN ||
566 sc->nfe_process_limit > NFE_PROC_MAX) {
567 device_printf(dev, "process_limit value out of range; "
568 "using default: %d\n", NFE_PROC_DEFAULT);
569 sc->nfe_process_limit = NFE_PROC_DEFAULT;
570 }
571 }
572
573 ifp->if_softc = sc;
574 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
575 ifp->if_mtu = ETHERMTU;
576 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
577 ifp->if_ioctl = nfe_ioctl;
578 ifp->if_start = nfe_start;
579 ifp->if_hwassist = 0;
580 ifp->if_capabilities = 0;

--- 2181 unchanged lines hidden (view full) ---

2762 /* enable Rx */
2763 NFE_WRITE(sc, NFE_RX_CTL, NFE_RX_START);
2764
2765 /* enable Tx */
2766 NFE_WRITE(sc, NFE_TX_CTL, NFE_TX_START);
2767
2768 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
2769
562 ifp->if_softc = sc;
563 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
564 ifp->if_mtu = ETHERMTU;
565 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
566 ifp->if_ioctl = nfe_ioctl;
567 ifp->if_start = nfe_start;
568 ifp->if_hwassist = 0;
569 ifp->if_capabilities = 0;

--- 2181 unchanged lines hidden (view full) ---

2751 /* enable Rx */
2752 NFE_WRITE(sc, NFE_RX_CTL, NFE_RX_START);
2753
2754 /* enable Tx */
2755 NFE_WRITE(sc, NFE_TX_CTL, NFE_TX_START);
2756
2757 NFE_WRITE(sc, NFE_PHY_STATUS, 0xf);
2758
2759 /* Clear hardware stats. */
2760 nfe_stats_clear(sc);
2761
2770#ifdef DEVICE_POLLING
2771 if (ifp->if_capenable & IFCAP_POLLING)
2772 nfe_disable_intr(sc);
2773 else
2774#endif
2775 nfe_set_intr(sc);
2776 nfe_enable_intr(sc); /* enable interrupts */
2777

--- 72 unchanged lines hidden (view full) ---

2850 bus_dmamap_sync(tx_ring->tx_data_tag,
2851 tdata->tx_data_map, BUS_DMASYNC_POSTWRITE);
2852 bus_dmamap_unload(tx_ring->tx_data_tag,
2853 tdata->tx_data_map);
2854 m_freem(tdata->m);
2855 tdata->m = NULL;
2856 }
2857 }
2762#ifdef DEVICE_POLLING
2763 if (ifp->if_capenable & IFCAP_POLLING)
2764 nfe_disable_intr(sc);
2765 else
2766#endif
2767 nfe_set_intr(sc);
2768 nfe_enable_intr(sc); /* enable interrupts */
2769

--- 72 unchanged lines hidden (view full) ---

2842 bus_dmamap_sync(tx_ring->tx_data_tag,
2843 tdata->tx_data_map, BUS_DMASYNC_POSTWRITE);
2844 bus_dmamap_unload(tx_ring->tx_data_tag,
2845 tdata->tx_data_map);
2846 m_freem(tdata->m);
2847 tdata->m = NULL;
2848 }
2849 }
2850 /* Update hardware stats. */
2851 nfe_stats_update(sc);
2858}
2859
2860
2861static int
2862nfe_ifmedia_upd(struct ifnet *ifp)
2863{
2864 struct nfe_softc *sc = ifp->if_softc;
2865 struct mii_data *mii;

--- 35 unchanged lines hidden (view full) ---

2901 sc = (struct nfe_softc *)xsc;
2902
2903 NFE_LOCK_ASSERT(sc);
2904
2905 ifp = sc->nfe_ifp;
2906
2907 mii = device_get_softc(sc->nfe_miibus);
2908 mii_tick(mii);
2852}
2853
2854
2855static int
2856nfe_ifmedia_upd(struct ifnet *ifp)
2857{
2858 struct nfe_softc *sc = ifp->if_softc;
2859 struct mii_data *mii;

--- 35 unchanged lines hidden (view full) ---

2895 sc = (struct nfe_softc *)xsc;
2896
2897 NFE_LOCK_ASSERT(sc);
2898
2899 ifp = sc->nfe_ifp;
2900
2901 mii = device_get_softc(sc->nfe_miibus);
2902 mii_tick(mii);
2903 nfe_stats_update(sc);
2909 nfe_watchdog(ifp);
2910 callout_reset(&sc->nfe_stat_ch, hz, nfe_tick, sc);
2911}
2912
2913
2914static int
2915nfe_shutdown(device_t dev)
2916{

--- 91 unchanged lines hidden (view full) ---

3008
3009static int
3010sysctl_hw_nfe_proc_limit(SYSCTL_HANDLER_ARGS)
3011{
3012
3013 return (sysctl_int_range(oidp, arg1, arg2, req, NFE_PROC_MIN,
3014 NFE_PROC_MAX));
3015}
2904 nfe_watchdog(ifp);
2905 callout_reset(&sc->nfe_stat_ch, hz, nfe_tick, sc);
2906}
2907
2908
2909static int
2910nfe_shutdown(device_t dev)
2911{

--- 91 unchanged lines hidden (view full) ---

3003
3004static int
3005sysctl_hw_nfe_proc_limit(SYSCTL_HANDLER_ARGS)
3006{
3007
3008 return (sysctl_int_range(oidp, arg1, arg2, req, NFE_PROC_MIN,
3009 NFE_PROC_MAX));
3010}
3011
3012
3013#define NFE_SYSCTL_STAT_ADD32(c, h, n, p, d) \
3014 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d)
3015#define NFE_SYSCTL_STAT_ADD64(c, h, n, p, d) \
3016 SYSCTL_ADD_QUAD(c, h, OID_AUTO, n, CTLFLAG_RD, p, d)
3017
3018static void
3019nfe_sysctl_node(struct nfe_softc *sc)
3020{
3021 struct sysctl_ctx_list *ctx;
3022 struct sysctl_oid_list *child, *parent;
3023 struct sysctl_oid *tree;
3024 struct nfe_hw_stats *stats;
3025 int error;
3026
3027 stats = &sc->nfe_stats;
3028 ctx = device_get_sysctl_ctx(sc->nfe_dev);
3029 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->nfe_dev));
3030 SYSCTL_ADD_PROC(ctx, child,
3031 OID_AUTO, "process_limit", CTLTYPE_INT | CTLFLAG_RW,
3032 &sc->nfe_process_limit, 0, sysctl_hw_nfe_proc_limit, "I",
3033 "max number of Rx events to process");
3034
3035 sc->nfe_process_limit = NFE_PROC_DEFAULT;
3036 error = resource_int_value(device_get_name(sc->nfe_dev),
3037 device_get_unit(sc->nfe_dev), "process_limit",
3038 &sc->nfe_process_limit);
3039 if (error == 0) {
3040 if (sc->nfe_process_limit < NFE_PROC_MIN ||
3041 sc->nfe_process_limit > NFE_PROC_MAX) {
3042 device_printf(sc->nfe_dev,
3043 "process_limit value out of range; "
3044 "using default: %d\n", NFE_PROC_DEFAULT);
3045 sc->nfe_process_limit = NFE_PROC_DEFAULT;
3046 }
3047 }
3048
3049 if ((sc->nfe_flags & (NFE_MIB_V1 | NFE_MIB_V2 | NFE_MIB_V3)) == 0)
3050 return;
3051
3052 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
3053 NULL, "NFE statistics");
3054 parent = SYSCTL_CHILDREN(tree);
3055
3056 /* Rx statistics. */
3057 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "rx", CTLFLAG_RD,
3058 NULL, "Rx MAC statistics");
3059 child = SYSCTL_CHILDREN(tree);
3060
3061 NFE_SYSCTL_STAT_ADD32(ctx, child, "frame_errors",
3062 &stats->rx_frame_errors, "Framing Errors");
3063 NFE_SYSCTL_STAT_ADD32(ctx, child, "extra_bytes",
3064 &stats->rx_extra_bytes, "Extra Bytes");
3065 NFE_SYSCTL_STAT_ADD32(ctx, child, "late_cols",
3066 &stats->rx_late_cols, "Late Collisions");
3067 NFE_SYSCTL_STAT_ADD32(ctx, child, "runts",
3068 &stats->rx_runts, "Runts");
3069 NFE_SYSCTL_STAT_ADD32(ctx, child, "jumbos",
3070 &stats->rx_jumbos, "Jumbos");
3071 NFE_SYSCTL_STAT_ADD32(ctx, child, "fifo_overuns",
3072 &stats->rx_fifo_overuns, "FIFO Overruns");
3073 NFE_SYSCTL_STAT_ADD32(ctx, child, "crc_errors",
3074 &stats->rx_crc_errors, "CRC Errors");
3075 NFE_SYSCTL_STAT_ADD32(ctx, child, "fae",
3076 &stats->rx_fae, "Frame Alignment Errors");
3077 NFE_SYSCTL_STAT_ADD32(ctx, child, "len_errors",
3078 &stats->rx_len_errors, "Length Errors");
3079 NFE_SYSCTL_STAT_ADD32(ctx, child, "unicast",
3080 &stats->rx_unicast, "Unicast Frames");
3081 NFE_SYSCTL_STAT_ADD32(ctx, child, "multicast",
3082 &stats->rx_multicast, "Multicast Frames");
3083 NFE_SYSCTL_STAT_ADD32(ctx, child, "brocadcast",
3084 &stats->rx_broadcast, "Broadcast Frames");
3085 if ((sc->nfe_flags & NFE_MIB_V2) != 0) {
3086 NFE_SYSCTL_STAT_ADD64(ctx, child, "octets",
3087 &stats->rx_octets, "Octets");
3088 NFE_SYSCTL_STAT_ADD32(ctx, child, "pause",
3089 &stats->rx_pause, "Pause frames");
3090 NFE_SYSCTL_STAT_ADD32(ctx, child, "drops",
3091 &stats->rx_drops, "Drop frames");
3092 }
3093
3094 /* Tx statistics. */
3095 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD,
3096 NULL, "Tx MAC statistics");
3097 child = SYSCTL_CHILDREN(tree);
3098 NFE_SYSCTL_STAT_ADD64(ctx, child, "octets",
3099 &stats->tx_octets, "Octets");
3100 NFE_SYSCTL_STAT_ADD32(ctx, child, "zero_rexmits",
3101 &stats->tx_zero_rexmits, "Zero Retransmits");
3102 NFE_SYSCTL_STAT_ADD32(ctx, child, "one_rexmits",
3103 &stats->tx_one_rexmits, "One Retransmits");
3104 NFE_SYSCTL_STAT_ADD32(ctx, child, "multi_rexmits",
3105 &stats->tx_multi_rexmits, "Multiple Retransmits");
3106 NFE_SYSCTL_STAT_ADD32(ctx, child, "late_cols",
3107 &stats->tx_late_cols, "Late Collisions");
3108 NFE_SYSCTL_STAT_ADD32(ctx, child, "fifo_underuns",
3109 &stats->tx_fifo_underuns, "FIFO Underruns");
3110 NFE_SYSCTL_STAT_ADD32(ctx, child, "carrier_losts",
3111 &stats->tx_carrier_losts, "Carrier Losts");
3112 NFE_SYSCTL_STAT_ADD32(ctx, child, "excess_deferrals",
3113 &stats->tx_excess_deferals, "Excess Deferrals");
3114 NFE_SYSCTL_STAT_ADD32(ctx, child, "retry_errors",
3115 &stats->tx_retry_errors, "Retry Errors");
3116 if ((sc->nfe_flags & NFE_MIB_V2) != 0) {
3117 NFE_SYSCTL_STAT_ADD32(ctx, child, "deferrals",
3118 &stats->tx_deferals, "Deferrals");
3119 NFE_SYSCTL_STAT_ADD32(ctx, child, "frames",
3120 &stats->tx_frames, "Frames");
3121 NFE_SYSCTL_STAT_ADD32(ctx, child, "pause",
3122 &stats->tx_pause, "Pause Frames");
3123 }
3124 if ((sc->nfe_flags & NFE_MIB_V3) != 0) {
3125 NFE_SYSCTL_STAT_ADD32(ctx, child, "unicast",
3126 &stats->tx_deferals, "Unicast Frames");
3127 NFE_SYSCTL_STAT_ADD32(ctx, child, "multicast",
3128 &stats->tx_frames, "Multicast Frames");
3129 NFE_SYSCTL_STAT_ADD32(ctx, child, "broadcast",
3130 &stats->tx_pause, "Broadcast Frames");
3131 }
3132}
3133
3134#undef NFE_SYSCTL_STAT_ADD32
3135#undef NFE_SYSCTL_STAT_ADD64
3136
3137static void
3138nfe_stats_clear(struct nfe_softc *sc)
3139{
3140 int i, mib_cnt;
3141
3142 if ((sc->nfe_flags & NFE_MIB_V1) != 0)
3143 mib_cnt = NFE_NUM_MIB_STATV1;
3144 else if ((sc->nfe_flags & (NFE_MIB_V2 | NFE_MIB_V3)) != 0)
3145 mib_cnt = NFE_NUM_MIB_STATV2;
3146 else
3147 return;
3148
3149 for (i = 0; i < mib_cnt; i += sizeof(uint32_t))
3150 NFE_READ(sc, NFE_TX_OCTET + i);
3151
3152 if ((sc->nfe_flags & NFE_MIB_V3) != 0) {
3153 NFE_READ(sc, NFE_TX_UNICAST);
3154 NFE_READ(sc, NFE_TX_MULTICAST);
3155 NFE_READ(sc, NFE_TX_BROADCAST);
3156 }
3157}
3158
3159static void
3160nfe_stats_update(struct nfe_softc *sc)
3161{
3162 struct nfe_hw_stats *stats;
3163
3164 NFE_LOCK_ASSERT(sc);
3165
3166 if ((sc->nfe_flags & (NFE_MIB_V1 | NFE_MIB_V2 | NFE_MIB_V3)) == 0)
3167 return;
3168
3169 stats = &sc->nfe_stats;
3170 stats->tx_octets += NFE_READ(sc, NFE_TX_OCTET);
3171 stats->tx_zero_rexmits += NFE_READ(sc, NFE_TX_ZERO_REXMIT);
3172 stats->tx_one_rexmits += NFE_READ(sc, NFE_TX_ONE_REXMIT);
3173 stats->tx_multi_rexmits += NFE_READ(sc, NFE_TX_MULTI_REXMIT);
3174 stats->tx_late_cols += NFE_READ(sc, NFE_TX_LATE_COL);
3175 stats->tx_fifo_underuns += NFE_READ(sc, NFE_TX_FIFO_UNDERUN);
3176 stats->tx_carrier_losts += NFE_READ(sc, NFE_TX_CARRIER_LOST);
3177 stats->tx_excess_deferals += NFE_READ(sc, NFE_TX_EXCESS_DEFERRAL);
3178 stats->tx_retry_errors += NFE_READ(sc, NFE_TX_RETRY_ERROR);
3179 stats->rx_frame_errors += NFE_READ(sc, NFE_RX_FRAME_ERROR);
3180 stats->rx_extra_bytes += NFE_READ(sc, NFE_RX_EXTRA_BYTES);
3181 stats->rx_late_cols += NFE_READ(sc, NFE_RX_LATE_COL);
3182 stats->rx_runts += NFE_READ(sc, NFE_RX_RUNT);
3183 stats->rx_jumbos += NFE_READ(sc, NFE_RX_JUMBO);
3184 stats->rx_fifo_overuns += NFE_READ(sc, NFE_RX_FIFO_OVERUN);
3185 stats->rx_crc_errors += NFE_READ(sc, NFE_RX_CRC_ERROR);
3186 stats->rx_fae += NFE_READ(sc, NFE_RX_FAE);
3187 stats->rx_len_errors += NFE_READ(sc, NFE_RX_LEN_ERROR);
3188 stats->rx_unicast += NFE_READ(sc, NFE_RX_UNICAST);
3189 stats->rx_multicast += NFE_READ(sc, NFE_RX_MULTICAST);
3190 stats->rx_broadcast += NFE_READ(sc, NFE_RX_BROADCAST);
3191
3192 if ((sc->nfe_flags & NFE_MIB_V2) != 0) {
3193 stats->tx_deferals += NFE_READ(sc, NFE_TX_DEFERAL);
3194 stats->tx_frames += NFE_READ(sc, NFE_TX_FRAME);
3195 stats->rx_octets += NFE_READ(sc, NFE_RX_OCTET);
3196 stats->tx_pause += NFE_READ(sc, NFE_TX_PAUSE);
3197 stats->rx_pause += NFE_READ(sc, NFE_RX_PAUSE);
3198 stats->rx_drops += NFE_READ(sc, NFE_RX_DROP);
3199 }
3200
3201 if ((sc->nfe_flags & NFE_MIB_V3) != 0) {
3202 stats->tx_unicast += NFE_READ(sc, NFE_TX_UNICAST);
3203 stats->tx_multicast += NFE_READ(sc, NFE_TX_MULTICAST);
3204 stats->rx_broadcast += NFE_READ(sc, NFE_TX_BROADCAST);
3205 }
3206}