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if_ath.c (227328) if_ath.c (227344)
1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 14 unchanged lines hidden (view full) ---

23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 14 unchanged lines hidden (view full) ---

23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 227328 2011-11-08 02:12:11Z adrian $");
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 227344 2011-11-08 17:08:12Z adrian $");
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39

--- 218 unchanged lines hidden (view full) ---

258SYSCTL_INT(_hw_ath, OID_AUTO, txbuf, CTLFLAG_RW, &ath_txbuf,
259 0, "tx buffers allocated");
260TUNABLE_INT("hw.ath.txbuf", &ath_txbuf);
261
262static int ath_bstuck_threshold = 4; /* max missed beacons */
263SYSCTL_INT(_hw_ath, OID_AUTO, bstuck, CTLFLAG_RW, &ath_bstuck_threshold,
264 0, "max missed beacon xmits before chip reset");
265
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39

--- 218 unchanged lines hidden (view full) ---

258SYSCTL_INT(_hw_ath, OID_AUTO, txbuf, CTLFLAG_RW, &ath_txbuf,
259 0, "tx buffers allocated");
260TUNABLE_INT("hw.ath.txbuf", &ath_txbuf);
261
262static int ath_bstuck_threshold = 4; /* max missed beacons */
263SYSCTL_INT(_hw_ath, OID_AUTO, bstuck, CTLFLAG_RW, &ath_bstuck_threshold,
264 0, "max missed beacon xmits before chip reset");
265
266static MALLOC_DEFINE(M_ATHDEV, "athdev", "ath driver dma buffers");
266MALLOC_DEFINE(M_ATHDEV, "athdev", "ath driver dma buffers");
267
268#define HAL_MODE_HT20 (HAL_MODE_11NG_HT20 | HAL_MODE_11NA_HT20)
269#define HAL_MODE_HT40 \
270 (HAL_MODE_11NG_HT40PLUS | HAL_MODE_11NG_HT40MINUS | \
271 HAL_MODE_11NA_HT40PLUS | HAL_MODE_11NA_HT40MINUS)
272int
273ath_attach(u_int16_t devid, struct ath_softc *sc)
274{

--- 672 unchanged lines hidden (view full) ---

947 break;
948 default:
949 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
950 goto bad;
951 }
952 /*
953 * Check that a beacon buffer is available; the code below assumes it.
954 */
267
268#define HAL_MODE_HT20 (HAL_MODE_11NG_HT20 | HAL_MODE_11NA_HT20)
269#define HAL_MODE_HT40 \
270 (HAL_MODE_11NG_HT40PLUS | HAL_MODE_11NG_HT40MINUS | \
271 HAL_MODE_11NA_HT40PLUS | HAL_MODE_11NA_HT40MINUS)
272int
273ath_attach(u_int16_t devid, struct ath_softc *sc)
274{

--- 672 unchanged lines hidden (view full) ---

947 break;
948 default:
949 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
950 goto bad;
951 }
952 /*
953 * Check that a beacon buffer is available; the code below assumes it.
954 */
955 if (needbeacon & STAILQ_EMPTY(&sc->sc_bbuf)) {
955 if (needbeacon & TAILQ_EMPTY(&sc->sc_bbuf)) {
956 device_printf(sc->sc_dev, "no beacon buffer available\n");
957 goto bad;
958 }
959
960 /* STA, AHDEMO? */
961 if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) {
962 assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
963 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask);

--- 45 unchanged lines hidden (view full) ---

1009
1010 avp->av_bslot = -1;
1011 if (needbeacon) {
1012 /*
1013 * Allocate beacon state and setup the q for buffered
1014 * multicast frames. We know a beacon buffer is
1015 * available because we checked above.
1016 */
956 device_printf(sc->sc_dev, "no beacon buffer available\n");
957 goto bad;
958 }
959
960 /* STA, AHDEMO? */
961 if (opmode == IEEE80211_M_HOSTAP || opmode == IEEE80211_M_MBSS) {
962 assign_address(sc, mac, flags & IEEE80211_CLONE_BSSID);
963 ath_hal_setbssidmask(sc->sc_ah, sc->sc_hwbssidmask);

--- 45 unchanged lines hidden (view full) ---

1009
1010 avp->av_bslot = -1;
1011 if (needbeacon) {
1012 /*
1013 * Allocate beacon state and setup the q for buffered
1014 * multicast frames. We know a beacon buffer is
1015 * available because we checked above.
1016 */
1017 avp->av_bcbuf = STAILQ_FIRST(&sc->sc_bbuf);
1018 STAILQ_REMOVE_HEAD(&sc->sc_bbuf, bf_list);
1017 avp->av_bcbuf = TAILQ_FIRST(&sc->sc_bbuf);
1018 TAILQ_REMOVE(&sc->sc_bbuf, avp->av_bcbuf, bf_list);
1019 if (opmode != IEEE80211_M_IBSS || !sc->sc_hasveol) {
1020 /*
1021 * Assign the vap to a beacon xmit slot. As above
1022 * this cannot fail to find a free one.
1023 */
1024 avp->av_bslot = assign_bslot(sc);
1025 KASSERT(sc->sc_bslot[avp->av_bslot] == NULL,
1026 ("beacon slot %u not empty", avp->av_bslot));

--- 764 unchanged lines hidden (view full) ---

1791
1792struct ath_buf *
1793_ath_getbuf_locked(struct ath_softc *sc)
1794{
1795 struct ath_buf *bf;
1796
1797 ATH_TXBUF_LOCK_ASSERT(sc);
1798
1019 if (opmode != IEEE80211_M_IBSS || !sc->sc_hasveol) {
1020 /*
1021 * Assign the vap to a beacon xmit slot. As above
1022 * this cannot fail to find a free one.
1023 */
1024 avp->av_bslot = assign_bslot(sc);
1025 KASSERT(sc->sc_bslot[avp->av_bslot] == NULL,
1026 ("beacon slot %u not empty", avp->av_bslot));

--- 764 unchanged lines hidden (view full) ---

1791
1792struct ath_buf *
1793_ath_getbuf_locked(struct ath_softc *sc)
1794{
1795 struct ath_buf *bf;
1796
1797 ATH_TXBUF_LOCK_ASSERT(sc);
1798
1799 bf = STAILQ_FIRST(&sc->sc_txbuf);
1799 bf = TAILQ_FIRST(&sc->sc_txbuf);
1800 if (bf != NULL && (bf->bf_flags & ATH_BUF_BUSY) == 0)
1800 if (bf != NULL && (bf->bf_flags & ATH_BUF_BUSY) == 0)
1801 STAILQ_REMOVE_HEAD(&sc->sc_txbuf, bf_list);
1801 TAILQ_REMOVE(&sc->sc_txbuf, bf, bf_list);
1802 else
1803 bf = NULL;
1804 if (bf == NULL) {
1805 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: %s\n", __func__,
1802 else
1803 bf = NULL;
1804 if (bf == NULL) {
1805 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: %s\n", __func__,
1806 STAILQ_FIRST(&sc->sc_txbuf) == NULL ?
1806 TAILQ_FIRST(&sc->sc_txbuf) == NULL ?
1807 "out of xmit buffers" : "xmit buffer busy");
1808 }
1809 return bf;
1810}
1811
1812struct ath_buf *
1813ath_getbuf(struct ath_softc *sc)
1814{

--- 29 unchanged lines hidden (view full) ---

1844 */
1845 bf = ath_getbuf(sc);
1846 if (bf == NULL)
1847 break;
1848
1849 IFQ_DEQUEUE(&ifp->if_snd, m);
1850 if (m == NULL) {
1851 ATH_TXBUF_LOCK(sc);
1807 "out of xmit buffers" : "xmit buffer busy");
1808 }
1809 return bf;
1810}
1811
1812struct ath_buf *
1813ath_getbuf(struct ath_softc *sc)
1814{

--- 29 unchanged lines hidden (view full) ---

1844 */
1845 bf = ath_getbuf(sc);
1846 if (bf == NULL)
1847 break;
1848
1849 IFQ_DEQUEUE(&ifp->if_snd, m);
1850 if (m == NULL) {
1851 ATH_TXBUF_LOCK(sc);
1852 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1852 TAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1853 ATH_TXBUF_UNLOCK(sc);
1854 break;
1855 }
1856 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1857 /*
1858 * Check for fragmentation. If this frame
1859 * has been broken up verify we have enough
1860 * buffers to send all the fragments so all
1861 * go out or none...
1862 */
1853 ATH_TXBUF_UNLOCK(sc);
1854 break;
1855 }
1856 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1857 /*
1858 * Check for fragmentation. If this frame
1859 * has been broken up verify we have enough
1860 * buffers to send all the fragments so all
1861 * go out or none...
1862 */
1863 STAILQ_INIT(&frags);
1863 TAILQ_INIT(&frags);
1864 if ((m->m_flags & M_FRAG) &&
1865 !ath_txfrag_setup(sc, &frags, m, ni)) {
1866 DPRINTF(sc, ATH_DEBUG_XMIT,
1867 "%s: out of txfrag buffers\n", __func__);
1868 sc->sc_stats.ast_tx_nofrag++;
1869 ifp->if_oerrors++;
1870 ath_freetx(m);
1871 goto bad;

--- 15 unchanged lines hidden (view full) ---

1887 next = m->m_nextpkt;
1888 if (ath_tx_start(sc, ni, bf, m)) {
1889 bad:
1890 ifp->if_oerrors++;
1891 reclaim:
1892 bf->bf_m = NULL;
1893 bf->bf_node = NULL;
1894 ATH_TXBUF_LOCK(sc);
1864 if ((m->m_flags & M_FRAG) &&
1865 !ath_txfrag_setup(sc, &frags, m, ni)) {
1866 DPRINTF(sc, ATH_DEBUG_XMIT,
1867 "%s: out of txfrag buffers\n", __func__);
1868 sc->sc_stats.ast_tx_nofrag++;
1869 ifp->if_oerrors++;
1870 ath_freetx(m);
1871 goto bad;

--- 15 unchanged lines hidden (view full) ---

1887 next = m->m_nextpkt;
1888 if (ath_tx_start(sc, ni, bf, m)) {
1889 bad:
1890 ifp->if_oerrors++;
1891 reclaim:
1892 bf->bf_m = NULL;
1893 bf->bf_node = NULL;
1894 ATH_TXBUF_LOCK(sc);
1895 STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1895 TAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
1896 ath_txfrag_cleanup(sc, &frags, ni);
1897 ATH_TXBUF_UNLOCK(sc);
1898 if (ni != NULL)
1899 ieee80211_free_node(ni);
1900 continue;
1901 }
1902 if (next != NULL) {
1903 /*

--- 4 unchanged lines hidden (view full) ---

1908 DPRINTF(sc, ATH_DEBUG_XMIT,
1909 "%s: flush fragmented packet, state %s\n",
1910 __func__,
1911 ieee80211_state_name[ni->ni_vap->iv_state]);
1912 ath_freetx(next);
1913 goto reclaim;
1914 }
1915 m = next;
1896 ath_txfrag_cleanup(sc, &frags, ni);
1897 ATH_TXBUF_UNLOCK(sc);
1898 if (ni != NULL)
1899 ieee80211_free_node(ni);
1900 continue;
1901 }
1902 if (next != NULL) {
1903 /*

--- 4 unchanged lines hidden (view full) ---

1908 DPRINTF(sc, ATH_DEBUG_XMIT,
1909 "%s: flush fragmented packet, state %s\n",
1910 __func__,
1911 ieee80211_state_name[ni->ni_vap->iv_state]);
1912 ath_freetx(next);
1913 goto reclaim;
1914 }
1915 m = next;
1916 bf = STAILQ_FIRST(&frags);
1916 bf = TAILQ_FIRST(&frags);
1917 KASSERT(bf != NULL, ("no buf for txfrag"));
1917 KASSERT(bf != NULL, ("no buf for txfrag"));
1918 STAILQ_REMOVE_HEAD(&frags, bf_list);
1918 TAILQ_REMOVE(&frags, bf, bf_list);
1919 goto nextfrag;
1920 }
1921
1922 sc->sc_wd_timer = 5;
1923 }
1924}
1925
1926static int

--- 482 unchanged lines hidden (view full) ---

2409
2410/*
2411 * Append the contents of src to dst; both queues
2412 * are assumed to be locked.
2413 */
2414static void
2415ath_txqmove(struct ath_txq *dst, struct ath_txq *src)
2416{
1919 goto nextfrag;
1920 }
1921
1922 sc->sc_wd_timer = 5;
1923 }
1924}
1925
1926static int

--- 482 unchanged lines hidden (view full) ---

2409
2410/*
2411 * Append the contents of src to dst; both queues
2412 * are assumed to be locked.
2413 */
2414static void
2415ath_txqmove(struct ath_txq *dst, struct ath_txq *src)
2416{
2417 STAILQ_CONCAT(&dst->axq_q, &src->axq_q);
2417 TAILQ_CONCAT(&dst->axq_q, &src->axq_q, bf_list);
2418 dst->axq_link = src->axq_link;
2419 src->axq_link = NULL;
2420 dst->axq_depth += src->axq_depth;
2421 src->axq_depth = 0;
2422}
2423
2424/*
2425 * Transmit a beacon frame at SWBA. Dynamic updates to the

--- 178 unchanged lines hidden (view full) ---

2604 ATH_TXQ_LOCK(&avp->av_mcastq);
2605 if (nmcastq) {
2606 struct ath_buf *bfm;
2607
2608 /*
2609 * Move frames from the s/w mcast q to the h/w cab q.
2610 * XXX MORE_DATA bit
2611 */
2418 dst->axq_link = src->axq_link;
2419 src->axq_link = NULL;
2420 dst->axq_depth += src->axq_depth;
2421 src->axq_depth = 0;
2422}
2423
2424/*
2425 * Transmit a beacon frame at SWBA. Dynamic updates to the

--- 178 unchanged lines hidden (view full) ---

2604 ATH_TXQ_LOCK(&avp->av_mcastq);
2605 if (nmcastq) {
2606 struct ath_buf *bfm;
2607
2608 /*
2609 * Move frames from the s/w mcast q to the h/w cab q.
2610 * XXX MORE_DATA bit
2611 */
2612 bfm = STAILQ_FIRST(&avp->av_mcastq.axq_q);
2612 bfm = TAILQ_FIRST(&avp->av_mcastq.axq_q);
2613 if (cabq->axq_link != NULL) {
2614 *cabq->axq_link = bfm->bf_daddr;
2615 } else
2616 ath_hal_puttxbuf(ah, cabq->axq_qnum,
2617 bfm->bf_daddr);
2618 ath_txqmove(cabq, &avp->av_mcastq);
2619
2620 sc->sc_stats.ast_cabq_xmit += nmcastq;
2621 }
2622 /* NB: gated by beacon so safe to start here */
2613 if (cabq->axq_link != NULL) {
2614 *cabq->axq_link = bfm->bf_daddr;
2615 } else
2616 ath_hal_puttxbuf(ah, cabq->axq_qnum,
2617 bfm->bf_daddr);
2618 ath_txqmove(cabq, &avp->av_mcastq);
2619
2620 sc->sc_stats.ast_cabq_xmit += nmcastq;
2621 }
2622 /* NB: gated by beacon so safe to start here */
2623 if (! STAILQ_EMPTY(&(cabq->axq_q)))
2623 if (! TAILQ_EMPTY(&(cabq->axq_q)))
2624 ath_hal_txstart(ah, cabq->axq_qnum);
2625 ATH_TXQ_UNLOCK(&avp->av_mcastq);
2626 ATH_TXQ_UNLOCK(cabq);
2627 }
2628 return bf;
2629}
2630
2631static void

--- 62 unchanged lines hidden (view full) ---

2694 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2695 m_freem(bf->bf_m);
2696 bf->bf_m = NULL;
2697 }
2698 if (bf->bf_node != NULL) {
2699 ieee80211_free_node(bf->bf_node);
2700 bf->bf_node = NULL;
2701 }
2624 ath_hal_txstart(ah, cabq->axq_qnum);
2625 ATH_TXQ_UNLOCK(&avp->av_mcastq);
2626 ATH_TXQ_UNLOCK(cabq);
2627 }
2628 return bf;
2629}
2630
2631static void

--- 62 unchanged lines hidden (view full) ---

2694 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2695 m_freem(bf->bf_m);
2696 bf->bf_m = NULL;
2697 }
2698 if (bf->bf_node != NULL) {
2699 ieee80211_free_node(bf->bf_node);
2700 bf->bf_node = NULL;
2701 }
2702 STAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
2702 TAILQ_INSERT_TAIL(&sc->sc_bbuf, bf, bf_list);
2703}
2704
2705/*
2706 * Reclaim beacon resources.
2707 */
2708static void
2709ath_beacon_free(struct ath_softc *sc)
2710{
2711 struct ath_buf *bf;
2712
2703}
2704
2705/*
2706 * Reclaim beacon resources.
2707 */
2708static void
2709ath_beacon_free(struct ath_softc *sc)
2710{
2711 struct ath_buf *bf;
2712
2713 STAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) {
2713 TAILQ_FOREACH(bf, &sc->sc_bbuf, bf_list) {
2714 if (bf->bf_m != NULL) {
2715 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2716 m_freem(bf->bf_m);
2717 bf->bf_m = NULL;
2718 }
2719 if (bf->bf_node != NULL) {
2720 ieee80211_free_node(bf->bf_node);
2721 bf->bf_node = NULL;

--- 302 unchanged lines hidden (view full) ---

3024 bf = malloc(bsize, M_ATHDEV, M_NOWAIT | M_ZERO);
3025 if (bf == NULL) {
3026 if_printf(ifp, "malloc of %s buffers failed, size %u\n",
3027 dd->dd_name, bsize);
3028 goto fail3;
3029 }
3030 dd->dd_bufptr = bf;
3031
2714 if (bf->bf_m != NULL) {
2715 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
2716 m_freem(bf->bf_m);
2717 bf->bf_m = NULL;
2718 }
2719 if (bf->bf_node != NULL) {
2720 ieee80211_free_node(bf->bf_node);
2721 bf->bf_node = NULL;

--- 302 unchanged lines hidden (view full) ---

3024 bf = malloc(bsize, M_ATHDEV, M_NOWAIT | M_ZERO);
3025 if (bf == NULL) {
3026 if_printf(ifp, "malloc of %s buffers failed, size %u\n",
3027 dd->dd_name, bsize);
3028 goto fail3;
3029 }
3030 dd->dd_bufptr = bf;
3031
3032 STAILQ_INIT(head);
3032 TAILQ_INIT(head);
3033 for (i = 0; i < nbuf; i++, bf++, ds += (ndesc * desc_len)) {
3034 bf->bf_desc = (struct ath_desc *) ds;
3035 bf->bf_daddr = DS2PHYS(dd, ds);
3036 if (! ath_hal_split4ktrans(sc->sc_ah)) {
3037 /*
3038 * Merlin WAR: Skip descriptor addresses which
3039 * cause 4KB boundary crossing along any point
3040 * in the descriptor.

--- 9 unchanged lines hidden (view full) ---

3050 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
3051 &bf->bf_dmamap);
3052 if (error != 0) {
3053 if_printf(ifp, "unable to create dmamap for %s "
3054 "buffer %u, error %u\n", dd->dd_name, i, error);
3055 ath_descdma_cleanup(sc, dd, head);
3056 return error;
3057 }
3033 for (i = 0; i < nbuf; i++, bf++, ds += (ndesc * desc_len)) {
3034 bf->bf_desc = (struct ath_desc *) ds;
3035 bf->bf_daddr = DS2PHYS(dd, ds);
3036 if (! ath_hal_split4ktrans(sc->sc_ah)) {
3037 /*
3038 * Merlin WAR: Skip descriptor addresses which
3039 * cause 4KB boundary crossing along any point
3040 * in the descriptor.

--- 9 unchanged lines hidden (view full) ---

3050 error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
3051 &bf->bf_dmamap);
3052 if (error != 0) {
3053 if_printf(ifp, "unable to create dmamap for %s "
3054 "buffer %u, error %u\n", dd->dd_name, i, error);
3055 ath_descdma_cleanup(sc, dd, head);
3056 return error;
3057 }
3058 STAILQ_INSERT_TAIL(head, bf, bf_list);
3058 TAILQ_INSERT_TAIL(head, bf, bf_list);
3059 }
3060 return 0;
3061fail3:
3062 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
3063fail2:
3064 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3065fail1:
3066 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);

--- 12 unchanged lines hidden (view full) ---

3079 struct ath_buf *bf;
3080 struct ieee80211_node *ni;
3081
3082 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
3083 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3084 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
3085 bus_dma_tag_destroy(dd->dd_dmat);
3086
3059 }
3060 return 0;
3061fail3:
3062 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
3063fail2:
3064 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3065fail1:
3066 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);

--- 12 unchanged lines hidden (view full) ---

3079 struct ath_buf *bf;
3080 struct ieee80211_node *ni;
3081
3082 bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
3083 bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
3084 bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap);
3085 bus_dma_tag_destroy(dd->dd_dmat);
3086
3087 STAILQ_FOREACH(bf, head, bf_list) {
3087 TAILQ_FOREACH(bf, head, bf_list) {
3088 if (bf->bf_m) {
3089 m_freem(bf->bf_m);
3090 bf->bf_m = NULL;
3091 }
3092 if (bf->bf_dmamap != NULL) {
3093 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
3094 bf->bf_dmamap = NULL;
3095 }
3096 ni = bf->bf_node;
3097 bf->bf_node = NULL;
3098 if (ni != NULL) {
3099 /*
3100 * Reclaim node reference.
3101 */
3102 ieee80211_free_node(ni);
3103 }
3104 }
3105
3088 if (bf->bf_m) {
3089 m_freem(bf->bf_m);
3090 bf->bf_m = NULL;
3091 }
3092 if (bf->bf_dmamap != NULL) {
3093 bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
3094 bf->bf_dmamap = NULL;
3095 }
3096 ni = bf->bf_node;
3097 bf->bf_node = NULL;
3098 if (ni != NULL) {
3099 /*
3100 * Reclaim node reference.
3101 */
3102 ieee80211_free_node(ni);
3103 }
3104 }
3105
3106 STAILQ_INIT(head);
3106 TAILQ_INIT(head);
3107 free(dd->dd_bufptr, M_ATHDEV);
3108 memset(dd, 0, sizeof(*dd));
3109}
3110
3111static int
3112ath_desc_alloc(struct ath_softc *sc)
3113{
3114 int error;

--- 365 unchanged lines hidden (view full) ---

3480 u_int64_t tsf;
3481
3482 DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending);
3483 ngood = 0;
3484 nf = ath_hal_getchannoise(ah, sc->sc_curchan);
3485 sc->sc_stats.ast_rx_noise = nf;
3486 tsf = ath_hal_gettsf64(ah);
3487 do {
3107 free(dd->dd_bufptr, M_ATHDEV);
3108 memset(dd, 0, sizeof(*dd));
3109}
3110
3111static int
3112ath_desc_alloc(struct ath_softc *sc)
3113{
3114 int error;

--- 365 unchanged lines hidden (view full) ---

3480 u_int64_t tsf;
3481
3482 DPRINTF(sc, ATH_DEBUG_RX_PROC, "%s: pending %u\n", __func__, npending);
3483 ngood = 0;
3484 nf = ath_hal_getchannoise(ah, sc->sc_curchan);
3485 sc->sc_stats.ast_rx_noise = nf;
3486 tsf = ath_hal_gettsf64(ah);
3487 do {
3488 bf = STAILQ_FIRST(&sc->sc_rxbuf);
3488 bf = TAILQ_FIRST(&sc->sc_rxbuf);
3489 if (sc->sc_rxslink && bf == NULL) { /* NB: shouldn't happen */
3490 if_printf(ifp, "%s: no buffer!\n", __func__);
3491 break;
3492 } else if (bf == NULL) {
3493 /*
3494 * End of List:
3495 * this can happen for non-self-linked RX chains
3496 */
3497 sc->sc_stats.ast_rx_hitqueueend++;
3498 break;
3499 }
3500 m = bf->bf_m;
3501 if (m == NULL) { /* NB: shouldn't happen */
3502 /*
3503 * If mbuf allocation failed previously there
3504 * will be no mbuf; try again to re-populate it.
3505 */
3506 /* XXX make debug msg */
3507 if_printf(ifp, "%s: no mbuf!\n", __func__);
3489 if (sc->sc_rxslink && bf == NULL) { /* NB: shouldn't happen */
3490 if_printf(ifp, "%s: no buffer!\n", __func__);
3491 break;
3492 } else if (bf == NULL) {
3493 /*
3494 * End of List:
3495 * this can happen for non-self-linked RX chains
3496 */
3497 sc->sc_stats.ast_rx_hitqueueend++;
3498 break;
3499 }
3500 m = bf->bf_m;
3501 if (m == NULL) { /* NB: shouldn't happen */
3502 /*
3503 * If mbuf allocation failed previously there
3504 * will be no mbuf; try again to re-populate it.
3505 */
3506 /* XXX make debug msg */
3507 if_printf(ifp, "%s: no mbuf!\n", __func__);
3508 STAILQ_REMOVE_HEAD(&sc->sc_rxbuf, bf_list);
3508 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
3509 goto rx_next;
3510 }
3511 ds = bf->bf_desc;
3512 if (ds->ds_link == bf->bf_daddr) {
3513 /* NB: never process the self-linked entry at the end */
3514 sc->sc_stats.ast_rx_hitqueueend++;
3515 break;
3516 }

--- 13 unchanged lines hidden (view full) ---

3530 status = ath_hal_rxprocdesc(ah, ds,
3531 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
3532#ifdef ATH_DEBUG
3533 if (sc->sc_debug & ATH_DEBUG_RECV_DESC)
3534 ath_printrxbuf(sc, bf, 0, status == HAL_OK);
3535#endif
3536 if (status == HAL_EINPROGRESS)
3537 break;
3509 goto rx_next;
3510 }
3511 ds = bf->bf_desc;
3512 if (ds->ds_link == bf->bf_daddr) {
3513 /* NB: never process the self-linked entry at the end */
3514 sc->sc_stats.ast_rx_hitqueueend++;
3515 break;
3516 }

--- 13 unchanged lines hidden (view full) ---

3530 status = ath_hal_rxprocdesc(ah, ds,
3531 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
3532#ifdef ATH_DEBUG
3533 if (sc->sc_debug & ATH_DEBUG_RECV_DESC)
3534 ath_printrxbuf(sc, bf, 0, status == HAL_OK);
3535#endif
3536 if (status == HAL_EINPROGRESS)
3537 break;
3538 STAILQ_REMOVE_HEAD(&sc->sc_rxbuf, bf_list);
3539
3538
3539 TAILQ_REMOVE(&sc->sc_rxbuf, bf, bf_list);
3540
3540 /* These aren't specifically errors */
3541 if (rs->rs_flags & HAL_RX_GI)
3542 sc->sc_stats.ast_rx_halfgi++;
3543 if (rs->rs_flags & HAL_RX_2040)
3544 sc->sc_stats.ast_rx_2040++;
3545 if (rs->rs_flags & HAL_RX_DELIM_CRC_PRE)
3546 sc->sc_stats.ast_rx_pre_crc_err++;
3547 if (rs->rs_flags & HAL_RX_DELIM_CRC_POST)

--- 251 unchanged lines hidden (view full) ---

3799 if (type == IEEE80211_FC0_TYPE_DATA) {
3800 const HAL_RATE_TABLE *rt = sc->sc_currates;
3801 ath_led_event(sc,
3802 rt->rateCodeToIndex[rs->rs_rate]);
3803 } else if (ticks - sc->sc_ledevent >= sc->sc_ledidle)
3804 ath_led_event(sc, 0);
3805 }
3806rx_next:
3541 /* These aren't specifically errors */
3542 if (rs->rs_flags & HAL_RX_GI)
3543 sc->sc_stats.ast_rx_halfgi++;
3544 if (rs->rs_flags & HAL_RX_2040)
3545 sc->sc_stats.ast_rx_2040++;
3546 if (rs->rs_flags & HAL_RX_DELIM_CRC_PRE)
3547 sc->sc_stats.ast_rx_pre_crc_err++;
3548 if (rs->rs_flags & HAL_RX_DELIM_CRC_POST)

--- 251 unchanged lines hidden (view full) ---

3800 if (type == IEEE80211_FC0_TYPE_DATA) {
3801 const HAL_RATE_TABLE *rt = sc->sc_currates;
3802 ath_led_event(sc,
3803 rt->rateCodeToIndex[rs->rs_rate]);
3804 } else if (ticks - sc->sc_ledevent >= sc->sc_ledidle)
3805 ath_led_event(sc, 0);
3806 }
3807rx_next:
3807 STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
3808 TAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
3808 } while (ath_rxbuf_init(sc, bf) == 0);
3809
3810 /* rx signal state monitoring */
3811 ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan);
3812 if (ngood)
3813 sc->sc_lastrx = tsf;
3814
3815 /* Queue DFS tasklet if needed */

--- 32 unchanged lines hidden (view full) ---

3848static void
3849ath_txq_init(struct ath_softc *sc, struct ath_txq *txq, int qnum)
3850{
3851 txq->axq_qnum = qnum;
3852 txq->axq_ac = 0;
3853 txq->axq_depth = 0;
3854 txq->axq_intrcnt = 0;
3855 txq->axq_link = NULL;
3809 } while (ath_rxbuf_init(sc, bf) == 0);
3810
3811 /* rx signal state monitoring */
3812 ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan);
3813 if (ngood)
3814 sc->sc_lastrx = tsf;
3815
3816 /* Queue DFS tasklet if needed */

--- 32 unchanged lines hidden (view full) ---

3849static void
3850ath_txq_init(struct ath_softc *sc, struct ath_txq *txq, int qnum)
3851{
3852 txq->axq_qnum = qnum;
3853 txq->axq_ac = 0;
3854 txq->axq_depth = 0;
3855 txq->axq_intrcnt = 0;
3856 txq->axq_link = NULL;
3856 STAILQ_INIT(&txq->axq_q);
3857 txq->axq_softc = sc;
3858 TAILQ_INIT(&txq->axq_q);
3859 TAILQ_INIT(&txq->axq_tidq);
3857 ATH_TXQ_LOCK_INIT(sc, txq);
3858}
3859
3860/*
3861 * Setup a h/w transmit queue.
3862 */
3863static struct ath_txq *
3864ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)

--- 218 unchanged lines hidden (view full) ---

4083 DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: tx queue %u head %p link %p\n",
4084 __func__, txq->axq_qnum,
4085 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, txq->axq_qnum),
4086 txq->axq_link);
4087 nacked = 0;
4088 for (;;) {
4089 ATH_TXQ_LOCK(txq);
4090 txq->axq_intrcnt = 0; /* reset periodic desc intr count */
3860 ATH_TXQ_LOCK_INIT(sc, txq);
3861}
3862
3863/*
3864 * Setup a h/w transmit queue.
3865 */
3866static struct ath_txq *
3867ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)

--- 218 unchanged lines hidden (view full) ---

4086 DPRINTF(sc, ATH_DEBUG_TX_PROC, "%s: tx queue %u head %p link %p\n",
4087 __func__, txq->axq_qnum,
4088 (caddr_t)(uintptr_t) ath_hal_gettxbuf(sc->sc_ah, txq->axq_qnum),
4089 txq->axq_link);
4090 nacked = 0;
4091 for (;;) {
4092 ATH_TXQ_LOCK(txq);
4093 txq->axq_intrcnt = 0; /* reset periodic desc intr count */
4091 bf = STAILQ_FIRST(&txq->axq_q);
4094 bf = TAILQ_FIRST(&txq->axq_q);
4092 if (bf == NULL) {
4093 ATH_TXQ_UNLOCK(txq);
4094 break;
4095 }
4096 ds0 = &bf->bf_desc[0];
4097 ds = &bf->bf_desc[bf->bf_nseg - 1];
4098 ts = &bf->bf_status.ds_txstat;
4099 status = ath_hal_txprocdesc(ah, ds, ts);
4100#ifdef ATH_DEBUG
4101 if (sc->sc_debug & ATH_DEBUG_XMIT_DESC)
4102 ath_printtxbuf(sc, bf, txq->axq_qnum, 0,
4103 status == HAL_OK);
4104#endif
4105 if (status == HAL_EINPROGRESS) {
4106 ATH_TXQ_UNLOCK(txq);
4107 break;
4108 }
4095 if (bf == NULL) {
4096 ATH_TXQ_UNLOCK(txq);
4097 break;
4098 }
4099 ds0 = &bf->bf_desc[0];
4100 ds = &bf->bf_desc[bf->bf_nseg - 1];
4101 ts = &bf->bf_status.ds_txstat;
4102 status = ath_hal_txprocdesc(ah, ds, ts);
4103#ifdef ATH_DEBUG
4104 if (sc->sc_debug & ATH_DEBUG_XMIT_DESC)
4105 ath_printtxbuf(sc, bf, txq->axq_qnum, 0,
4106 status == HAL_OK);
4107#endif
4108 if (status == HAL_EINPROGRESS) {
4109 ATH_TXQ_UNLOCK(txq);
4110 break;
4111 }
4109 ATH_TXQ_REMOVE_HEAD(txq, bf_list);
4112 ATH_TXQ_REMOVE(txq, bf, bf_list);
4110#ifdef IEEE80211_SUPPORT_TDMA
4111 if (txq->axq_depth > 0) {
4112 /*
4113 * More frames follow. Mark the buffer busy
4114 * so it's not re-used while the hardware may
4115 * still re-read the link field in the descriptor.
4116 */
4117 bf->bf_flags |= ATH_BUF_BUSY;

--- 76 unchanged lines hidden (view full) ---

4194 BUS_DMASYNC_POSTWRITE);
4195 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
4196
4197 m_freem(bf->bf_m);
4198 bf->bf_m = NULL;
4199 bf->bf_node = NULL;
4200
4201 ATH_TXBUF_LOCK(sc);
4113#ifdef IEEE80211_SUPPORT_TDMA
4114 if (txq->axq_depth > 0) {
4115 /*
4116 * More frames follow. Mark the buffer busy
4117 * so it's not re-used while the hardware may
4118 * still re-read the link field in the descriptor.
4119 */
4120 bf->bf_flags |= ATH_BUF_BUSY;

--- 76 unchanged lines hidden (view full) ---

4197 BUS_DMASYNC_POSTWRITE);
4198 bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
4199
4200 m_freem(bf->bf_m);
4201 bf->bf_m = NULL;
4202 bf->bf_node = NULL;
4203
4204 ATH_TXBUF_LOCK(sc);
4202 last = STAILQ_LAST(&sc->sc_txbuf, ath_buf, bf_list);
4205 last = TAILQ_LAST(&sc->sc_txbuf, ath_bufhead_s);
4203 if (last != NULL)
4204 last->bf_flags &= ~ATH_BUF_BUSY;
4206 if (last != NULL)
4207 last->bf_flags &= ~ATH_BUF_BUSY;
4205 STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
4208 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
4206 ATH_TXBUF_UNLOCK(sc);
4207 }
4208#ifdef IEEE80211_SUPPORT_SUPERG
4209 /*
4210 * Flush fast-frame staging queue when traffic slows.
4211 */
4212 if (txq->axq_depth <= 1)
4213 ieee80211_ff_flush(ic, txq->axq_ac);

--- 108 unchanged lines hidden (view full) ---

4322 struct ath_buf *bf;
4323 u_int ix;
4324
4325 /*
4326 * NB: this assumes output has been stopped and
4327 * we do not need to block ath_tx_proc
4328 */
4329 ATH_TXBUF_LOCK(sc);
4209 ATH_TXBUF_UNLOCK(sc);
4210 }
4211#ifdef IEEE80211_SUPPORT_SUPERG
4212 /*
4213 * Flush fast-frame staging queue when traffic slows.
4214 */
4215 if (txq->axq_depth <= 1)
4216 ieee80211_ff_flush(ic, txq->axq_ac);

--- 108 unchanged lines hidden (view full) ---

4325 struct ath_buf *bf;
4326 u_int ix;
4327
4328 /*
4329 * NB: this assumes output has been stopped and
4330 * we do not need to block ath_tx_proc
4331 */
4332 ATH_TXBUF_LOCK(sc);
4330 bf = STAILQ_LAST(&sc->sc_txbuf, ath_buf, bf_list);
4333 bf = TAILQ_LAST(&sc->sc_txbuf, ath_bufhead_s);
4331 if (bf != NULL)
4332 bf->bf_flags &= ~ATH_BUF_BUSY;
4333 ATH_TXBUF_UNLOCK(sc);
4334 for (ix = 0;; ix++) {
4335 ATH_TXQ_LOCK(txq);
4334 if (bf != NULL)
4335 bf->bf_flags &= ~ATH_BUF_BUSY;
4336 ATH_TXBUF_UNLOCK(sc);
4337 for (ix = 0;; ix++) {
4338 ATH_TXQ_LOCK(txq);
4336 bf = STAILQ_FIRST(&txq->axq_q);
4339 bf = TAILQ_FIRST(&txq->axq_q);
4337 if (bf == NULL) {
4338 txq->axq_link = NULL;
4339 ATH_TXQ_UNLOCK(txq);
4340 break;
4341 }
4340 if (bf == NULL) {
4341 txq->axq_link = NULL;
4342 ATH_TXQ_UNLOCK(txq);
4343 break;
4344 }
4342 ATH_TXQ_REMOVE_HEAD(txq, bf_list);
4345 ATH_TXQ_REMOVE(txq, bf, bf_list);
4343 ATH_TXQ_UNLOCK(txq);
4344#ifdef ATH_DEBUG
4345 if (sc->sc_debug & ATH_DEBUG_RESET) {
4346 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
4347
4348 ath_printtxbuf(sc, bf, txq->axq_qnum, ix,
4349 ath_hal_txprocdesc(ah, bf->bf_desc,
4350 &bf->bf_status.ds_txstat) == HAL_OK);

--- 12 unchanged lines hidden (view full) ---

4363 ieee80211_process_callback(ni, bf->bf_m, -1);
4364 ieee80211_free_node(ni);
4365 }
4366 m_freem(bf->bf_m);
4367 bf->bf_m = NULL;
4368 bf->bf_flags &= ~ATH_BUF_BUSY;
4369
4370 ATH_TXBUF_LOCK(sc);
4346 ATH_TXQ_UNLOCK(txq);
4347#ifdef ATH_DEBUG
4348 if (sc->sc_debug & ATH_DEBUG_RESET) {
4349 struct ieee80211com *ic = sc->sc_ifp->if_l2com;
4350
4351 ath_printtxbuf(sc, bf, txq->axq_qnum, ix,
4352 ath_hal_txprocdesc(ah, bf->bf_desc,
4353 &bf->bf_status.ds_txstat) == HAL_OK);

--- 12 unchanged lines hidden (view full) ---

4366 ieee80211_process_callback(ni, bf->bf_m, -1);
4367 ieee80211_free_node(ni);
4368 }
4369 m_freem(bf->bf_m);
4370 bf->bf_m = NULL;
4371 bf->bf_flags &= ~ATH_BUF_BUSY;
4372
4373 ATH_TXBUF_LOCK(sc);
4371 STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
4374 TAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
4372 ATH_TXBUF_UNLOCK(sc);
4373 }
4374}
4375
4376static void
4377ath_tx_stopdma(struct ath_softc *sc, struct ath_txq *txq)
4378{
4379 struct ath_hal *ah = sc->sc_ah;

--- 27 unchanged lines hidden (view full) ---

4407 if (ATH_TXQ_SETUP(sc, i))
4408 ath_tx_stopdma(sc, &sc->sc_txq[i]);
4409 }
4410 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
4411 if (ATH_TXQ_SETUP(sc, i))
4412 ath_tx_draintxq(sc, &sc->sc_txq[i]);
4413#ifdef ATH_DEBUG
4414 if (sc->sc_debug & ATH_DEBUG_RESET) {
4375 ATH_TXBUF_UNLOCK(sc);
4376 }
4377}
4378
4379static void
4380ath_tx_stopdma(struct ath_softc *sc, struct ath_txq *txq)
4381{
4382 struct ath_hal *ah = sc->sc_ah;

--- 27 unchanged lines hidden (view full) ---

4410 if (ATH_TXQ_SETUP(sc, i))
4411 ath_tx_stopdma(sc, &sc->sc_txq[i]);
4412 }
4413 for (i = 0; i < HAL_NUM_TX_QUEUES; i++)
4414 if (ATH_TXQ_SETUP(sc, i))
4415 ath_tx_draintxq(sc, &sc->sc_txq[i]);
4416#ifdef ATH_DEBUG
4417 if (sc->sc_debug & ATH_DEBUG_RESET) {
4415 struct ath_buf *bf = STAILQ_FIRST(&sc->sc_bbuf);
4418 struct ath_buf *bf = TAILQ_FIRST(&sc->sc_bbuf);
4416 if (bf != NULL && bf->bf_m != NULL) {
4417 ath_printtxbuf(sc, bf, sc->sc_bhalq, 0,
4418 ath_hal_txprocdesc(ah, bf->bf_desc,
4419 &bf->bf_status.ds_txstat) == HAL_OK);
4420 ieee80211_dump_pkt(ifp->if_l2com,
4421 mtod(bf->bf_m, const uint8_t *), bf->bf_m->m_len,
4422 0, -1);
4423 }

--- 21 unchanged lines hidden (view full) ---

4445#ifdef ATH_DEBUG
4446 if (sc->sc_debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL)) {
4447 struct ath_buf *bf;
4448 u_int ix;
4449
4450 printf("%s: rx queue %p, link %p\n", __func__,
4451 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
4452 ix = 0;
4419 if (bf != NULL && bf->bf_m != NULL) {
4420 ath_printtxbuf(sc, bf, sc->sc_bhalq, 0,
4421 ath_hal_txprocdesc(ah, bf->bf_desc,
4422 &bf->bf_status.ds_txstat) == HAL_OK);
4423 ieee80211_dump_pkt(ifp->if_l2com,
4424 mtod(bf->bf_m, const uint8_t *), bf->bf_m->m_len,
4425 0, -1);
4426 }

--- 21 unchanged lines hidden (view full) ---

4448#ifdef ATH_DEBUG
4449 if (sc->sc_debug & (ATH_DEBUG_RESET | ATH_DEBUG_FATAL)) {
4450 struct ath_buf *bf;
4451 u_int ix;
4452
4453 printf("%s: rx queue %p, link %p\n", __func__,
4454 (caddr_t)(uintptr_t) ath_hal_getrxbuf(ah), sc->sc_rxlink);
4455 ix = 0;
4453 STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
4456 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
4454 struct ath_desc *ds = bf->bf_desc;
4455 struct ath_rx_status *rs = &bf->bf_status.ds_rxstat;
4456 HAL_STATUS status = ath_hal_rxprocdesc(ah, ds,
4457 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
4458 if (status == HAL_OK || (sc->sc_debug & ATH_DEBUG_FATAL))
4459 ath_printrxbuf(sc, bf, ix, status == HAL_OK);
4460 ix++;
4461 }

--- 13 unchanged lines hidden (view full) ---

4475static int
4476ath_startrecv(struct ath_softc *sc)
4477{
4478 struct ath_hal *ah = sc->sc_ah;
4479 struct ath_buf *bf;
4480
4481 sc->sc_rxlink = NULL;
4482 sc->sc_rxpending = NULL;
4457 struct ath_desc *ds = bf->bf_desc;
4458 struct ath_rx_status *rs = &bf->bf_status.ds_rxstat;
4459 HAL_STATUS status = ath_hal_rxprocdesc(ah, ds,
4460 bf->bf_daddr, PA2DESC(sc, ds->ds_link), rs);
4461 if (status == HAL_OK || (sc->sc_debug & ATH_DEBUG_FATAL))
4462 ath_printrxbuf(sc, bf, ix, status == HAL_OK);
4463 ix++;
4464 }

--- 13 unchanged lines hidden (view full) ---

4478static int
4479ath_startrecv(struct ath_softc *sc)
4480{
4481 struct ath_hal *ah = sc->sc_ah;
4482 struct ath_buf *bf;
4483
4484 sc->sc_rxlink = NULL;
4485 sc->sc_rxpending = NULL;
4483 STAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
4486 TAILQ_FOREACH(bf, &sc->sc_rxbuf, bf_list) {
4484 int error = ath_rxbuf_init(sc, bf);
4485 if (error != 0) {
4486 DPRINTF(sc, ATH_DEBUG_RECV,
4487 "%s: ath_rxbuf_init failed %d\n",
4488 __func__, error);
4489 return error;
4490 }
4491 }
4492
4487 int error = ath_rxbuf_init(sc, bf);
4488 if (error != 0) {
4489 DPRINTF(sc, ATH_DEBUG_RECV,
4490 "%s: ath_rxbuf_init failed %d\n",
4491 __func__, error);
4492 return error;
4493 }
4494 }
4495
4493 bf = STAILQ_FIRST(&sc->sc_rxbuf);
4496 bf = TAILQ_FIRST(&sc->sc_rxbuf);
4494 ath_hal_putrxbuf(ah, bf->bf_daddr);
4495 ath_hal_rxena(ah); /* enable recv descriptors */
4496 ath_mode_init(sc); /* set filters, etc. */
4497 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
4498 return 0;
4499}
4500
4501/*

--- 1356 unchanged lines hidden --- 		4497 ath_hal_putrxbuf(ah, bf->bf_daddr);
4498 ath_hal_rxena(ah); /* enable recv descriptors */
4499 ath_mode_init(sc); /* set filters, etc. */
4500 ath_hal_startpcurecv(ah); /* re-enable PCU/DMA engine */
4501 return 0;
4502}
4503
4504/*

--- 1356 unchanged lines hidden ---