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if_ath.c (222497) if_ath.c (222585)
1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 14 unchanged lines hidden (view full) ---

23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 14 unchanged lines hidden (view full) ---

23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 222497 2011-05-30 14:57:00Z adrian $");
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 222585 2011-06-01 20:09:49Z adrian $");
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39

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90#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
91#include <dev/ath/ath_hal/ah_diagcodes.h>
92
93#include <dev/ath/if_ath_debug.h>
94#include <dev/ath/if_ath_misc.h>
95#include <dev/ath/if_ath_tx.h>
96#include <dev/ath/if_ath_sysctl.h>
97#include <dev/ath/if_ath_keycache.h>
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39

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90#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
91#include <dev/ath/ath_hal/ah_diagcodes.h>
92
93#include <dev/ath/if_ath_debug.h>
94#include <dev/ath/if_ath_misc.h>
95#include <dev/ath/if_ath_tx.h>
96#include <dev/ath/if_ath_sysctl.h>
97#include <dev/ath/if_ath_keycache.h>
98#include <dev/ath/if_athdfs.h>
98
99#ifdef ATH_TX99_DIAG
100#include <dev/ath/ath_tx99/ath_tx99.h>
101#endif
102
99
100#ifdef ATH_TX99_DIAG
101#include <dev/ath/ath_tx99/ath_tx99.h>
102#endif
103
104
103/*
104 * ATH_BCBUF determines the number of vap's that can transmit
105 * beacons and also (currently) the number of vap's that can
106 * have unique mac addresses/bssid. When staggering beacons
107 * 4 is probably a good max as otherwise the beacons become
108 * very closely spaced and there is limited time for cab q traffic
109 * to go out. You can burst beacons instead but that is not good
110 * for stations in power save and at some point you really want

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194static int ath_getchannels(struct ath_softc *);
195static void ath_led_event(struct ath_softc *, int);
196
197static int ath_rate_setup(struct ath_softc *, u_int mode);
198static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
199
200static void ath_announce(struct ath_softc *);
201
105/*
106 * ATH_BCBUF determines the number of vap's that can transmit
107 * beacons and also (currently) the number of vap's that can
108 * have unique mac addresses/bssid. When staggering beacons
109 * 4 is probably a good max as otherwise the beacons become
110 * very closely spaced and there is limited time for cab q traffic
111 * to go out. You can burst beacons instead but that is not good
112 * for stations in power save and at some point you really want

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196static int ath_getchannels(struct ath_softc *);
197static void ath_led_event(struct ath_softc *, int);
198
199static int ath_rate_setup(struct ath_softc *, u_int mode);
200static void ath_setcurmode(struct ath_softc *, enum ieee80211_phymode);
201
202static void ath_announce(struct ath_softc *);
203
204static void ath_dfs_tasklet(void *, int);
205
202#ifdef IEEE80211_SUPPORT_TDMA
203static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
204 u_int32_t bintval);
205static void ath_tdma_bintvalsetup(struct ath_softc *sc,
206 const struct ieee80211_tdma_state *tdma);
207static void ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap);
208static void ath_tdma_update(struct ieee80211_node *ni,
209 const struct ieee80211_tdma_param *tdma, int);

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466 */
467 sc->sc_setdefantenna = ath_setdefantenna;
468 sc->sc_rc = ath_rate_attach(sc);
469 if (sc->sc_rc == NULL) {
470 error = EIO;
471 goto bad2;
472 }
473
206#ifdef IEEE80211_SUPPORT_TDMA
207static void ath_tdma_settimers(struct ath_softc *sc, u_int32_t nexttbtt,
208 u_int32_t bintval);
209static void ath_tdma_bintvalsetup(struct ath_softc *sc,
210 const struct ieee80211_tdma_state *tdma);
211static void ath_tdma_config(struct ath_softc *sc, struct ieee80211vap *vap);
212static void ath_tdma_update(struct ieee80211_node *ni,
213 const struct ieee80211_tdma_param *tdma, int);

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470 */
471 sc->sc_setdefantenna = ath_setdefantenna;
472 sc->sc_rc = ath_rate_attach(sc);
473 if (sc->sc_rc == NULL) {
474 error = EIO;
475 goto bad2;
476 }
477
478 /* Attach DFS module */
479 if (! ath_dfs_attach(sc)) {
480 device_printf(sc->sc_dev, "%s: unable to attach DFS\n", __func__);
481 error = EIO;
482 goto bad2;
483 }
484
485 /* Start DFS processing tasklet */
486 TASK_INIT(&sc->sc_dfstask, 0, ath_dfs_tasklet, sc);
487
474 sc->sc_blinking = 0;
475 sc->sc_ledstate = 1;
476 sc->sc_ledon = 0; /* low true */
477 sc->sc_ledidle = (2700*hz)/1000; /* 2.7sec */
478 callout_init(&sc->sc_ledtimer, CALLOUT_MPSAFE);
479 /*
480 * Auto-enable soft led processing for IBM cards and for
481 * 5211 minipci cards. Users can also manually enable/disable

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766 ath_stop(ifp);
767 ieee80211_ifdetach(ifp->if_l2com);
768 taskqueue_free(sc->sc_tq);
769#ifdef ATH_TX99_DIAG
770 if (sc->sc_tx99 != NULL)
771 sc->sc_tx99->detach(sc->sc_tx99);
772#endif
773 ath_rate_detach(sc->sc_rc);
488 sc->sc_blinking = 0;
489 sc->sc_ledstate = 1;
490 sc->sc_ledon = 0; /* low true */
491 sc->sc_ledidle = (2700*hz)/1000; /* 2.7sec */
492 callout_init(&sc->sc_ledtimer, CALLOUT_MPSAFE);
493 /*
494 * Auto-enable soft led processing for IBM cards and for
495 * 5211 minipci cards. Users can also manually enable/disable

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780 ath_stop(ifp);
781 ieee80211_ifdetach(ifp->if_l2com);
782 taskqueue_free(sc->sc_tq);
783#ifdef ATH_TX99_DIAG
784 if (sc->sc_tx99 != NULL)
785 sc->sc_tx99->detach(sc->sc_tx99);
786#endif
787 ath_rate_detach(sc->sc_rc);
788
789 ath_dfs_detach(sc);
774 ath_desc_free(sc);
775 ath_tx_cleanup(sc);
776 ath_hal_detach(sc->sc_ah); /* NB: sets chip in full sleep */
777 if_free(ifp);
778
779 return 0;
780}
781

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1549 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) {
1550 if_printf(ifp, "unable to reset hardware; hal status %u\n",
1551 status);
1552 ATH_UNLOCK(sc);
1553 return;
1554 }
1555 ath_chan_change(sc, ic->ic_curchan);
1556
790 ath_desc_free(sc);
791 ath_tx_cleanup(sc);
792 ath_hal_detach(sc->sc_ah); /* NB: sets chip in full sleep */
793 if_free(ifp);
794
795 return 0;
796}
797

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1565 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) {
1566 if_printf(ifp, "unable to reset hardware; hal status %u\n",
1567 status);
1568 ATH_UNLOCK(sc);
1569 return;
1570 }
1571 ath_chan_change(sc, ic->ic_curchan);
1572
1573 /* Let DFS at it in case it's a DFS channel */
1574 ath_dfs_radar_enable(sc, ic->ic_curchan);
1575
1557 /*
1558 * Likewise this is set during reset so update
1559 * state cached in the driver.
1560 */
1561 sc->sc_diversity = ath_hal_getdiversity(ah);
1562 sc->sc_lastlongcal = 0;
1563 sc->sc_resetcal = 1;
1564 sc->sc_lastcalreset = 0;

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1694 ath_draintxq(sc); /* stop xmit side */
1695 ath_stoprecv(sc); /* stop recv side */
1696 ath_settkipmic(sc); /* configure TKIP MIC handling */
1697 /* NB: indicate channel change so we do a full reset */
1698 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status))
1699 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1700 __func__, status);
1701 sc->sc_diversity = ath_hal_getdiversity(ah);
1576 /*
1577 * Likewise this is set during reset so update
1578 * state cached in the driver.
1579 */
1580 sc->sc_diversity = ath_hal_getdiversity(ah);
1581 sc->sc_lastlongcal = 0;
1582 sc->sc_resetcal = 1;
1583 sc->sc_lastcalreset = 0;

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1713 ath_draintxq(sc); /* stop xmit side */
1714 ath_stoprecv(sc); /* stop recv side */
1715 ath_settkipmic(sc); /* configure TKIP MIC handling */
1716 /* NB: indicate channel change so we do a full reset */
1717 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status))
1718 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
1719 __func__, status);
1720 sc->sc_diversity = ath_hal_getdiversity(ah);
1721
1722 /* Let DFS at it in case it's a DFS channel */
1723 ath_dfs_radar_enable(sc, ic->ic_curchan);
1724
1702 if (ath_startrecv(sc) != 0) /* restart recv */
1703 if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1704 /*
1705 * We may be doing a reset in response to an ioctl
1706 * that changes the channel so update any state that
1707 * might change as a result.
1708 */
1709 ath_chan_change(sc, ic->ic_curchan);

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3436
3437 if (rs->rs_status != 0) {
3438 if (rs->rs_status & HAL_RXERR_CRC)
3439 sc->sc_stats.ast_rx_crcerr++;
3440 if (rs->rs_status & HAL_RXERR_FIFO)
3441 sc->sc_stats.ast_rx_fifoerr++;
3442 if (rs->rs_status & HAL_RXERR_PHY) {
3443 sc->sc_stats.ast_rx_phyerr++;
1725 if (ath_startrecv(sc) != 0) /* restart recv */
1726 if_printf(ifp, "%s: unable to start recv logic\n", __func__);
1727 /*
1728 * We may be doing a reset in response to an ioctl
1729 * that changes the channel so update any state that
1730 * might change as a result.
1731 */
1732 ath_chan_change(sc, ic->ic_curchan);

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3459
3460 if (rs->rs_status != 0) {
3461 if (rs->rs_status & HAL_RXERR_CRC)
3462 sc->sc_stats.ast_rx_crcerr++;
3463 if (rs->rs_status & HAL_RXERR_FIFO)
3464 sc->sc_stats.ast_rx_fifoerr++;
3465 if (rs->rs_status & HAL_RXERR_PHY) {
3466 sc->sc_stats.ast_rx_phyerr++;
3467 /* Process DFS radar events */
3468 ath_dfs_process_phy_err(sc, ds, tsf, rs);
3469
3444 /* Be suitably paranoid about receiving phy errors out of the stats array bounds */
3445 if (rs->rs_phyerr < 64)
3446 sc->sc_stats.ast_rx_phy[rs->rs_phyerr]++;
3447 goto rx_error; /* NB: don't count in ierrors */
3448 }
3449 if (rs->rs_status & HAL_RXERR_DECRYPT) {
3450 /*
3451 * Decrypt error. If the error occurred

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3677 STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
3678 } while (ath_rxbuf_init(sc, bf) == 0);
3679
3680 /* rx signal state monitoring */
3681 ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan);
3682 if (ngood)
3683 sc->sc_lastrx = tsf;
3684
3470 /* Be suitably paranoid about receiving phy errors out of the stats array bounds */
3471 if (rs->rs_phyerr < 64)
3472 sc->sc_stats.ast_rx_phy[rs->rs_phyerr]++;
3473 goto rx_error; /* NB: don't count in ierrors */
3474 }
3475 if (rs->rs_status & HAL_RXERR_DECRYPT) {
3476 /*
3477 * Decrypt error. If the error occurred

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3703 STAILQ_INSERT_TAIL(&sc->sc_rxbuf, bf, bf_list);
3704 } while (ath_rxbuf_init(sc, bf) == 0);
3705
3706 /* rx signal state monitoring */
3707 ath_hal_rxmonitor(ah, &sc->sc_halstats, sc->sc_curchan);
3708 if (ngood)
3709 sc->sc_lastrx = tsf;
3710
3711 /* Queue DFS tasklet if needed */
3712 if (ath_dfs_tasklet_needed(sc, sc->sc_curchan))
3713 taskqueue_enqueue(sc->sc_tq, &sc->sc_dfstask);
3714
3685 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) {
3686#ifdef IEEE80211_SUPPORT_SUPERG
3687 ieee80211_ff_age_all(ic, 100);
3688#endif
3689 if (!IFQ_IS_EMPTY(&ifp->if_snd))
3690 ath_start(ifp);
3691 }
3692#undef PA2DESC

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4394 if_printf(ifp, "%s: unable to reset "
4395 "channel %u (%u MHz, flags 0x%x), hal status %u\n",
4396 __func__, ieee80211_chan2ieee(ic, chan),
4397 chan->ic_freq, chan->ic_flags, status);
4398 return EIO;
4399 }
4400 sc->sc_diversity = ath_hal_getdiversity(ah);
4401
3715 if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0) {
3716#ifdef IEEE80211_SUPPORT_SUPERG
3717 ieee80211_ff_age_all(ic, 100);
3718#endif
3719 if (!IFQ_IS_EMPTY(&ifp->if_snd))
3720 ath_start(ifp);
3721 }
3722#undef PA2DESC

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4424 if_printf(ifp, "%s: unable to reset "
4425 "channel %u (%u MHz, flags 0x%x), hal status %u\n",
4426 __func__, ieee80211_chan2ieee(ic, chan),
4427 chan->ic_freq, chan->ic_flags, status);
4428 return EIO;
4429 }
4430 sc->sc_diversity = ath_hal_getdiversity(ah);
4431
4432 /* Let DFS at it in case it's a DFS channel */
4433 ath_dfs_radar_enable(sc, ic->ic_curchan);
4434
4402 /*
4403 * Re-enable rx framework.
4404 */
4405 if (ath_startrecv(sc) != 0) {
4406 if_printf(ifp, "%s: unable to restart recv logic\n",
4407 __func__);
4408 return EIO;
4409 }

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5660 * Record local TSF for our last send for use
5661 * in arbitrating slot collisions.
5662 */
5663 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
5664 }
5665}
5666#endif /* IEEE80211_SUPPORT_TDMA */
5667
4435 /*
4436 * Re-enable rx framework.
4437 */
4438 if (ath_startrecv(sc) != 0) {
4439 if_printf(ifp, "%s: unable to restart recv logic\n",
4440 __func__);
4441 return EIO;
4442 }

--- 1250 unchanged lines hidden (view full) ---

5693 * Record local TSF for our last send for use
5694 * in arbitrating slot collisions.
5695 */
5696 vap->iv_bss->ni_tstamp.tsf = ath_hal_gettsf64(ah);
5697 }
5698}
5699#endif /* IEEE80211_SUPPORT_TDMA */
5700
5701static void
5702ath_dfs_tasklet(void *p, int npending)
5703{
5704 struct ath_softc *sc = (struct ath_softc *) p;
5705 struct ifnet *ifp = sc->sc_ifp;
5706 struct ieee80211com *ic = ifp->if_l2com;
5707
5708 /*
5709 * If previous processing has found a radar event,
5710 * signal this to the net80211 layer to begin DFS
5711 * processing.
5712 */
5713 if (ath_dfs_process_radar_event(sc, sc->sc_curchan)) {
5714 /* DFS event found, initiate channel change */
5715 ieee80211_dfs_notify_radar(ic, sc->sc_curchan);
5716 }
5717}
5718
5668MODULE_VERSION(if_ath, 1);
5669MODULE_DEPEND(if_ath, wlan, 1, 1, 1); /* 802.11 media layer */
5719MODULE_VERSION(if_ath, 1);
5720MODULE_DEPEND(if_ath, wlan, 1, 1, 1); /* 802.11 media layer */