| if_ath.c (155490) | if_ath.c (155491) |
|---|---|
| 1/*- 2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 21 unchanged lines hidden (view full) --- 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 */ 36 37#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 21 unchanged lines hidden (view full) --- 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 */ 36 37#include <sys/cdefs.h> |
| 38__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 155490 2006-02-09 21:42:53Z sam $"); | 38__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 155491 2006-02-09 21:48:51Z sam $"); |
| 39 40/* 41 * Driver for the Atheros Wireless LAN controller. 42 * 43 * This software is derived from work of Atsushi Onoe; his contribution 44 * is greatly appreciated. 45 */ 46 --- 8 unchanged lines hidden (view full) --- 55#include <sys/mutex.h> 56#include <sys/kernel.h> 57#include <sys/socket.h> 58#include <sys/sockio.h> 59#include <sys/errno.h> 60#include <sys/callout.h> 61#include <sys/bus.h> 62#include <sys/endian.h> | 39 40/* 41 * Driver for the Atheros Wireless LAN controller. 42 * 43 * This software is derived from work of Atsushi Onoe; his contribution 44 * is greatly appreciated. 45 */ 46 --- 8 unchanged lines hidden (view full) --- 55#include <sys/mutex.h> 56#include <sys/kernel.h> 57#include <sys/socket.h> 58#include <sys/sockio.h> 59#include <sys/errno.h> 60#include <sys/callout.h> 61#include <sys/bus.h> 62#include <sys/endian.h> |
| 63#include <sys/kthread.h> 64#include <sys/taskqueue.h> |
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| 63 64#include <machine/bus.h> 65 66#include <net/if.h> 67#include <net/if_dl.h> 68#include <net/if_media.h> 69#include <net/if_types.h> 70#include <net/if_arp.h> --- 305 unchanged lines hidden (view full) --- 376 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 377 goto bad; 378 } 379 callout_init(&sc->sc_scan_ch, debug_mpsafenet ? CALLOUT_MPSAFE : 0); 380 callout_init(&sc->sc_cal_ch, CALLOUT_MPSAFE); 381 382 ATH_TXBUF_LOCK_INIT(sc); 383 | 65 66#include <machine/bus.h> 67 68#include <net/if.h> 69#include <net/if_dl.h> 70#include <net/if_media.h> 71#include <net/if_types.h> 72#include <net/if_arp.h> --- 305 unchanged lines hidden (view full) --- 378 if_printf(ifp, "failed to allocate descriptors: %d\n", error); 379 goto bad; 380 } 381 callout_init(&sc->sc_scan_ch, debug_mpsafenet ? CALLOUT_MPSAFE : 0); 382 callout_init(&sc->sc_cal_ch, CALLOUT_MPSAFE); 383 384 ATH_TXBUF_LOCK_INIT(sc); 385 |
| 386 sc->sc_tq = taskqueue_create("ath_taskq", M_NOWAIT, 387 taskqueue_thread_enqueue, &sc->sc_tq); 388 taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, 389 "%s taskq", ifp->if_xname); 390 |
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| 384 TASK_INIT(&sc->sc_rxtask, 0, ath_rx_proc, sc); 385 TASK_INIT(&sc->sc_rxorntask, 0, ath_rxorn_proc, sc); 386 TASK_INIT(&sc->sc_fataltask, 0, ath_fatal_proc, sc); 387 TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_proc, sc); 388 TASK_INIT(&sc->sc_bstucktask, 0, ath_bstuck_proc, sc); 389 390 /* 391 * Allocate hardware transmit queues: one queue for --- 246 unchanged lines hidden (view full) --- 638 * it last 639 * Other than that, it's straightforward... 640 */ 641 ieee80211_ifdetach(&sc->sc_ic); 642#ifdef ATH_TX99_DIAG 643 if (sc->sc_tx99 != NULL) 644 sc->sc_tx99->detach(sc->sc_tx99); 645#endif | 391 TASK_INIT(&sc->sc_rxtask, 0, ath_rx_proc, sc); 392 TASK_INIT(&sc->sc_rxorntask, 0, ath_rxorn_proc, sc); 393 TASK_INIT(&sc->sc_fataltask, 0, ath_fatal_proc, sc); 394 TASK_INIT(&sc->sc_bmisstask, 0, ath_bmiss_proc, sc); 395 TASK_INIT(&sc->sc_bstucktask, 0, ath_bstuck_proc, sc); 396 397 /* 398 * Allocate hardware transmit queues: one queue for --- 246 unchanged lines hidden (view full) --- 645 * it last 646 * Other than that, it's straightforward... 647 */ 648 ieee80211_ifdetach(&sc->sc_ic); 649#ifdef ATH_TX99_DIAG 650 if (sc->sc_tx99 != NULL) 651 sc->sc_tx99->detach(sc->sc_tx99); 652#endif |
| 653 taskqueue_free(sc->sc_tq); |
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| 646 ath_rate_detach(sc->sc_rc); 647 ath_desc_free(sc); 648 ath_tx_cleanup(sc); 649 ath_hal_detach(sc->sc_ah); 650 if_free(ifp); 651 652 return 0; 653} --- 81 unchanged lines hidden (view full) --- 735 /* 736 * Fatal errors are unrecoverable. Typically 737 * these are caused by DMA errors. Unfortunately 738 * the exact reason is not (presently) returned 739 * by the hal. 740 */ 741 sc->sc_stats.ast_hardware++; 742 ath_hal_intrset(ah, 0); /* disable intr's until reset */ | 654 ath_rate_detach(sc->sc_rc); 655 ath_desc_free(sc); 656 ath_tx_cleanup(sc); 657 ath_hal_detach(sc->sc_ah); 658 if_free(ifp); 659 660 return 0; 661} --- 81 unchanged lines hidden (view full) --- 743 /* 744 * Fatal errors are unrecoverable. Typically 745 * these are caused by DMA errors. Unfortunately 746 * the exact reason is not (presently) returned 747 * by the hal. 748 */ 749 sc->sc_stats.ast_hardware++; 750 ath_hal_intrset(ah, 0); /* disable intr's until reset */ |
| 743 taskqueue_enqueue(taskqueue_swi, &sc->sc_fataltask); | 751 taskqueue_enqueue(sc->sc_tq, &sc->sc_fataltask); |
| 744 } else if (status & HAL_INT_RXORN) { 745 sc->sc_stats.ast_rxorn++; 746 ath_hal_intrset(ah, 0); /* disable intr's until reset */ | 752 } else if (status & HAL_INT_RXORN) { 753 sc->sc_stats.ast_rxorn++; 754 ath_hal_intrset(ah, 0); /* disable intr's until reset */ |
| 747 taskqueue_enqueue(taskqueue_swi, &sc->sc_rxorntask); | 755 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxorntask); |
| 748 } else { 749 if (status & HAL_INT_SWBA) { 750 /* 751 * Software beacon alert--time to send a beacon. 752 * Handle beacon transmission directly; deferring 753 * this is too slow to meet timing constraints 754 * under load. 755 */ --- 9 unchanged lines hidden (view full) --- 765 sc->sc_rxlink = NULL; 766 } 767 if (status & HAL_INT_TXURN) { 768 sc->sc_stats.ast_txurn++; 769 /* bump tx trigger level */ 770 ath_hal_updatetxtriglevel(ah, AH_TRUE); 771 } 772 if (status & HAL_INT_RX) | 756 } else { 757 if (status & HAL_INT_SWBA) { 758 /* 759 * Software beacon alert--time to send a beacon. 760 * Handle beacon transmission directly; deferring 761 * this is too slow to meet timing constraints 762 * under load. 763 */ --- 9 unchanged lines hidden (view full) --- 773 sc->sc_rxlink = NULL; 774 } 775 if (status & HAL_INT_TXURN) { 776 sc->sc_stats.ast_txurn++; 777 /* bump tx trigger level */ 778 ath_hal_updatetxtriglevel(ah, AH_TRUE); 779 } 780 if (status & HAL_INT_RX) |
| 773 taskqueue_enqueue(taskqueue_swi, &sc->sc_rxtask); | 781 taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); |
| 774 if (status & HAL_INT_TX) | 782 if (status & HAL_INT_TX) |
| 775 taskqueue_enqueue(taskqueue_swi, &sc->sc_txtask); | 783 taskqueue_enqueue(sc->sc_tq, &sc->sc_txtask); |
| 776 if (status & HAL_INT_BMISS) { 777 sc->sc_stats.ast_bmiss++; | 784 if (status & HAL_INT_BMISS) { 785 sc->sc_stats.ast_bmiss++; |
| 778 taskqueue_enqueue(taskqueue_swi, &sc->sc_bmisstask); | 786 taskqueue_enqueue(sc->sc_tq, &sc->sc_bmisstask); |
| 779 } 780 if (status & HAL_INT_MIB) { 781 sc->sc_stats.ast_mib++; 782 /* 783 * Disable interrupts until we service the MIB 784 * interrupt; otherwise it will continue to fire. 785 */ 786 ath_hal_intrset(ah, 0); --- 1171 unchanged lines hidden (view full) --- 1958 * miss too many consecutive beacons reset the device. 1959 */ 1960 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) { 1961 sc->sc_bmisscount++; 1962 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, 1963 "%s: missed %u consecutive beacons\n", 1964 __func__, sc->sc_bmisscount); 1965 if (sc->sc_bmisscount > 3) /* NB: 3 is a guess */ | 787 } 788 if (status & HAL_INT_MIB) { 789 sc->sc_stats.ast_mib++; 790 /* 791 * Disable interrupts until we service the MIB 792 * interrupt; otherwise it will continue to fire. 793 */ 794 ath_hal_intrset(ah, 0); --- 1171 unchanged lines hidden (view full) --- 1966 * miss too many consecutive beacons reset the device. 1967 */ 1968 if (ath_hal_numtxpending(ah, sc->sc_bhalq) != 0) { 1969 sc->sc_bmisscount++; 1970 DPRINTF(sc, ATH_DEBUG_BEACON_PROC, 1971 "%s: missed %u consecutive beacons\n", 1972 __func__, sc->sc_bmisscount); 1973 if (sc->sc_bmisscount > 3) /* NB: 3 is a guess */ |
| 1966 taskqueue_enqueue(taskqueue_swi, &sc->sc_bstucktask); | 1974 taskqueue_enqueue(sc->sc_tq, &sc->sc_bstucktask); |
| 1967 return; 1968 } 1969 if (sc->sc_bmisscount != 0) { 1970 DPRINTF(sc, ATH_DEBUG_BEACON, 1971 "%s: resume beacon xmit after %u misses\n", 1972 __func__, sc->sc_bmisscount); 1973 sc->sc_bmisscount = 0; 1974 } --- 3125 unchanged lines hidden --- | 1975 return; 1976 } 1977 if (sc->sc_bmisscount != 0) { 1978 DPRINTF(sc, ATH_DEBUG_BEACON, 1979 "%s: resume beacon xmit after %u misses\n", 1980 __func__, sc->sc_bmisscount); 1981 sc->sc_bmisscount = 0; 1982 } --- 3125 unchanged lines hidden --- |