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if_ath.c (155477) if_ath.c (155480)
1/*-
2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
35 */
36
37#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34 * THE POSSIBILITY OF SUCH DAMAGES.
35 */
36
37#include <sys/cdefs.h>
38__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 155477 2006-02-09 20:49:55Z sam $");
38__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 155480 2006-02-09 20:57:48Z sam $");
39
40/*
41 * Driver for the Atheros Wireless LAN controller.
42 *
43 * This software is derived from work of Atsushi Onoe; his contribution
44 * is greatly appreciated.
45 */
46

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3138static int
3139ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
3140 struct mbuf *m0)
3141{
3142 struct ieee80211com *ic = &sc->sc_ic;
3143 struct ath_hal *ah = sc->sc_ah;
3144 struct ifnet *ifp = sc->sc_ifp;
3145 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
39
40/*
41 * Driver for the Atheros Wireless LAN controller.
42 *
43 * This software is derived from work of Atsushi Onoe; his contribution
44 * is greatly appreciated.
45 */
46

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3138static int
3139ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf,
3140 struct mbuf *m0)
3141{
3142 struct ieee80211com *ic = &sc->sc_ic;
3143 struct ath_hal *ah = sc->sc_ah;
3144 struct ifnet *ifp = sc->sc_ifp;
3145 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams;
3146 int i, error, iswep, ismcast, keyix, hdrlen, pktlen, try0;
3146 int i, error, iswep, ismcast, ismrr;
3147 int keyix, hdrlen, pktlen, try0;
3147 u_int8_t rix, txrate, ctsrate;
3148 u_int8_t cix = 0xff; /* NB: silence compiler */
3149 struct ath_desc *ds, *ds0;
3150 struct ath_txq *txq;
3151 struct ieee80211_frame *wh;
3152 u_int subtype, flags, ctsduration;
3153 HAL_PKT_TYPE atype;
3154 const HAL_RATE_TABLE *rt;

--- 125 unchanged lines hidden (view full) ---

3280 shortPreamble = AH_TRUE;
3281 sc->sc_stats.ast_tx_shortpre++;
3282 } else {
3283 shortPreamble = AH_FALSE;
3284 }
3285
3286 an = ATH_NODE(ni);
3287 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
3148 u_int8_t rix, txrate, ctsrate;
3149 u_int8_t cix = 0xff; /* NB: silence compiler */
3150 struct ath_desc *ds, *ds0;
3151 struct ath_txq *txq;
3152 struct ieee80211_frame *wh;
3153 u_int subtype, flags, ctsduration;
3154 HAL_PKT_TYPE atype;
3155 const HAL_RATE_TABLE *rt;

--- 125 unchanged lines hidden (view full) ---

3281 shortPreamble = AH_TRUE;
3282 sc->sc_stats.ast_tx_shortpre++;
3283 } else {
3284 shortPreamble = AH_FALSE;
3285 }
3286
3287 an = ATH_NODE(ni);
3288 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */
3289 ismrr = 0; /* default no multi-rate retry*/
3288 /*
3289 * Calculate Atheros packet type from IEEE80211 packet header,
3290 * setup for rate calculations, and select h/w transmit queue.
3291 */
3292 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
3293 case IEEE80211_FC0_TYPE_MGT:
3294 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3295 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
3296 atype = HAL_PKT_TYPE_BEACON;
3297 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3298 atype = HAL_PKT_TYPE_PROBE_RESP;
3299 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
3300 atype = HAL_PKT_TYPE_ATIM;
3301 else
3302 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
3303 rix = sc->sc_minrateix;
3304 txrate = rt->info[rix].rateCode;
3305 if (shortPreamble)
3306 txrate |= rt->info[rix].shortPreamble;
3290 /*
3291 * Calculate Atheros packet type from IEEE80211 packet header,
3292 * setup for rate calculations, and select h/w transmit queue.
3293 */
3294 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
3295 case IEEE80211_FC0_TYPE_MGT:
3296 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3297 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
3298 atype = HAL_PKT_TYPE_BEACON;
3299 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3300 atype = HAL_PKT_TYPE_PROBE_RESP;
3301 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
3302 atype = HAL_PKT_TYPE_ATIM;
3303 else
3304 atype = HAL_PKT_TYPE_NORMAL; /* XXX */
3305 rix = sc->sc_minrateix;
3306 txrate = rt->info[rix].rateCode;
3307 if (shortPreamble)
3308 txrate |= rt->info[rix].shortPreamble;
3307 try0 = ATH_TXMAXTRY;
3309 try0 = ATH_TXMGTTRY;
3308 /* NB: force all management frames to highest queue */
3309 if (ni->ni_flags & IEEE80211_NODE_QOS) {
3310 /* NB: force all management frames to highest queue */
3311 pri = WME_AC_VO;
3312 } else
3313 pri = WME_AC_BE;
3314 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
3315 break;
3316 case IEEE80211_FC0_TYPE_CTL:
3317 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
3318 rix = sc->sc_minrateix;
3319 txrate = rt->info[rix].rateCode;
3320 if (shortPreamble)
3321 txrate |= rt->info[rix].shortPreamble;
3310 /* NB: force all management frames to highest queue */
3311 if (ni->ni_flags & IEEE80211_NODE_QOS) {
3312 /* NB: force all management frames to highest queue */
3313 pri = WME_AC_VO;
3314 } else
3315 pri = WME_AC_BE;
3316 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
3317 break;
3318 case IEEE80211_FC0_TYPE_CTL:
3319 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */
3320 rix = sc->sc_minrateix;
3321 txrate = rt->info[rix].rateCode;
3322 if (shortPreamble)
3323 txrate |= rt->info[rix].shortPreamble;
3322 try0 = ATH_TXMAXTRY;
3324 try0 = ATH_TXMGTTRY;
3323 /* NB: force all ctl frames to highest queue */
3324 if (ni->ni_flags & IEEE80211_NODE_QOS) {
3325 /* NB: force all ctl frames to highest queue */
3326 pri = WME_AC_VO;
3327 } else
3328 pri = WME_AC_BE;
3329 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
3330 break;
3331 case IEEE80211_FC0_TYPE_DATA:
3332 atype = HAL_PKT_TYPE_NORMAL; /* default */
3333 /*
3334 * Data frames; consult the rate control module.
3335 */
3336 ath_rate_findrate(sc, an, shortPreamble, pktlen,
3337 &rix, &try0, &txrate);
3338 sc->sc_txrate = txrate; /* for LED blinking */
3325 /* NB: force all ctl frames to highest queue */
3326 if (ni->ni_flags & IEEE80211_NODE_QOS) {
3327 /* NB: force all ctl frames to highest queue */
3328 pri = WME_AC_VO;
3329 } else
3330 pri = WME_AC_BE;
3331 flags |= HAL_TXDESC_INTREQ; /* force interrupt */
3332 break;
3333 case IEEE80211_FC0_TYPE_DATA:
3334 atype = HAL_PKT_TYPE_NORMAL; /* default */
3335 /*
3336 * Data frames; consult the rate control module.
3337 */
3338 ath_rate_findrate(sc, an, shortPreamble, pktlen,
3339 &rix, &try0, &txrate);
3340 sc->sc_txrate = txrate; /* for LED blinking */
3341 if (try0 != ATH_TXMAXTRY)
3342 ismrr = 1;
3339 /*
3340 * Default all non-QoS traffic to the background queue.
3341 */
3342 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
3343 pri = M_WME_GETAC(m0);
3344 if (cap->cap_wmeParams[pri].wmep_noackPolicy) {
3345 flags |= HAL_TXDESC_NOACK;
3346 sc->sc_stats.ast_tx_noack++;

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3449 ctsduration += ath_hal_computetxtime(ah,
3450 rt, pktlen, rix, AH_FALSE);
3451 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
3452 ctsduration += rt->info[rix].lpAckDuration;
3453 }
3454 /*
3455 * Must disable multi-rate retry when using RTS/CTS.
3456 */
3343 /*
3344 * Default all non-QoS traffic to the background queue.
3345 */
3346 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
3347 pri = M_WME_GETAC(m0);
3348 if (cap->cap_wmeParams[pri].wmep_noackPolicy) {
3349 flags |= HAL_TXDESC_NOACK;
3350 sc->sc_stats.ast_tx_noack++;

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3453 ctsduration += ath_hal_computetxtime(ah,
3454 rt, pktlen, rix, AH_FALSE);
3455 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */
3456 ctsduration += rt->info[rix].lpAckDuration;
3457 }
3458 /*
3459 * Must disable multi-rate retry when using RTS/CTS.
3460 */
3457 try0 = ATH_TXMAXTRY;
3461 ismrr = 0;
3462 try0 = ATH_TXMGTTRY; /* XXX */
3458 } else
3459 ctsrate = 0;
3460
3461 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
3462 ieee80211_dump_pkt(mtod(m0, caddr_t), m0->m_len,
3463 sc->sc_hwmap[txrate].ieeerate, -1);
3464
3465 if (ic->ic_rawbpf)

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3520 bf->bf_flags = flags;
3521 /*
3522 * Setup the multi-rate retry state only when we're
3523 * going to use it. This assumes ath_hal_setuptxdesc
3524 * initializes the descriptors (so we don't have to)
3525 * when the hardware supports multi-rate retry and
3526 * we don't use it.
3527 */
3463 } else
3464 ctsrate = 0;
3465
3466 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
3467 ieee80211_dump_pkt(mtod(m0, caddr_t), m0->m_len,
3468 sc->sc_hwmap[txrate].ieeerate, -1);
3469
3470 if (ic->ic_rawbpf)

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3525 bf->bf_flags = flags;
3526 /*
3527 * Setup the multi-rate retry state only when we're
3528 * going to use it. This assumes ath_hal_setuptxdesc
3529 * initializes the descriptors (so we don't have to)
3530 * when the hardware supports multi-rate retry and
3531 * we don't use it.
3532 */
3528 if (try0 != ATH_TXMAXTRY)
3533 if (ismrr)
3529 ath_rate_setupxtxdesc(sc, an, ds, shortPreamble, rix);
3530
3531 /*
3532 * Fillin the remainder of the descriptor info.
3533 */
3534 ds0 = ds;
3535 for (i = 0; i < bf->bf_nseg; i++, ds++) {
3536 ds->ds_data = bf->bf_segs[i].ds_addr;

--- 1444 unchanged lines hidden --- 		3534 ath_rate_setupxtxdesc(sc, an, ds, shortPreamble, rix);
3535
3536 /*
3537 * Fillin the remainder of the descriptor info.
3538 */
3539 ds0 = ds;
3540 for (i = 0; i < bf->bf_nseg; i++, ds++) {
3541 ds->ds_data = bf->bf_segs[i].ds_addr;

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