1/*-
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 14 unchanged lines hidden (view full) ---
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 271887 2014-09-20 01:22:17Z adrian $");
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39
--- 1670 unchanged lines hidden (view full) ---
1710
1711 sc->sc_resume_up = (ifp->if_flags & IFF_UP) != 0;
1712
1713 ieee80211_suspend_all(ic);
1714 /*
1715 * NB: don't worry about putting the chip in low power
1716 * mode; pci will power off our socket on suspend and
1717 * CardBus detaches the device.
1718 *
1719 * XXX TODO: well, that's great, except for non-cardbus
1720 * devices!
1721 */
1722
1723 /*
1724 * XXX This doesn't wait until all pending taskqueue
1725 * items and parallel transmit/receive/other threads
1726 * are running!
1727 */
1728 ath_hal_intrset(sc->sc_ah, 0);
1729 taskqueue_block(sc->sc_tq);
1730 callout_drain(&sc->sc_cal_ch);
1731
1732 /*
1733 * XXX ensure sc_invalid is 1
1734 */
1735
1736 /* Disable the PCIe PHY, complete with workarounds */
1737 ath_hal_enablepcie(sc->sc_ah, 1, 1);
1738}
1739
1740/*
1741 * Reset the key cache since some parts do not reset the
--- 74 unchanged lines hidden (view full) ---
1816 ath_power_setpower(sc, HAL_PM_AWAKE);
1817 ATH_UNLOCK(sc);
1818
1819 ath_hal_reset(ah, sc->sc_opmode,
1820 sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan,
1821 AH_FALSE, &status);
1822 ath_reset_keycache(sc);
1823
1824 ATH_RX_LOCK(sc);
1825 sc->sc_rx_stopped = 1;
1826 sc->sc_rx_resetted = 1;
1827 ATH_RX_UNLOCK(sc);
1828
1829 /* Let DFS at it in case it's a DFS channel */
1830 ath_dfs_radar_enable(sc, ic->ic_curchan);
1831
1832 /* Let spectral at in case spectral is enabled */
1833 ath_spectral_enable(sc, ic->ic_curchan);
1834
1835 /*
1836 * Let bluetooth coexistence at in case it's needed for this channel
--- 188 unchanged lines hidden (view full) ---
2025 */
2026 sc->sc_rx.recv_sched(sc, 1);
2027#endif
2028 }
2029 }
2030 if (status & HAL_INT_RXEOL) {
2031 int imask;
2032 ATH_KTR(sc, ATH_KTR_ERROR, 0, "ath_intr: RXEOL");
2033 if (! sc->sc_isedma) {
2034 ATH_PCU_LOCK(sc);
2035 /*
2036 * NB: the hardware should re-read the link when
2037 * RXE bit is written, but it doesn't work at
2038 * least on older hardware revs.
2039 */
2040 sc->sc_stats.ast_rxeol++;
2041 /*
2042 * Disable RXEOL/RXORN - prevent an interrupt
2043 * storm until the PCU logic can be reset.
2044 * In case the interface is reset some other
2045 * way before "sc_kickpcu" is called, don't
2046 * modify sc_imask - that way if it is reset
2047 * by a call to ath_reset() somehow, the
2048 * interrupt mask will be correctly reprogrammed.
2049 */
2050 imask = sc->sc_imask;
2051 imask &= ~(HAL_INT_RXEOL | HAL_INT_RXORN);
2052 ath_hal_intrset(ah, imask);
2053 /*
2054 * Only blank sc_rxlink if we've not yet kicked
2055 * the PCU.
2056 *
2057 * This isn't entirely correct - the correct solution
2058 * would be to have a PCU lock and engage that for
2059 * the duration of the PCU fiddling; which would include
2060 * running the RX process. Otherwise we could end up
2061 * messing up the RX descriptor chain and making the
2062 * RX desc list much shorter.
2063 */
2064 if (! sc->sc_kickpcu)
2065 sc->sc_rxlink = NULL;
2066 sc->sc_kickpcu = 1;
2067 ATH_PCU_UNLOCK(sc);
2068 }
2069 /*
2070 * Enqueue an RX proc to handle whatever
2071 * is in the RX queue.
2072 * This will then kick the PCU if required.
2073 */
2074 sc->sc_rx.recv_sched(sc, 1);
2075 }
2076 if (status & HAL_INT_TXURN) {
2077 sc->sc_stats.ast_txurn++;
2078 /* bump tx trigger level */
2079 ath_hal_updatetxtriglevel(ah, AH_TRUE);
2080 }
--- 279 unchanged lines hidden (view full) ---
2360 sc->sc_cur_rxchainmask);
2361
2362 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) {
2363 if_printf(ifp, "unable to reset hardware; hal status %u\n",
2364 status);
2365 ATH_UNLOCK(sc);
2366 return;
2367 }
2368
2369 ATH_RX_LOCK(sc);
2370 sc->sc_rx_stopped = 1;
2371 sc->sc_rx_resetted = 1;
2372 ATH_RX_UNLOCK(sc);
2373
2374 ath_chan_change(sc, ic->ic_curchan);
2375
2376 /* Let DFS at it in case it's a DFS channel */
2377 ath_dfs_radar_enable(sc, ic->ic_curchan);
2378
2379 /* Let spectral at in case spectral is enabled */
2380 ath_spectral_enable(sc, ic->ic_curchan);
2381
--- 42 unchanged lines hidden (view full) ---
2424 ATH_UNLOCK(sc);
2425 return;
2426 }
2427
2428 /*
2429 * Enable interrupts.
2430 */
2431 sc->sc_imask = HAL_INT_RX | HAL_INT_TX
2432 | HAL_INT_RXORN | HAL_INT_TXURN
2433 | HAL_INT_FATAL | HAL_INT_GLOBAL;
2434
2435 /*
2436 * Enable RX EDMA bits. Note these overlap with
2437 * HAL_INT_RX and HAL_INT_RXDESC respectively.
2438 */
2439 if (sc->sc_isedma)
2440 sc->sc_imask |= (HAL_INT_RXHP | HAL_INT_RXLP);
2441
2442 /*
2443 * If we're an EDMA NIC, we don't care about RXEOL.
2444 * Writing a new descriptor in will simply restart
2445 * RX DMA.
2446 */
2447 if (! sc->sc_isedma)
2448 sc->sc_imask |= HAL_INT_RXEOL;
2449
2450 /*
2451 * Enable MIB interrupts when there are hardware phy counters.
2452 * Note we only do this (at the moment) for station mode.
2453 */
2454 if (sc->sc_needmib && ic->ic_opmode == IEEE80211_M_STA)
2455 sc->sc_imask |= HAL_INT_MIB;
2456
2457 /*
2458 * XXX add capability for this.
--- 301 unchanged lines hidden (view full) ---
2760 ath_update_chainmasks(sc, ic->ic_curchan);
2761 ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask,
2762 sc->sc_cur_rxchainmask);
2763 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status))
2764 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
2765 __func__, status);
2766 sc->sc_diversity = ath_hal_getdiversity(ah);
2767
2768 ATH_RX_LOCK(sc);
2769 sc->sc_rx_stopped = 1;
2770 sc->sc_rx_resetted = 1;
2771 ATH_RX_UNLOCK(sc);
2772
2773 /* Let DFS at it in case it's a DFS channel */
2774 ath_dfs_radar_enable(sc, ic->ic_curchan);
2775
2776 /* Let spectral at in case spectral is enabled */
2777 ath_spectral_enable(sc, ic->ic_curchan);
2778
2779 /*
2780 * Let bluetooth coexistence at in case it's needed for this channel
--- 2582 unchanged lines hidden (view full) ---
5363 ATH_PCU_UNLOCK_ASSERT(sc);
5364 ATH_UNLOCK_ASSERT(sc);
5365
5366 /* (Try to) stop TX/RX from occuring */
5367 taskqueue_block(sc->sc_tq);
5368
5369 ATH_PCU_LOCK(sc);
5370
5371 /* Disable interrupts */
5372 ath_hal_intrset(ah, 0);
5373
5374 /* Stop new RX/TX/interrupt completion */
5375 if (ath_reset_grablock(sc, 1) == 0) {
5376 device_printf(sc->sc_dev, "%s: concurrent reset! Danger!\n",
5377 __func__);
5378 }
5379
5380 /* Stop pending RX/TX completion */
5381 ath_txrx_stop_locked(sc);
5382
5383 ATH_PCU_UNLOCK(sc);
5384
5385 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %u (%u MHz, flags 0x%x)\n",
5386 __func__, ieee80211_chan2ieee(ic, chan),
5387 chan->ic_freq, chan->ic_flags);
--- 27 unchanged lines hidden (view full) ---
5415 "channel %u (%u MHz, flags 0x%x), hal status %u\n",
5416 __func__, ieee80211_chan2ieee(ic, chan),
5417 chan->ic_freq, chan->ic_flags, status);
5418 ret = EIO;
5419 goto finish;
5420 }
5421 sc->sc_diversity = ath_hal_getdiversity(ah);
5422
5423 ATH_RX_LOCK(sc);
5424 sc->sc_rx_stopped = 1;
5425 sc->sc_rx_resetted = 1;
5426 ATH_RX_UNLOCK(sc);
5427
5428 /* Let DFS at it in case it's a DFS channel */
5429 ath_dfs_radar_enable(sc, chan);
5430
5431 /* Let spectral at in case spectral is enabled */
5432 ath_spectral_enable(sc, chan);
5433
5434 /*
5435 * Let bluetooth coexistence at in case it's needed for this
--- 1671 unchanged lines hidden ---
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
--- 14 unchanged lines hidden (view full) ---
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 */
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath.c 271887 2014-09-20 01:22:17Z adrian $");
32
33/*
34 * Driver for the Atheros Wireless LAN controller.
35 *
36 * This software is derived from work of Atsushi Onoe; his contribution
37 * is greatly appreciated.
38 */
39
--- 1670 unchanged lines hidden (view full) ---
1710
1711 sc->sc_resume_up = (ifp->if_flags & IFF_UP) != 0;
1712
1713 ieee80211_suspend_all(ic);
1714 /*
1715 * NB: don't worry about putting the chip in low power
1716 * mode; pci will power off our socket on suspend and
1717 * CardBus detaches the device.
1718 *
1719 * XXX TODO: well, that's great, except for non-cardbus
1720 * devices!
1721 */
1722
1723 /*
1724 * XXX This doesn't wait until all pending taskqueue
1725 * items and parallel transmit/receive/other threads
1726 * are running!
1727 */
1728 ath_hal_intrset(sc->sc_ah, 0);
1729 taskqueue_block(sc->sc_tq);
1730 callout_drain(&sc->sc_cal_ch);
1731
1732 /*
1733 * XXX ensure sc_invalid is 1
1734 */
1735
1736 /* Disable the PCIe PHY, complete with workarounds */
1737 ath_hal_enablepcie(sc->sc_ah, 1, 1);
1738}
1739
1740/*
1741 * Reset the key cache since some parts do not reset the
--- 74 unchanged lines hidden (view full) ---
1816 ath_power_setpower(sc, HAL_PM_AWAKE);
1817 ATH_UNLOCK(sc);
1818
1819 ath_hal_reset(ah, sc->sc_opmode,
1820 sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan,
1821 AH_FALSE, &status);
1822 ath_reset_keycache(sc);
1823
1824 ATH_RX_LOCK(sc);
1825 sc->sc_rx_stopped = 1;
1826 sc->sc_rx_resetted = 1;
1827 ATH_RX_UNLOCK(sc);
1828
1829 /* Let DFS at it in case it's a DFS channel */
1830 ath_dfs_radar_enable(sc, ic->ic_curchan);
1831
1832 /* Let spectral at in case spectral is enabled */
1833 ath_spectral_enable(sc, ic->ic_curchan);
1834
1835 /*
1836 * Let bluetooth coexistence at in case it's needed for this channel
--- 188 unchanged lines hidden (view full) ---
2025 */
2026 sc->sc_rx.recv_sched(sc, 1);
2027#endif
2028 }
2029 }
2030 if (status & HAL_INT_RXEOL) {
2031 int imask;
2032 ATH_KTR(sc, ATH_KTR_ERROR, 0, "ath_intr: RXEOL");
2033 if (! sc->sc_isedma) {
2034 ATH_PCU_LOCK(sc);
2035 /*
2036 * NB: the hardware should re-read the link when
2037 * RXE bit is written, but it doesn't work at
2038 * least on older hardware revs.
2039 */
2040 sc->sc_stats.ast_rxeol++;
2041 /*
2042 * Disable RXEOL/RXORN - prevent an interrupt
2043 * storm until the PCU logic can be reset.
2044 * In case the interface is reset some other
2045 * way before "sc_kickpcu" is called, don't
2046 * modify sc_imask - that way if it is reset
2047 * by a call to ath_reset() somehow, the
2048 * interrupt mask will be correctly reprogrammed.
2049 */
2050 imask = sc->sc_imask;
2051 imask &= ~(HAL_INT_RXEOL | HAL_INT_RXORN);
2052 ath_hal_intrset(ah, imask);
2053 /*
2054 * Only blank sc_rxlink if we've not yet kicked
2055 * the PCU.
2056 *
2057 * This isn't entirely correct - the correct solution
2058 * would be to have a PCU lock and engage that for
2059 * the duration of the PCU fiddling; which would include
2060 * running the RX process. Otherwise we could end up
2061 * messing up the RX descriptor chain and making the
2062 * RX desc list much shorter.
2063 */
2064 if (! sc->sc_kickpcu)
2065 sc->sc_rxlink = NULL;
2066 sc->sc_kickpcu = 1;
2067 ATH_PCU_UNLOCK(sc);
2068 }
2069 /*
2070 * Enqueue an RX proc to handle whatever
2071 * is in the RX queue.
2072 * This will then kick the PCU if required.
2073 */
2074 sc->sc_rx.recv_sched(sc, 1);
2075 }
2076 if (status & HAL_INT_TXURN) {
2077 sc->sc_stats.ast_txurn++;
2078 /* bump tx trigger level */
2079 ath_hal_updatetxtriglevel(ah, AH_TRUE);
2080 }
--- 279 unchanged lines hidden (view full) ---
2360 sc->sc_cur_rxchainmask);
2361
2362 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) {
2363 if_printf(ifp, "unable to reset hardware; hal status %u\n",
2364 status);
2365 ATH_UNLOCK(sc);
2366 return;
2367 }
2368
2369 ATH_RX_LOCK(sc);
2370 sc->sc_rx_stopped = 1;
2371 sc->sc_rx_resetted = 1;
2372 ATH_RX_UNLOCK(sc);
2373
2374 ath_chan_change(sc, ic->ic_curchan);
2375
2376 /* Let DFS at it in case it's a DFS channel */
2377 ath_dfs_radar_enable(sc, ic->ic_curchan);
2378
2379 /* Let spectral at in case spectral is enabled */
2380 ath_spectral_enable(sc, ic->ic_curchan);
2381
--- 42 unchanged lines hidden (view full) ---
2424 ATH_UNLOCK(sc);
2425 return;
2426 }
2427
2428 /*
2429 * Enable interrupts.
2430 */
2431 sc->sc_imask = HAL_INT_RX | HAL_INT_TX
2432 | HAL_INT_RXORN | HAL_INT_TXURN
2433 | HAL_INT_FATAL | HAL_INT_GLOBAL;
2434
2435 /*
2436 * Enable RX EDMA bits. Note these overlap with
2437 * HAL_INT_RX and HAL_INT_RXDESC respectively.
2438 */
2439 if (sc->sc_isedma)
2440 sc->sc_imask |= (HAL_INT_RXHP | HAL_INT_RXLP);
2441
2442 /*
2443 * If we're an EDMA NIC, we don't care about RXEOL.
2444 * Writing a new descriptor in will simply restart
2445 * RX DMA.
2446 */
2447 if (! sc->sc_isedma)
2448 sc->sc_imask |= HAL_INT_RXEOL;
2449
2450 /*
2451 * Enable MIB interrupts when there are hardware phy counters.
2452 * Note we only do this (at the moment) for station mode.
2453 */
2454 if (sc->sc_needmib && ic->ic_opmode == IEEE80211_M_STA)
2455 sc->sc_imask |= HAL_INT_MIB;
2456
2457 /*
2458 * XXX add capability for this.
--- 301 unchanged lines hidden (view full) ---
2760 ath_update_chainmasks(sc, ic->ic_curchan);
2761 ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask,
2762 sc->sc_cur_rxchainmask);
2763 if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status))
2764 if_printf(ifp, "%s: unable to reset hardware; hal status %u\n",
2765 __func__, status);
2766 sc->sc_diversity = ath_hal_getdiversity(ah);
2767
2768 ATH_RX_LOCK(sc);
2769 sc->sc_rx_stopped = 1;
2770 sc->sc_rx_resetted = 1;
2771 ATH_RX_UNLOCK(sc);
2772
2773 /* Let DFS at it in case it's a DFS channel */
2774 ath_dfs_radar_enable(sc, ic->ic_curchan);
2775
2776 /* Let spectral at in case spectral is enabled */
2777 ath_spectral_enable(sc, ic->ic_curchan);
2778
2779 /*
2780 * Let bluetooth coexistence at in case it's needed for this channel
--- 2582 unchanged lines hidden (view full) ---
5363 ATH_PCU_UNLOCK_ASSERT(sc);
5364 ATH_UNLOCK_ASSERT(sc);
5365
5366 /* (Try to) stop TX/RX from occuring */
5367 taskqueue_block(sc->sc_tq);
5368
5369 ATH_PCU_LOCK(sc);
5370
5371 /* Disable interrupts */
5372 ath_hal_intrset(ah, 0);
5373
5374 /* Stop new RX/TX/interrupt completion */
5375 if (ath_reset_grablock(sc, 1) == 0) {
5376 device_printf(sc->sc_dev, "%s: concurrent reset! Danger!\n",
5377 __func__);
5378 }
5379
5380 /* Stop pending RX/TX completion */
5381 ath_txrx_stop_locked(sc);
5382
5383 ATH_PCU_UNLOCK(sc);
5384
5385 DPRINTF(sc, ATH_DEBUG_RESET, "%s: %u (%u MHz, flags 0x%x)\n",
5386 __func__, ieee80211_chan2ieee(ic, chan),
5387 chan->ic_freq, chan->ic_flags);
--- 27 unchanged lines hidden (view full) ---
5415 "channel %u (%u MHz, flags 0x%x), hal status %u\n",
5416 __func__, ieee80211_chan2ieee(ic, chan),
5417 chan->ic_freq, chan->ic_flags, status);
5418 ret = EIO;
5419 goto finish;
5420 }
5421 sc->sc_diversity = ath_hal_getdiversity(ah);
5422
5423 ATH_RX_LOCK(sc);
5424 sc->sc_rx_stopped = 1;
5425 sc->sc_rx_resetted = 1;
5426 ATH_RX_UNLOCK(sc);
5427
5428 /* Let DFS at it in case it's a DFS channel */
5429 ath_dfs_radar_enable(sc, chan);
5430
5431 /* Let spectral at in case spectral is enabled */
5432 ath_spectral_enable(sc, chan);
5433
5434 /*
5435 * Let bluetooth coexistence at in case it's needed for this
--- 1671 unchanged lines hidden ---