spa.c (339034) | spa.c (339105) |
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1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE --- 7763 unchanged lines hidden (view full) --- 7772 /* 7773 * Lock out configuration changes. 7774 */ 7775 spa_config_enter(spa, SCL_CONFIG, FTAG, RW_READER); 7776 7777 spa->spa_syncing_txg = txg; 7778 spa->spa_sync_pass = 0; 7779 | 1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE --- 7763 unchanged lines hidden (view full) --- 7772 /* 7773 * Lock out configuration changes. 7774 */ 7775 spa_config_enter(spa, SCL_CONFIG, FTAG, RW_READER); 7776 7777 spa->spa_syncing_txg = txg; 7778 spa->spa_sync_pass = 0; 7779 |
7780 mutex_enter(&spa->spa_alloc_lock); 7781 VERIFY0(avl_numnodes(&spa->spa_alloc_tree)); 7782 mutex_exit(&spa->spa_alloc_lock); | 7780 for (int i = 0; i < spa->spa_alloc_count; i++) { 7781 mutex_enter(&spa->spa_alloc_locks[i]); 7782 VERIFY0(avl_numnodes(&spa->spa_alloc_trees[i])); 7783 mutex_exit(&spa->spa_alloc_locks[i]); 7784 } |
7783 7784 /* 7785 * If there are any pending vdev state changes, convert them 7786 * into config changes that go out with this transaction group. 7787 */ 7788 spa_config_enter(spa, SCL_STATE, FTAG, RW_READER); 7789 while (list_head(&spa->spa_state_dirty_list) != NULL) { 7790 /* --- 49 unchanged lines hidden (view full) --- 7840 } 7841 7842 /* 7843 * Set the top-level vdev's max queue depth. Evaluate each 7844 * top-level's async write queue depth in case it changed. 7845 * The max queue depth will not change in the middle of syncing 7846 * out this txg. 7847 */ | 7785 7786 /* 7787 * If there are any pending vdev state changes, convert them 7788 * into config changes that go out with this transaction group. 7789 */ 7790 spa_config_enter(spa, SCL_STATE, FTAG, RW_READER); 7791 while (list_head(&spa->spa_state_dirty_list) != NULL) { 7792 /* --- 49 unchanged lines hidden (view full) --- 7842 } 7843 7844 /* 7845 * Set the top-level vdev's max queue depth. Evaluate each 7846 * top-level's async write queue depth in case it changed. 7847 * The max queue depth will not change in the middle of syncing 7848 * out this txg. 7849 */ |
7848 uint64_t queue_depth_total = 0; | 7850 uint64_t slots_per_allocator = 0; |
7849 for (int c = 0; c < rvd->vdev_children; c++) { 7850 vdev_t *tvd = rvd->vdev_child[c]; 7851 metaslab_group_t *mg = tvd->vdev_mg; 7852 7853 if (mg == NULL || mg->mg_class != spa_normal_class(spa) || 7854 !metaslab_group_initialized(mg)) 7855 continue; 7856 7857 /* 7858 * It is safe to do a lock-free check here because only async 7859 * allocations look at mg_max_alloc_queue_depth, and async 7860 * allocations all happen from spa_sync(). 7861 */ | 7851 for (int c = 0; c < rvd->vdev_children; c++) { 7852 vdev_t *tvd = rvd->vdev_child[c]; 7853 metaslab_group_t *mg = tvd->vdev_mg; 7854 7855 if (mg == NULL || mg->mg_class != spa_normal_class(spa) || 7856 !metaslab_group_initialized(mg)) 7857 continue; 7858 7859 /* 7860 * It is safe to do a lock-free check here because only async 7861 * allocations look at mg_max_alloc_queue_depth, and async 7862 * allocations all happen from spa_sync(). 7863 */ |
7862 ASSERT0(refcount_count(&mg->mg_alloc_queue_depth)); | 7864 for (int i = 0; i < spa->spa_alloc_count; i++) 7865 ASSERT0(refcount_count(&(mg->mg_alloc_queue_depth[i]))); |
7863 mg->mg_max_alloc_queue_depth = max_queue_depth; | 7866 mg->mg_max_alloc_queue_depth = max_queue_depth; |
7864 queue_depth_total += mg->mg_max_alloc_queue_depth; | 7867 7868 for (int i = 0; i < spa->spa_alloc_count; i++) { 7869 mg->mg_cur_max_alloc_queue_depth[i] = 7870 zfs_vdev_def_queue_depth; 7871 } 7872 slots_per_allocator += zfs_vdev_def_queue_depth; |
7865 } 7866 metaslab_class_t *mc = spa_normal_class(spa); | 7873 } 7874 metaslab_class_t *mc = spa_normal_class(spa); |
7867 ASSERT0(refcount_count(&mc->mc_alloc_slots)); 7868 mc->mc_alloc_max_slots = queue_depth_total; | 7875 for (int i = 0; i < spa->spa_alloc_count; i++) { 7876 ASSERT0(refcount_count(&mc->mc_alloc_slots[i])); 7877 mc->mc_alloc_max_slots[i] = slots_per_allocator; 7878 } |
7869 mc->mc_alloc_throttle_enabled = zio_dva_throttle_enabled; 7870 | 7879 mc->mc_alloc_throttle_enabled = zio_dva_throttle_enabled; 7880 |
7871 ASSERT3U(mc->mc_alloc_max_slots, <=, 7872 max_queue_depth * rvd->vdev_children); 7873 | |
7874 for (int c = 0; c < rvd->vdev_children; c++) { 7875 vdev_t *vd = rvd->vdev_child[c]; 7876 vdev_indirect_state_sync_verify(vd); 7877 7878 if (vdev_indirect_should_condense(vd)) { 7879 spa_condense_indirect_start_sync(vd, tx); 7880 break; 7881 } --- 166 unchanged lines hidden (view full) --- 8048 if (spa->spa_config_syncing != NULL) { 8049 spa_config_set(spa, spa->spa_config_syncing); 8050 spa->spa_config_txg = txg; 8051 spa->spa_config_syncing = NULL; 8052 } 8053 8054 dsl_pool_sync_done(dp, txg); 8055 | 7881 for (int c = 0; c < rvd->vdev_children; c++) { 7882 vdev_t *vd = rvd->vdev_child[c]; 7883 vdev_indirect_state_sync_verify(vd); 7884 7885 if (vdev_indirect_should_condense(vd)) { 7886 spa_condense_indirect_start_sync(vd, tx); 7887 break; 7888 } --- 166 unchanged lines hidden (view full) --- 8055 if (spa->spa_config_syncing != NULL) { 8056 spa_config_set(spa, spa->spa_config_syncing); 8057 spa->spa_config_txg = txg; 8058 spa->spa_config_syncing = NULL; 8059 } 8060 8061 dsl_pool_sync_done(dp, txg); 8062 |
8056 mutex_enter(&spa->spa_alloc_lock); 8057 VERIFY0(avl_numnodes(&spa->spa_alloc_tree)); 8058 mutex_exit(&spa->spa_alloc_lock); | 8063 for (int i = 0; i < spa->spa_alloc_count; i++) { 8064 mutex_enter(&spa->spa_alloc_locks[i]); 8065 VERIFY0(avl_numnodes(&spa->spa_alloc_trees[i])); 8066 mutex_exit(&spa->spa_alloc_locks[i]); 8067 } |
8059 8060 /* 8061 * Update usable space statistics. 8062 */ 8063 while (vd = txg_list_remove(&spa->spa_vdev_txg_list, TXG_CLEAN(txg))) 8064 vdev_sync_done(vd, txg); 8065 8066 spa_update_dspace(spa); --- 270 unchanged lines hidden --- | 8068 8069 /* 8070 * Update usable space statistics. 8071 */ 8072 while (vd = txg_list_remove(&spa->spa_vdev_txg_list, TXG_CLEAN(txg))) 8073 vdev_sync_done(vd, txg); 8074 8075 spa_update_dspace(spa); --- 270 unchanged lines hidden --- |