| mpcore_timer.c (243523) | mpcore_timer.c (247463) |
|---|---|
| 1/*- 2 * Copyright (c) 2011 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * Developed by Ben Gray <ben.r.gray@gmail.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 29 unchanged lines hidden (view full) --- 38 * The timecount timer uses the global 64-bit counter, whereas the 39 * per-CPU eventtimer uses the private 32-bit counters. 40 * 41 * 42 * REF: ARM Cortex-A9 MPCore, Technical Reference Manual (rev. r2p2) 43 */ 44 45#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2011 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * Developed by Ben Gray <ben.r.gray@gmail.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions --- 29 unchanged lines hidden (view full) --- 38 * The timecount timer uses the global 64-bit counter, whereas the 39 * per-CPU eventtimer uses the private 32-bit counters. 40 * 41 * 42 * REF: ARM Cortex-A9 MPCore, Technical Reference Manual (rev. r2p2) 43 */ 44 45#include <sys/cdefs.h> |
| 46__FBSDID("$FreeBSD: head/sys/arm/arm/mpcore_timer.c 243523 2012-11-25 16:19:12Z kientzle $"); | 46__FBSDID("$FreeBSD: head/sys/arm/arm/mpcore_timer.c 247463 2013-02-28 13:46:03Z mav $"); |
| 47 48#include <sys/param.h> 49#include <sys/systm.h> 50#include <sys/bus.h> 51#include <sys/kernel.h> 52#include <sys/module.h> 53#include <sys/malloc.h> 54#include <sys/rman.h> --- 107 unchanged lines hidden (view full) --- 162 * NULL and first will point to the time to trigger. If in periodic mode 163 * period will contain the time period and first may optionally contain 164 * the time for the first period. 165 * 166 * RETURNS 167 * Always returns 0 168 */ 169static int | 47 48#include <sys/param.h> 49#include <sys/systm.h> 50#include <sys/bus.h> 51#include <sys/kernel.h> 52#include <sys/module.h> 53#include <sys/malloc.h> 54#include <sys/rman.h> --- 107 unchanged lines hidden (view full) --- 162 * NULL and first will point to the time to trigger. If in periodic mode 163 * period will contain the time period and first may optionally contain 164 * the time for the first period. 165 * 166 * RETURNS 167 * Always returns 0 168 */ 169static int |
| 170arm_tmr_start(struct eventtimer *et, struct bintime *first, 171 struct bintime *period) | 170arm_tmr_start(struct eventtimer *et, sbintime_t first, sbintime_t period) |
| 172{ | 171{ |
| 173 struct arm_tmr_softc *sc = (struct arm_tmr_softc *)et->et_priv; | |
| 174 uint32_t load, count; 175 uint32_t ctrl; 176 177 ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE; 178 | 172 uint32_t load, count; 173 uint32_t ctrl; 174 175 ctrl = PRV_TIMER_CTRL_IRQ_ENABLE | PRV_TIMER_CTRL_TIMER_ENABLE; 176 |
| 179 if (period != NULL) { 180 load = (et->et_frequency * (period->frac >> 32)) >> 32; 181 if (period->sec > 0) 182 load += et->et_frequency * period->sec; | 177 if (period != 0) { 178 load = ((uint32_t)et->et_frequency * period) >> 32; |
| 183 ctrl |= PRV_TIMER_CTRL_AUTO_RELOAD; | 179 ctrl |= PRV_TIMER_CTRL_AUTO_RELOAD; |
| 184 } else { | 180 } else |
| 185 load = 0; | 181 load = 0; |
| 186 } | |
| 187 | 182 |
| 188 if (first != NULL) { 189 count = (sc->et.et_frequency * (first->frac >> 32)) >> 32; 190 if (first->sec != 0) 191 count += sc->et.et_frequency * first->sec; 192 } else { | 183 if (first != 0) 184 count = ((uint32_t)et->et_frequency * first) >> 32; 185 else |
| 193 count = load; | 186 count = load; |
| 194 } | |
| 195 196 tmr_prv_write_4(PRV_TIMER_LOAD, load); 197 tmr_prv_write_4(PRV_TIMER_COUNT, count); 198 199 tmr_prv_write_4(PRV_TIMER_CTRL, ctrl); 200 return (0); 201} 202 --- 122 unchanged lines hidden (view full) --- 325 return (ENXIO); 326 } 327 328 sc->et.et_name = "ARM MPCore Eventtimer"; 329 sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | ET_FLAGS_PERCPU; 330 sc->et.et_quality = 1000; 331 332 sc->et.et_frequency = sc->clkfreq; | 187 188 tmr_prv_write_4(PRV_TIMER_LOAD, load); 189 tmr_prv_write_4(PRV_TIMER_COUNT, count); 190 191 tmr_prv_write_4(PRV_TIMER_CTRL, ctrl); 192 return (0); 193} 194 --- 122 unchanged lines hidden (view full) --- 317 return (ENXIO); 318 } 319 320 sc->et.et_name = "ARM MPCore Eventtimer"; 321 sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | ET_FLAGS_PERCPU; 322 sc->et.et_quality = 1000; 323 324 sc->et.et_frequency = sc->clkfreq; |
| 333 sc->et.et_min_period.sec = 0; 334 sc->et.et_min_period.frac = 335 ((0x00000002LLU << 32) / sc->et.et_frequency) << 32; 336 sc->et.et_max_period.sec = 0xfffffff0U / sc->et.et_frequency; 337 sc->et.et_max_period.frac = 338 ((0xfffffffeLLU << 32) / sc->et.et_frequency) << 32; | 325 sc->et.et_min_period = (0x00000002LLU << 32) / sc->et.et_frequency; 326 sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency; |
| 339 sc->et.et_start = arm_tmr_start; 340 sc->et.et_stop = arm_tmr_stop; 341 sc->et.et_priv = sc; 342 et_register(&sc->et); 343 344 return (0); 345} 346 --- 85 unchanged lines hidden --- | 327 sc->et.et_start = arm_tmr_start; 328 sc->et.et_stop = arm_tmr_stop; 329 sc->et.et_priv = sc; 330 et_register(&sc->et); 331 332 return (0); 333} 334 --- 85 unchanged lines hidden --- |