1/* 2 * Copyright (c) 2004-07 Applied Micro Circuits Corporation. 3 * Copyright (c) 2004-05 Vinod Kashyap. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
27 * $FreeBSD: head/sys/dev/twa/tw_osl.h 212008 2010-08-30 19:15:04Z delphij $ |
28 */ 29 30/* 31 * AMCC'S 3ware driver for 9000 series storage controllers. 32 * 33 * Author: Vinod Kashyap 34 * Modifications by: Adam Radford 35 * Modifications by: Manjunath Ranganathaiah --- 36 unchanged lines hidden (view full) --- 72#define TW_OSLI_REQ_FLAGS_DATA_OUT (1<<1) /* write request */ 73#define TW_OSLI_REQ_FLAGS_DATA_COPY_NEEDED (1<<2)/* data in ccb is misaligned, 74 have to copy to/from private buffer */ 75#define TW_OSLI_REQ_FLAGS_MAPPED (1<<3) /* request has been mapped */ 76#define TW_OSLI_REQ_FLAGS_IN_PROGRESS (1<<4) /* bus_dmamap_load returned 77 EINPROGRESS */ 78#define TW_OSLI_REQ_FLAGS_PASSTHRU (1<<5) /* pass through request */ 79#define TW_OSLI_REQ_FLAGS_SLEEPING (1<<6) /* owner sleeping on this cmd */ |
80#define TW_OSLI_REQ_FLAGS_FAILED (1<<7) /* bus_dmamap_load() failed */ |
81 82 83#ifdef TW_OSL_DEBUG 84struct tw_osli_q_stats { 85 TW_UINT32 cur_len; /* current # of items in q */ 86 TW_UINT32 max_len; /* max value reached by q_length */ 87}; 88#endif /* TW_OSL_DEBUG */ --- 7 unchanged lines hidden (view full) --- 96/* Driver's request packet. */ 97struct tw_osli_req_context { 98 struct tw_cl_req_handle req_handle;/* tag to track req b/w OSL & CL */ 99 struct mtx ioctl_wake_timeout_lock_handle;/* non-spin lock used to detect ioctl timeout */ 100 struct mtx *ioctl_wake_timeout_lock;/* ptr to above lock */ 101 struct twa_softc *ctlr; /* ptr to OSL's controller context */ 102 TW_VOID *data; /* ptr to data being passed to CL */ 103 TW_UINT32 length; /* length of buf being passed to CL */ |
104 TW_UINT64 deadline;/* request timeout (in absolute time) */ |
105 106 /* 107 * ptr to, and length of data passed to us from above, in case a buffer 108 * copy was done due to non-compliance to alignment requirements 109 */ 110 TW_VOID *real_data; 111 TW_UINT32 real_length; 112 --- 35 unchanged lines hidden (view full) --- 148 struct task deferred_intr_callback;/* taskqueue function */ 149 struct mtx io_lock_handle;/* general purpose lock */ 150 struct mtx *io_lock;/* ptr to general purpose lock */ 151 struct mtx q_lock_handle; /* queue manipulation lock */ 152 struct mtx *q_lock;/* ptr to queue manipulation lock */ 153 struct mtx sim_lock_handle;/* sim lock shared with cam */ 154 struct mtx *sim_lock;/* ptr to sim lock */ 155 |
156 struct callout watchdog_callout[2]; /* For command timout */ 157 TW_UINT32 watchdog_index; 158 |
159#ifdef TW_OSL_DEBUG 160 struct tw_osli_q_stats q_stats[TW_OSLI_Q_COUNT];/* queue statistics */ 161#endif /* TW_OSL_DEBUG */ 162 163 device_t bus_dev; /* bus device */ 164 struct cdev *ctrl_dev; /* control device */ 165 struct resource *reg_res; /* register interface window */ 166 TW_INT32 reg_res_id; /* register resource id */ --- 157 unchanged lines hidden --- |