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vf_anadig.c (266152) vf_anadig.c (266198)
1/*-
1/*-
2 * Copyright (c) 2013 Ruslan Bukin
2 * Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright

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25 */
26
27/*
28 * Vybrid Family Analog components control digital interface (ANADIG)
29 * Chapter 11, Vybrid Reference Manual, Rev. 5, 07/2013
30 */
31
32#include <sys/cdefs.h>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright

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25 */
26
27/*
28 * Vybrid Family Analog components control digital interface (ANADIG)
29 * Chapter 11, Vybrid Reference Manual, Rev. 5, 07/2013
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/vybrid/vf_anadig.c 266152 2014-05-15 16:11:06Z ian $");
33__FBSDID("$FreeBSD: stable/10/sys/arm/freescale/vybrid/vf_anadig.c 266198 2014-05-15 22:03:24Z ian $");
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/bus.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/malloc.h>
41#include <sys/rman.h>

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94#define ENABLE_LINREG (1 << 0)
95#define EN_CLK_TO_UTMI (1 << 30)
96
97#define CTRL_BYPASS (1 << 16)
98#define CTRL_PWR (1 << 12)
99#define CTRL_PLL_EN (1 << 13)
100#define EN_USB_CLKS (1 << 6)
101
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/bus.h>
38#include <sys/kernel.h>
39#include <sys/module.h>
40#include <sys/malloc.h>
41#include <sys/rman.h>

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94#define ENABLE_LINREG (1 << 0)
95#define EN_CLK_TO_UTMI (1 << 30)
96
97#define CTRL_BYPASS (1 << 16)
98#define CTRL_PWR (1 << 12)
99#define CTRL_PLL_EN (1 << 13)
100#define EN_USB_CLKS (1 << 6)
101
102#define PLL4_CTRL_DIV_SEL_S 0
103#define PLL4_CTRL_DIV_SEL_M 0x7f
104
102struct anadig_softc {
103 struct resource *res[1];
104 bus_space_tag_t bst;
105 bus_space_handle_t bsh;
106};
107
105struct anadig_softc {
106 struct resource *res[1];
107 bus_space_tag_t bst;
108 bus_space_handle_t bsh;
109};
110
111struct anadig_softc *anadig_sc;
112
108static struct resource_spec anadig_spec[] = {
113static struct resource_spec anadig_spec[] = {
109 { SYS_RES_MEMORY, 0, RF_ACTIVE },
114 { SYS_RES_MEMORY, 0, RF_ACTIVE },
110 { -1, 0 }
111};
112
113static int
114anadig_probe(device_t dev)
115{
116
117 if (!ofw_bus_status_okay(dev))

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143
144 reg = READ4(sc, pll_ctrl);
145 reg |= (CTRL_PLL_EN);
146 WRITE4(sc, pll_ctrl, reg);
147
148 return (0);
149}
150
115 { -1, 0 }
116};
117
118static int
119anadig_probe(device_t dev)
120{
121
122 if (!ofw_bus_status_okay(dev))

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148
149 reg = READ4(sc, pll_ctrl);
150 reg |= (CTRL_PLL_EN);
151 WRITE4(sc, pll_ctrl, reg);
152
153 return (0);
154}
155
156uint32_t
157pll4_configure_output(uint32_t mfi, uint32_t mfn, uint32_t mfd)
158{
159 struct anadig_softc *sc;
160 int reg;
161
162 sc = anadig_sc;
163
164 /*
165 * PLLout = Fsys * (MFI+(MFN/MFD))
166 */
167
168 reg = READ4(sc, ANADIG_PLL4_CTRL);
169 reg &= ~(PLL4_CTRL_DIV_SEL_M << PLL4_CTRL_DIV_SEL_S);
170 reg |= (mfi << PLL4_CTRL_DIV_SEL_S);
171 WRITE4(sc, ANADIG_PLL4_CTRL, reg);
172 WRITE4(sc, ANADIG_PLL4_NUM, mfn);
173 WRITE4(sc, ANADIG_PLL4_DENOM, mfd);
174
175 return (0);
176}
177
151static int
152anadig_attach(device_t dev)
153{
154 struct anadig_softc *sc;
155 int reg;
156
157 sc = device_get_softc(dev);
158
159 if (bus_alloc_resources(dev, anadig_spec, sc->res)) {
160 device_printf(dev, "could not allocate resources\n");
161 return (ENXIO);
162 }
163
164 /* Memory interface */
165 sc->bst = rman_get_bustag(sc->res[0]);
166 sc->bsh = rman_get_bushandle(sc->res[0]);
167
178static int
179anadig_attach(device_t dev)
180{
181 struct anadig_softc *sc;
182 int reg;
183
184 sc = device_get_softc(dev);
185
186 if (bus_alloc_resources(dev, anadig_spec, sc->res)) {
187 device_printf(dev, "could not allocate resources\n");
188 return (ENXIO);
189 }
190
191 /* Memory interface */
192 sc->bst = rman_get_bustag(sc->res[0]);
193 sc->bsh = rman_get_bushandle(sc->res[0]);
194
195 anadig_sc = sc;
196
168 /* Enable USB PLLs */
169 enable_pll(sc, ANADIG_PLL3_CTRL);
170 enable_pll(sc, ANADIG_PLL7_CTRL);
171
197 /* Enable USB PLLs */
198 enable_pll(sc, ANADIG_PLL3_CTRL);
199 enable_pll(sc, ANADIG_PLL7_CTRL);
200
172 /* Enable other */
201 /* Enable other PLLs */
173 enable_pll(sc, ANADIG_PLL1_CTRL);
174 enable_pll(sc, ANADIG_PLL2_CTRL);
175 enable_pll(sc, ANADIG_PLL4_CTRL);
176 enable_pll(sc, ANADIG_PLL5_CTRL);
177 enable_pll(sc, ANADIG_PLL6_CTRL);
178
179 /* Enable USB voltage regulator */
180 reg = READ4(sc, ANADIG_REG_3P0);

--- 37 unchanged lines hidden --- 		202 enable_pll(sc, ANADIG_PLL1_CTRL);
203 enable_pll(sc, ANADIG_PLL2_CTRL);
204 enable_pll(sc, ANADIG_PLL4_CTRL);
205 enable_pll(sc, ANADIG_PLL5_CTRL);
206 enable_pll(sc, ANADIG_PLL6_CTRL);
207
208 /* Enable USB voltage regulator */
209 reg = READ4(sc, ANADIG_REG_3P0);

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