| ar71xxreg.h (213286) | ar71xxreg.h (233081) |
|---|---|
| 1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
| 27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 213286 2010-09-29 23:06:41Z gonzo $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 233081 2012-03-17 07:25:23Z adrian $ */ |
| 28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 227 unchanged lines hidden (view full) --- 263/* AR91XX chipset revision details */ 264#define AR91XX_REV_ID_MINOR_MASK 0x3 265#define AR91XX_REV_ID_MINOR_AR9130 0x0 266#define AR91XX_REV_ID_MINOR_AR9132 0x1 267#define AR91XX_REV_ID_REVISION_MASK 0x3 268#define AR91XX_REV_ID_REVISION_SHIFT 2 269 270/* | 28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 227 unchanged lines hidden (view full) --- 263/* AR91XX chipset revision details */ 264#define AR91XX_REV_ID_MINOR_MASK 0x3 265#define AR91XX_REV_ID_MINOR_AR9130 0x0 266#define AR91XX_REV_ID_MINOR_AR9132 0x1 267#define AR91XX_REV_ID_REVISION_MASK 0x3 268#define AR91XX_REV_ID_REVISION_SHIFT 2 269 270/* |
| 271 * AR71xx MII control region 272 */ 273#define AR71XX_MII0_CTRL 0x18070000 274#define AR71XX_MII1_CTRL 0x18070004 275#define MII_CTRL_SPEED_SHIFT 4 276#define MII_CTRL_SPEED_MASK 3 277#define MII_CTRL_SPEED_10 0 278#define MII_CTRL_SPEED_100 1 279#define MII_CTRL_SPEED_1000 2 280 281/* |
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| 271 * GigE adapters region 272 */ 273#define AR71XX_MAC0_BASE 0x19000000 274#define AR71XX_MAC1_BASE 0x1A000000 275/* 276 * All 5 PHYs accessible only through MAC0 register space 277 */ 278#define AR71XX_MII_BASE 0x19000000 --- 250 unchanged lines hidden --- | 282 * GigE adapters region 283 */ 284#define AR71XX_MAC0_BASE 0x19000000 285#define AR71XX_MAC1_BASE 0x1A000000 286/* 287 * All 5 PHYs accessible only through MAC0 register space 288 */ 289#define AR71XX_MII_BASE 0x19000000 --- 250 unchanged lines hidden --- |