1//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the PowerPC implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef POWERPC32_REGISTERINFO_H
16#define POWERPC32_REGISTERINFO_H
17
18#include "PPC.h"
19#include "PPCGenRegisterInfo.h.inc"
20#include <map>
21
22namespace llvm {
23class PPCSubtarget;
24class TargetInstrInfo;
25class Type;
26
27class PPCRegisterInfo : public PPCGenRegisterInfo {
28 std::map<unsigned, unsigned> ImmToIdxMap;
29 const PPCSubtarget &Subtarget;
30 const TargetInstrInfo &TII;
31public:
32 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
33
34 /// getRegisterNumbering - Given the enum value for some register, e.g.
35 /// PPC::F14, return the number that it corresponds to (e.g. 14).
36 static unsigned getRegisterNumbering(unsigned RegEnum);
37
38 /// getPointerRegClass - Return the register class to use to hold pointers.
39 /// This is used for addressing modes.
40 virtual const TargetRegisterClass *getPointerRegClass() const;
41
42 /// Code Generation virtual methods...
43 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
44
45 const TargetRegisterClass* const*
46 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
47
48 BitVector getReservedRegs(const MachineFunction &MF) const;
49
50 /// targetHandlesStackFrameRounding - Returns true if the target is
51 /// responsible for rounding up the stack frame (probably at emitPrologue
52 /// time).
53 bool targetHandlesStackFrameRounding() const { return true; }
54
55 /// requiresRegisterScavenging - We require a register scavenger.
56 /// FIXME (64-bit): Should be inlined.
57 bool requiresRegisterScavenging(const MachineFunction &MF) const;
58
59 bool hasFP(const MachineFunction &MF) const;
60
61 void eliminateCallFramePseudoInstr(MachineFunction &MF,
62 MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator I) const;
64
65 void lowerDynamicAlloc(MachineBasicBlock::iterator II,
66 int SPAdj, RegScavenger *RS) const;
67 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
68 int SPAdj, RegScavenger *RS) const;
69 void eliminateFrameIndex(MachineBasicBlock::iterator II,
70 int SPAdj, RegScavenger *RS = NULL) const;
71
72 /// determineFrameLayout - Determine the size of the frame and maximum call
73 /// frame size.
74 void determineFrameLayout(MachineFunction &MF) const;
75
76 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
77 RegScavenger *RS = NULL) const;
| 1//===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains the PowerPC implementation of the TargetRegisterInfo
11// class.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef POWERPC32_REGISTERINFO_H
16#define POWERPC32_REGISTERINFO_H
17
18#include "PPC.h"
19#include "PPCGenRegisterInfo.h.inc"
20#include <map>
21
22namespace llvm {
23class PPCSubtarget;
24class TargetInstrInfo;
25class Type;
26
27class PPCRegisterInfo : public PPCGenRegisterInfo {
28 std::map<unsigned, unsigned> ImmToIdxMap;
29 const PPCSubtarget &Subtarget;
30 const TargetInstrInfo &TII;
31public:
32 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
33
34 /// getRegisterNumbering - Given the enum value for some register, e.g.
35 /// PPC::F14, return the number that it corresponds to (e.g. 14).
36 static unsigned getRegisterNumbering(unsigned RegEnum);
37
38 /// getPointerRegClass - Return the register class to use to hold pointers.
39 /// This is used for addressing modes.
40 virtual const TargetRegisterClass *getPointerRegClass() const;
41
42 /// Code Generation virtual methods...
43 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
44
45 const TargetRegisterClass* const*
46 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
47
48 BitVector getReservedRegs(const MachineFunction &MF) const;
49
50 /// targetHandlesStackFrameRounding - Returns true if the target is
51 /// responsible for rounding up the stack frame (probably at emitPrologue
52 /// time).
53 bool targetHandlesStackFrameRounding() const { return true; }
54
55 /// requiresRegisterScavenging - We require a register scavenger.
56 /// FIXME (64-bit): Should be inlined.
57 bool requiresRegisterScavenging(const MachineFunction &MF) const;
58
59 bool hasFP(const MachineFunction &MF) const;
60
61 void eliminateCallFramePseudoInstr(MachineFunction &MF,
62 MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator I) const;
64
65 void lowerDynamicAlloc(MachineBasicBlock::iterator II,
66 int SPAdj, RegScavenger *RS) const;
67 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex,
68 int SPAdj, RegScavenger *RS) const;
69 void eliminateFrameIndex(MachineBasicBlock::iterator II,
70 int SPAdj, RegScavenger *RS = NULL) const;
71
72 /// determineFrameLayout - Determine the size of the frame and maximum call
73 /// frame size.
74 void determineFrameLayout(MachineFunction &MF) const;
75
76 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
77 RegScavenger *RS = NULL) const;
|
78 void emitPrologue(MachineFunction &MF) const;
79 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
80
81 // Debug information queries.
82 unsigned getRARegister() const;
83 unsigned getFrameRegister(MachineFunction &MF) const;
84 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
85
86 // Exception handling queries.
87 unsigned getEHExceptionRegister() const;
88 unsigned getEHHandlerRegister() const;
89
90 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
91};
92
93} // end namespace llvm
94
95#endif
| 80 void emitPrologue(MachineFunction &MF) const;
81 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
82
83 // Debug information queries.
84 unsigned getRARegister() const;
85 unsigned getFrameRegister(MachineFunction &MF) const;
86 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
87
88 // Exception handling queries.
89 unsigned getEHExceptionRegister() const;
90 unsigned getEHHandlerRegister() const;
91
92 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
93};
94
95} // end namespace llvm
96
97#endif
|