1/* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
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41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47#include "config.h"
48#include "system.h"
49#include "coretypes.h"
50#include "tm.h"
51
52#include "tree.h"
53#include "rtl.h"
54#include "tm_p.h"
55#include "regs.h"
56#include "insn-config.h"
57#include "insn-attr.h"
58#include "recog.h"
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65#include "function.h"
66#include "toplev.h"
67#include "reload.h"
68#include "intl.h"
69#include "basic-block.h"
70#include "target.h"
71#include "debug.h"
72#include "expr.h"
73#include "cfglayout.h"
74
75#ifdef XCOFF_DEBUGGING_INFO
76#include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
78#endif
79
80#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81#include "dwarf2out.h"
82#endif
83
84#ifdef DBX_DEBUGGING_INFO
85#include "dbxout.h"
86#endif
87
88/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90#ifndef CC_STATUS_INIT
91#define CC_STATUS_INIT
92#endif
93
94/* How to start an assembler comment. */
95#ifndef ASM_COMMENT_START
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106#endif
107
108#if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109#define HAVE_READONLY_DATA_SECTION 1
110#else
111#define HAVE_READONLY_DATA_SECTION 0
112#endif
113
114/* Bitflags used by final_scan_insn. */
115#define SEEN_BB 1
116#define SEEN_NOTE 2
117#define SEEN_EMITTED 4
118
119/* Last insn processed by final_scan_insn. */
120static rtx debug_insn;
121rtx current_output_insn;
122
123/* Line number of last NOTE. */
124static int last_linenum;
125
126/* Highest line number in current block. */
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141
142/* Number of operands of this insn, for an `asm' with operands. */
143static unsigned int insn_noperands;
144
145/* Compare optimization flag. */
146
147static rtx last_ignored_compare = 0;
148
149/* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
151
152static int insn_counter = 0;
153
154#ifdef HAVE_cc0
155/* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
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170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
175
176char regs_ever_live[FIRST_PSEUDO_REGISTER];
177
178/* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
181
182char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
183
184/* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
187
188int frame_pointer_needed;
189
190/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
191
192static int block_depth;
193
194/* Nonzero if have enabled APP processing of our assembler output. */
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201rtx final_sequence;
202
203#ifdef ASSEMBLER_DIALECT
204
205/* Number of the assembler dialect to use, starting at 0. */
206static int dialect_number;
207#endif
208
209#ifdef HAVE_conditional_execution
210/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211rtx current_insn_predicate;
212#endif
213
214#ifdef HAVE_ATTR_length
215static int asm_insn_count (rtx);
216#endif
217static void profile_function (FILE *);
218static void profile_after_prologue (FILE *);
219static bool notice_source_line (rtx);
220static rtx walk_alter_subreg (rtx *);
221static void output_asm_name (void);
222static void output_alternate_entry_point (FILE *, rtx);
223static tree get_mem_expr_from_op (rtx, int *);
224static void output_asm_operand_names (rtx *, int *, int);
225static void output_operand (rtx, int);
226#ifdef LEAF_REGISTERS
227static void leaf_renumber_regs (rtx);
228#endif
229#ifdef HAVE_cc0
230static int alter_cond (rtx);
231#endif
232#ifndef ADDR_VEC_ALIGN
233static int final_addr_vec_align (rtx);
234#endif
235#ifdef HAVE_ATTR_length
236static int align_fuzz (rtx, rtx, int, unsigned);
237#endif
238
239/* Initialize data in final at the beginning of a compilation. */
240
241void
242init_final (const char *filename ATTRIBUTE_UNUSED)
243{
244 app_on = 0;
245 final_sequence = 0;
246
247#ifdef ASSEMBLER_DIALECT
248 dialect_number = ASSEMBLER_DIALECT;
249#endif
250}
251
252/* Default target function prologue and epilogue assembler output.
253
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
256void
257default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
259{
260}
261
262/* Default target hook that outputs nothing to a stream. */
263void
264no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
265{
266}
267
268/* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
270
271void
272app_enable (void)
273{
274 if (! app_on)
275 {
276 fputs (ASM_APP_ON, asm_out_file);
277 app_on = 1;
278 }
279}
280
281/* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
283
284void
285app_disable (void)
286{
287 if (app_on)
288 {
289 fputs (ASM_APP_OFF, asm_out_file);
290 app_on = 0;
291 }
292}
293
294/* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
297
298#ifdef DELAY_SLOTS
299int
300dbr_sequence_length (void)
301{
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
304 else
305 return 0;
306}
307#endif
308
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345
346static rtx *uid_align;
347static int *uid_shuid;
348static struct label_alignment *label_align;
349
350/* Indicate that branch shortening hasn't yet been done. */
351
352void
353init_insn_lengths (void)
354{
355 if (uid_shuid)
356 {
357 free (uid_shuid);
358 uid_shuid = 0;
359 }
360 if (insn_lengths)
361 {
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372 uid_align = 0;
373 }
374}
375
376/* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, get its maximum length. */
378
379int
380get_attr_length (rtx insn ATTRIBUTE_UNUSED)
381{
382#ifdef HAVE_ATTR_length
383 rtx body;
384 int i;
385 int length = 0;
386
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
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506#endif
507
508#ifndef JUMP_ALIGN_MAX_SKIP
509#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
510#endif
511
512#ifndef ADDR_VEC_ALIGN
513static int
514final_addr_vec_align (rtx addr_vec)
515{
516 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
517
518 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
519 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
520 return exact_log2 (align);
521
522}
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536 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
537
538#define LABEL_TO_MAX_SKIP(LABEL) \
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
540
541/* For the benefit of port specific code do this also as a function. */
542
543int
544label_to_alignment (rtx label)
545{
546 return LABEL_TO_ALIGNMENT (label);
547}
548
549#ifdef HAVE_ATTR_length
550/* The differences in addresses
551 between a branch and its target might grow or shrink depending on
552 the alignment the start insn of the range (the branch for a forward
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571 START and END might grow / shrink due to a different address for start
572 which changes the size of alignment insns between START and END.
573 KNOWN_ALIGN_LOG is the alignment known for START.
574 GROWTH should be ~0 if the objective is to compute potential code size
575 increase, and 0 if the objective is to compute potential shrink.
576 The return value is undefined for any other value of GROWTH. */
577
578static int
579align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
580{
581 int uid = INSN_UID (start);
582 rtx align_label;
583 int known_align = 1 << known_align_log;
584 int end_shuid = INSN_SHUID (end);
585 int fuzz = 0;
586
587 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
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610 branch shortening pass, minus a value to account for possible size
611 increase due to alignment. For a backward branch, it is the start
612 address of the branch as known from the current pass, plus a value
613 to account for possible size increase due to alignment.
614 NB.: Therefore, the maximum offset allowed for backward branches needs
615 to exclude the branch size. */
616
617int
618insn_current_reference_address (rtx branch)
619{
620 rtx dest, seq;
621 int seq_uid;
622
623 if (! INSN_ADDRESSES_SET_P ())
624 return 0;
625
626 seq = NEXT_INSN (PREV_INSN (branch));
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647 /* Backward branch. */
648 return (insn_current_address
649 + align_fuzz (dest, seq, length_unit_log, ~0));
650 }
651}
652#endif /* HAVE_ATTR_length */
653
654void
655compute_alignments (void)
656{
657 int log, max_skip, max_log;
658 basic_block bb;
659
660 if (label_align)
661 {
662 free (label_align);
663 label_align = 0;
664 }
665
666 max_labelno = max_label_num ();
667 min_labelno = get_first_label_num ();
668 label_align = xcalloc (max_labelno - min_labelno + 1,
669 sizeof (struct label_alignment));
670
671 /* If not optimizing or optimizing for size, don't assign any alignments. */
672 if (! optimize || optimize_size)
673 return;
674
675 FOR_EACH_BB (bb)
676 {
677 rtx label = BB_HEAD (bb);
678 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
679 edge e;
680
681 if (GET_CODE (label) != CODE_LABEL
682 || probably_never_executed_bb_p (bb))
683 continue;
684 max_log = LABEL_ALIGN (label);
685 max_skip = LABEL_ALIGN_MAX_SKIP;
686
687 for (e = bb->pred; e; e = e->pred_next)
688 {
689 if (e->flags & EDGE_FALLTHRU)
690 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
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713 {
714 max_log = log;
715 max_skip = JUMP_ALIGN_MAX_SKIP;
716 }
717 }
718 /* In case block is frequent and reached mostly by non-fallthru edge,
719 align it. It is most likely a first block of loop. */
720 if (has_fallthru
721 && maybe_hot_bb_p (bb)
722 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
723 && branch_frequency > fallthru_frequency * 2)
724 {
725 log = LOOP_ALIGN (label);
726 if (max_log < log)
727 {
728 max_log = log;
729 max_skip = LOOP_ALIGN_MAX_SKIP;
730 }
731 }
732 LABEL_TO_ALIGNMENT (label) = max_log;
733 LABEL_TO_MAX_SKIP (label) = max_skip;
734 }
735}
736
737/* Make a pass over all insns and compute their actual lengths by shortening
738 any branches of variable length if possible. */
739
740/* shorten_branches might be called multiple times: for example, the SH
741 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
742 In order to do this, it needs proper length information, which it obtains
743 by calling shorten_branches. This cannot be collapsed with
744 shorten_branches itself into a single pass unless we also want to integrate
745 reorg.c, since the branch splitting exposes new instructions with delay
746 slots. */
747
748void
749shorten_branches (rtx first ATTRIBUTE_UNUSED)
750{
751 rtx insn;
752 int max_uid;
753 int i;
754 int max_log;
755 int max_skip;
756#ifdef HAVE_ATTR_length
757#define MAX_CODE_ALIGN 16
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762 int uid;
763 rtx align_tab[MAX_CODE_ALIGN];
764
765#endif
766
767 /* Compute maximum UID and allocate label_align / uid_shuid. */
768 max_uid = get_max_uid ();
769
770 uid_shuid = xmalloc (max_uid * sizeof *uid_shuid);
771
772 if (max_labelno != max_label_num ())
773 {
774 int old = max_labelno;
775 int n_labels;
776 int n_old_labels;
777
778 max_labelno = max_label_num ();
779
780 n_labels = max_labelno - min_labelno + 1;
781 n_old_labels = old - min_labelno + 1;
782
783 label_align = xrealloc (label_align,
784 n_labels * sizeof (struct label_alignment));
785
786 /* Range of labels grows monotonically in the function. Abort here
787 means that the initialization of array got lost. */
788 if (n_old_labels > n_labels)
789 abort ();
790
791 memset (label_align + n_old_labels, 0,
792 (n_labels - n_old_labels) * sizeof (struct label_alignment));
--- 78 unchanged lines hidden (view full) ---
871 }
872 break;
873 }
874 }
875 }
876#ifdef HAVE_ATTR_length
877
878 /* Allocate the rest of the arrays. */
879 insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths));
880 insn_lengths_max_uid = max_uid;
881 /* Syntax errors can lead to labels being outside of the main insn stream.
882 Initialize insn_addresses, so that we get reproducible results. */
883 INSN_ADDRESSES_ALLOC (max_uid);
884
885 varying_length = xcalloc (max_uid, sizeof (char));
886
887 /* Initialize uid_align. We scan instructions
888 from end to start, and keep in align_tab[n] the last seen insn
889 that does an alignment of at least n+1, i.e. the successor
890 in the alignment chain for an insn that does / has a known
891 alignment of n. */
892 uid_align = xcalloc (max_uid, sizeof *uid_align);
893
894 for (i = MAX_CODE_ALIGN; --i >= 0;)
895 align_tab[i] = NULL_RTX;
896 seq = get_last_insn ();
897 for (; seq; seq = PREV_INSN (seq))
898 {
899 int uid = INSN_UID (seq);
900 int log;
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961 flags.min_after_base = min > rel;
962 flags.max_after_base = max > rel;
963 ADDR_DIFF_VEC_FLAGS (pat) = flags;
964 }
965 }
966#endif /* CASE_VECTOR_SHORTEN_MODE */
967
968 /* Compute initial lengths, addresses, and varying flags for each insn. */
969 for (insn_current_address = 0, insn = first;
970 insn != 0;
971 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
972 {
973 uid = INSN_UID (insn);
974
975 insn_lengths[uid] = 0;
976
977 if (GET_CODE (insn) == CODE_LABEL)
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1062 /* Now loop over all the insns finding varying length insns. For each,
1063 get the current insn length. If it has changed, reflect the change.
1064 When nothing changes for a full pass, we are done. */
1065
1066 while (something_changed)
1067 {
1068 something_changed = 0;
1069 insn_current_align = MAX_CODE_ALIGN - 1;
1070 for (insn_current_address = 0, insn = first;
1071 insn != 0;
1072 insn = NEXT_INSN (insn))
1073 {
1074 int new_length;
1075#ifdef ADJUST_INSN_LENGTH
1076 int tmp_length;
1077#endif
1078 int length_align;
--- 217 unchanged lines hidden (view full) ---
1296}
1297
1298#ifdef HAVE_ATTR_length
1299/* Given the body of an INSN known to be generated by an ASM statement, return
1300 the number of machine instructions likely to be generated for this insn.
1301 This is used to compute its length. */
1302
1303static int
1304asm_insn_count (rtx body)
1305{
1306 const char *template;
1307 int count = 1;
1308
1309 if (GET_CODE (body) == ASM_INPUT)
1310 template = XSTR (body, 0);
1311 else
1312 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
--- 12 unchanged lines hidden (view full) ---
1325 assembler pseudo-ops have already been output in `assemble_start_function'.
1326
1327 FIRST is the first insn of the rtl for the function being compiled.
1328 FILE is the file to write assembler code to.
1329 OPTIMIZE is nonzero if we should eliminate redundant
1330 test and compare insns. */
1331
1332void
1333final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1334 int optimize ATTRIBUTE_UNUSED)
1335{
1336 block_depth = 0;
1337
1338 this_is_asm_operands = 0;
1339
1340 last_filename = locator_file (prologue_locator);
1341 last_linenum = locator_line (prologue_locator);
1342
1343 high_block_linenum = high_function_linenum = last_linenum;
1344
1345 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1346
1347#if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1348 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1349 dwarf2out_begin_prologue (0, NULL);
1350#endif
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1366 dwarf2out_frame_debug (NULL_RTX);
1367#endif
1368
1369 /* If debugging, assign block numbers to all of the blocks in this
1370 function. */
1371 if (write_symbols)
1372 {
1373 remove_unnecessary_notes ();
1374 reemit_insn_block_notes ();
1375 number_blocks (current_function_decl);
1376 /* We never actually put out begin/end notes for the top-level
1377 block in the function. But, conceptually, that block is
1378 always needed. */
1379 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1380 }
1381
1382 /* First output the function prologue: code to set up the stack frame. */
1383 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1384
1385 /* If the machine represents the prologue as RTL, the profiling code must
1386 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1387#ifdef HAVE_prologue
1388 if (! HAVE_prologue)
1389#endif
1390 profile_after_prologue (file);
1391}
1392
1393static void
1394profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1395{
1396#ifndef PROFILE_BEFORE_PROLOGUE
1397 if (current_function_profile)
1398 profile_function (file);
1399#endif /* not PROFILE_BEFORE_PROLOGUE */
1400}
1401
1402static void
1403profile_function (FILE *file ATTRIBUTE_UNUSED)
1404{
1405#ifndef NO_PROFILE_COUNTERS
1406# define NO_PROFILE_COUNTERS 0
1407#endif
1408#if defined(ASM_OUTPUT_REG_PUSH)
1409 int sval = current_function_returns_struct;
1410 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1411#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1412 int cxt = current_function_needs_context;
1413#endif
1414#endif /* ASM_OUTPUT_REG_PUSH */
1415
1416 if (! NO_PROFILE_COUNTERS)
1417 {
1418 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1419 data_section ();
1420 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1421 (*targetm.asm_out.internal_label) (file, "LP", current_function_funcdef_no);
1422 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1423 }
1424
1425 function_section (current_function_decl);
1426
1427#if defined(ASM_OUTPUT_REG_PUSH)
1428 if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG)
1429 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1430#endif
1431
1432#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1433 if (cxt)
1434 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1435#else
1436#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1437 if (cxt)
1438 {
--- 11 unchanged lines hidden (view full) ---
1450#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1451 if (cxt)
1452 {
1453 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1454 }
1455#endif
1456#endif
1457
1458#if defined(ASM_OUTPUT_REG_PUSH)
1459 if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG)
1460 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1461#endif
1462}
1463
1464/* Output assembler code for the end of a function.
1465 For clarity, args are same as those of `final_start_function'
1466 even though not all of them are needed. */
1467
1468void
1469final_end_function (void)
1470{
1471 app_disable ();
1472
1473 (*debug_hooks->end_function) (high_function_linenum);
1474
1475 /* Finally, output the function epilogue:
1476 code to restore the stack frame and return to the caller. */
1477 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
--- 15 unchanged lines hidden (view full) ---
1493 just scanning as if we were outputting.
1494 Prescanning deletes and rearranges insns just like ordinary output.
1495 PRESCAN is -2 if we are outputting after having prescanned.
1496 In this case, don't try to delete or rearrange insns
1497 because that has already been done.
1498 Prescanning is done only on certain machines. */
1499
1500void
1501final (rtx first, FILE *file, int optimize, int prescan)
1502{
1503 rtx insn;
1504 int max_uid = 0;
1505 int seen = 0;
1506
1507 last_ignored_compare = 0;
1508
1509#ifdef SDB_DEBUGGING_INFO
1510 /* When producing SDB debugging info, delete troublesome line number
1511 notes from inlined functions in other files as well as duplicate
1512 line number notes. */
1513 if (write_symbols == SDB_DEBUG)
1514 {
1515 rtx last = 0;
1516 for (insn = first; insn; insn = NEXT_INSN (insn))
1517 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1518 {
1519 if ((RTX_INTEGRATED_P (insn)
1520 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1521 || (last != 0
1522 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1523 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1524 {
1525 delete_insn (insn); /* Use delete_note. */
1526 continue;
1527 }
1528 last = insn;
1529 }
1530 }
1531#endif
1532
1533 for (insn = first; insn; insn = NEXT_INSN (insn))
1534 {
1535 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1536 max_uid = INSN_UID (insn);
1537#ifdef HAVE_cc0
1538 /* If CC tracking across branches is enabled, record the insn which
1539 jumps to each branch only reached from one place. */
1540 if (optimize && GET_CODE (insn) == JUMP_INSN)
1541 {
1542 rtx lab = JUMP_LABEL (insn);
1543 if (lab && LABEL_NUSES (lab) == 1)
1544 {
--- 19 unchanged lines hidden (view full) ---
1564 insn_current_address = -1;
1565 else
1566 abort ();
1567 }
1568 else
1569 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1570#endif /* HAVE_ATTR_length */
1571
1572 insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
1573 }
1574}
1575
1576const char *
1577get_insn_template (int code, rtx insn)
1578{
1579 switch (insn_data[code].output_format)
1580 {
1581 case INSN_OUTPUT_FORMAT_SINGLE:
1582 return insn_data[code].output.single;
1583 case INSN_OUTPUT_FORMAT_MULTI:
1584 return insn_data[code].output.multi[which_alternative];
1585 case INSN_OUTPUT_FORMAT_FUNCTION:
1586 if (insn == NULL)
1587 abort ();
1588 return (*insn_data[code].output.function) (recog_data.operand, insn);
1589
1590 default:
1591 abort ();
1592 }
1593}
1594
1595/* Emit the appropriate declaration for an alternate-entry-point
1596 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1597 LABEL_KIND != LABEL_NORMAL.
1598
1599 The case fall-through in this function is intentional. */
1600static void
1601output_alternate_entry_point (FILE *file, rtx insn)
1602{
1603 const char *name = LABEL_NAME (insn);
1604
1605 switch (LABEL_KIND (insn))
1606 {
1607 case LABEL_WEAK_ENTRY:
1608#ifdef ASM_WEAKEN_LABEL
1609 ASM_WEAKEN_LABEL (file, name);
--- 14 unchanged lines hidden (view full) ---
1624}
1625
1626/* The final scan for one insn, INSN.
1627 Args are same as in `final', except that INSN
1628 is the insn being scanned.
1629 Value returned is the next insn to be scanned.
1630
1631 NOPEEPHOLES is the flag to disallow peephole processing (currently
1632 used for within delayed branch sequence output).
1633
1634 SEEN is used to track the end of the prologue, for emitting
1635 debug information. We force the emission of a line note after
1636 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1637 at the beginning of the second basic block, whichever comes
1638 first. */
1639
1640rtx
1641final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1642 int prescan, int nopeepholes ATTRIBUTE_UNUSED,
1643 int *seen)
1644{
1645#ifdef HAVE_cc0
1646 rtx set;
1647#endif
1648
1649 insn_counter++;
1650
1651 /* Ignore deleted insns. These can occur when we split insns (due to a
--- 22 unchanged lines hidden (view full) ---
1674
1675 case NOTE_INSN_BASIC_BLOCK:
1676#ifdef IA64_UNWIND_INFO
1677 IA64_UNWIND_EMIT (asm_out_file, insn);
1678#endif
1679 if (flag_debug_asm)
1680 fprintf (asm_out_file, "\t%s basic block %d\n",
1681 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1682
1683 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1684 {
1685 *seen |= SEEN_EMITTED;
1686 last_filename = NULL;
1687 }
1688 else
1689 *seen |= SEEN_BB;
1690
1691 break;
1692
1693 case NOTE_INSN_EH_REGION_BEG:
1694 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1695 NOTE_EH_HANDLER (insn));
1696 break;
1697
1698 case NOTE_INSN_EH_REGION_END:
1699 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1700 NOTE_EH_HANDLER (insn));
1701 break;
1702
1703 case NOTE_INSN_PROLOGUE_END:
1704 (*targetm.asm_out.function_end_prologue) (file);
1705 profile_after_prologue (file);
1706
1707 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1708 {
1709 *seen |= SEEN_EMITTED;
1710 last_filename = NULL;
1711 }
1712 else
1713 *seen |= SEEN_NOTE;
1714
1715 break;
1716
1717 case NOTE_INSN_EPILOGUE_BEG:
1718 (*targetm.asm_out.function_begin_epilogue) (file);
1719 break;
1720
1721 case NOTE_INSN_FUNCTION_BEG:
1722 app_disable ();
1723 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1724
1725 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1726 {
1727 *seen |= SEEN_EMITTED;
1728 last_filename = NULL;
1729 }
1730 else
1731 *seen |= SEEN_NOTE;
1732
1733 break;
1734
1735 case NOTE_INSN_BLOCK_BEG:
1736 if (debug_info_level == DINFO_LEVEL_NORMAL
1737 || debug_info_level == DINFO_LEVEL_VERBOSE
1738 || write_symbols == DWARF_DEBUG
1739 || write_symbols == DWARF2_DEBUG
1740 || write_symbols == VMS_AND_DWARF2_DEBUG
--- 42 unchanged lines hidden (view full) ---
1783 break;
1784
1785 case 0:
1786 break;
1787
1788 default:
1789 if (NOTE_LINE_NUMBER (insn) <= 0)
1790 abort ();
1791 break;
1792 }
1793 break;
1794
1795 case BARRIER:
1796#if defined (DWARF2_UNWIND_INFO)
1797 if (dwarf2out_do_frame ())
1798 dwarf2out_frame_debug (insn);
--- 47 unchanged lines hidden (view full) ---
1846 {
1847 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1848 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1849 }
1850 }
1851#endif
1852 if (prescan > 0)
1853 break;
1854
1855 if (LABEL_NAME (insn))
1856 (*debug_hooks->label) (insn);
1857
1858 if (app_on)
1859 {
1860 fputs (ASM_APP_OFF, file);
1861 app_on = 0;
1862 }
--- 29 unchanged lines hidden (view full) ---
1892 }
1893 else
1894 function_section (current_function_decl);
1895
1896#ifdef ASM_OUTPUT_CASE_LABEL
1897 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1898 NEXT_INSN (insn));
1899#else
1900 (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn));
1901#endif
1902#endif
1903 break;
1904 }
1905 }
1906 if (LABEL_ALT_ENTRY_P (insn))
1907 output_alternate_entry_point (file, insn);
1908 else
1909 (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn));
1910 break;
1911
1912 default:
1913 {
1914 rtx body = PATTERN (insn);
1915 int insn_code_number;
1916 const char *template;
1917 rtx note;
1918
1919 /* An INSN, JUMP_INSN or CALL_INSN.
1920 First check for special kinds that recog doesn't recognize. */
1921
1922 if (GET_CODE (body) == USE /* These are just declarations. */
1923 || GET_CODE (body) == CLOBBER)
1924 break;
1925
1926#ifdef HAVE_cc0
1927 /* If there is a REG_CC_SETTER note on this insn, it means that
1928 the setting of the condition code was done in the delay slot
1929 of the insn that branched here. So recover the cc status
1930 from the insn that set it. */
--- 73 unchanged lines hidden (view full) ---
2004 insn);
2005#endif
2006#endif
2007
2008 function_section (current_function_decl);
2009
2010 break;
2011 }
2012 /* Output this line note if it is the first or the last line
2013 note in a row. */
2014 if (notice_source_line (insn))
2015 {
2016 (*debug_hooks->source_line) (last_linenum, last_filename);
2017 }
2018
2019 if (GET_CODE (body) == ASM_INPUT)
2020 {
2021 const char *string = XSTR (body, 0);
2022
2023 /* There's no telling what that did to the condition codes. */
2024 CC_STATUS_INIT;
2025 if (prescan > 0)
--- 10 unchanged lines hidden (view full) ---
2036 }
2037 break;
2038 }
2039
2040 /* Detect `asm' construct with operands. */
2041 if (asm_noperands (body) >= 0)
2042 {
2043 unsigned int noperands = asm_noperands (body);
2044 rtx *ops = alloca (noperands * sizeof (rtx));
2045 const char *string;
2046
2047 /* There's no telling what that did to the condition codes. */
2048 CC_STATUS_INIT;
2049 if (prescan > 0)
2050 break;
2051
2052 /* Get out the operand values. */
2053 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2054 /* Inhibit aborts on what would otherwise be compiler bugs. */
2055 insn_noperands = noperands;
2056 this_is_asm_operands = insn;
2057
2058#ifdef FINAL_PRESCAN_INSN
2059 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2060#endif
2061
2062 /* Output the insn using them. */
2063 if (string[0])
2064 {
2065 if (! app_on)
2066 {
2067 fputs (ASM_APP_ON, file);
2068 app_on = 1;
2069 }
--- 15 unchanged lines hidden (view full) ---
2085 /* A delayed-branch sequence */
2086 int i;
2087 rtx next;
2088
2089 if (prescan > 0)
2090 break;
2091 final_sequence = body;
2092
2093 /* Record the delay slots' frame information before the branch.
2094 This is needed for delayed calls: see execute_cfa_program(). */
2095#if defined (DWARF2_UNWIND_INFO)
2096 if (dwarf2out_do_frame ())
2097 for (i = 1; i < XVECLEN (body, 0); i++)
2098 dwarf2out_frame_debug (XVECEXP (body, 0, i));
2099#endif
2100
2101 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2102 force the restoration of a comparison that was previously
2103 thought unnecessary. If that happens, cancel this sequence
2104 and cause that insn to be restored. */
2105
2106 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1, seen);
2107 if (next != XVECEXP (body, 0, 1))
2108 {
2109 final_sequence = 0;
2110 return next;
2111 }
2112
2113 for (i = 1; i < XVECLEN (body, 0); i++)
2114 {
2115 rtx insn = XVECEXP (body, 0, i);
2116 rtx next = NEXT_INSN (insn);
2117 /* We loop in case any instruction in a delay slot gets
2118 split. */
2119 do
2120 insn = final_scan_insn (insn, file, 0, prescan, 1, seen);
2121 while (insn != next);
2122 }
2123#ifdef DBR_OUTPUT_SEQEND
2124 DBR_OUTPUT_SEQEND (file);
2125#endif
2126 final_sequence = 0;
2127
2128 /* If the insn requiring the delay slot was a CALL_INSN, the
--- 20 unchanged lines hidden (view full) ---
2149 This is done only when optimizing; if not optimizing,
2150 it should be possible for the user to alter a variable
2151 with the debugger in between statements
2152 and the next statement should reexamine the variable
2153 to compute the condition codes. */
2154
2155 if (optimize)
2156 {
2157 if (set
2158 && GET_CODE (SET_DEST (set)) == CC0
2159 && insn != last_ignored_compare)
2160 {
2161 if (GET_CODE (SET_SRC (set)) == SUBREG)
2162 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2163 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2164 {
--- 151 unchanged lines hidden (view full) ---
2316 /* When peepholing, if there were notes within the peephole,
2317 emit them before the peephole. */
2318 if (next != 0 && next != NEXT_INSN (insn))
2319 {
2320 rtx prev = PREV_INSN (insn);
2321
2322 for (note = NEXT_INSN (insn); note != next;
2323 note = NEXT_INSN (note))
2324 final_scan_insn (note, file, optimize, prescan, nopeepholes, seen);
2325
2326 /* In case this is prescan, put the notes
2327 in proper position for later rescan. */
2328 note = NEXT_INSN (insn);
2329 PREV_INSN (note) = prev;
2330 NEXT_INSN (prev) = note;
2331 NEXT_INSN (PREV_INSN (next)) = insn;
2332 PREV_INSN (insn) = PREV_INSN (next);
--- 64 unchanged lines hidden (view full) ---
2397 which follows a deleted test insn, and that test insn
2398 needs to be reinserted. */
2399 if (template == 0)
2400 {
2401 rtx prev;
2402
2403 if (prev_nonnote_insn (insn) != last_ignored_compare)
2404 abort ();
2405
2406 /* We have already processed the notes between the setter and
2407 the user. Make sure we don't process them again, this is
2408 particularly important if one of the notes is a block
2409 scope note or an EH note. */
2410 for (prev = insn;
2411 prev != last_ignored_compare;
2412 prev = PREV_INSN (prev))
--- 17 unchanged lines hidden (view full) ---
2430
2431#ifdef HAVE_ATTR_length
2432 /* This instruction should have been split in shorten_branches,
2433 to ensure that we would have valid length info for the
2434 splitees. */
2435 abort ();
2436#endif
2437
2438 return new;
2439 }
2440
2441 if (prescan > 0)
2442 break;
2443
2444#ifdef IA64_UNWIND_INFO
2445 IA64_UNWIND_EMIT (asm_out_file, insn);
2446#endif
2447 /* Output assembler code from the template. */
2448
2449 output_asm_insn (template, recog_data.operand);
2450
2451 /* If necessary, report the effect that the instruction has on
2452 the unwind info. We've already done this for delay slots
2453 and call instructions. */
2454#if defined (DWARF2_UNWIND_INFO)
2455 if (GET_CODE (insn) == INSN
2456#if !defined (HAVE_prologue)
2457 && !ACCUMULATE_OUTGOING_ARGS
2458#endif
2459 && final_sequence == 0
2460 && dwarf2out_do_frame ())
2461 dwarf2out_frame_debug (insn);
2462#endif
2463
2464#if 0
2465 /* It's not at all clear why we did this and doing so used to
2466 interfere with tests that used REG_WAS_0 notes, which are
2467 now gone, so let's try with this out. */
2468
2469 /* Mark this insn as having been output. */
2470 INSN_DELETED_P (insn) = 1;
2471#endif
2472
2473 /* Emit information for vtable gc. */
2474 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2475
2476 current_output_insn = debug_insn = 0;
2477 }
2478 }
2479 return NEXT_INSN (insn);
2480}
2481
2482/* Output debugging info to the assembler file FILE
2483 based on the NOTE-insn INSN, assumed to be a line number. */
2484
2485static bool
2486notice_source_line (rtx insn)
2487{
2488 const char *filename = insn_file (insn);
2489 int linenum = insn_line (insn);
2490
2491 if (filename && (filename != last_filename || last_linenum != linenum))
2492 {
2493 last_filename = filename;
2494 last_linenum = linenum;
2495 high_block_linenum = MAX (last_linenum, high_block_linenum);
2496 high_function_linenum = MAX (last_linenum, high_function_linenum);
2497 return true;
2498 }
2499 return false;
2500}
2501
2502/* For each operand in INSN, simplify (subreg (reg)) so that it refers
2503 directly to the desired hard register. */
2504
2505void
2506cleanup_subreg_operands (rtx insn)
2507{
2508 int i;
2509 extract_insn_cached (insn);
2510 for (i = 0; i < recog_data.n_operands; i++)
2511 {
2512 /* The following test cannot use recog_data.operand when testing
2513 for a SUBREG: the underlying object might have been changed
2514 already if we are inside a match_operator expression that
2515 matches the else clause. Instead we test the underlying
2516 expression directly. */
2517 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2518 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2519 else if (GET_CODE (recog_data.operand[i]) == PLUS
2520 || GET_CODE (recog_data.operand[i]) == MULT
--- 11 unchanged lines hidden (view full) ---
2532 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2533 }
2534}
2535
2536/* If X is a SUBREG, replace it with a REG or a MEM,
2537 based on the thing it is a subreg of. */
2538
2539rtx
2540alter_subreg (rtx *xp)
2541{
2542 rtx x = *xp;
2543 rtx y = SUBREG_REG (x);
2544
2545 /* simplify_subreg does not remove subreg from volatile references.
2546 We are required to. */
2547 if (GET_CODE (y) == MEM)
2548 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2549 else
2550 {
2551 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2552 SUBREG_BYTE (x));
2553
2554 if (new != 0)
2555 *xp = new;
2556 /* Simplify_subreg can't handle some REG cases, but we have to. */
2557 else if (GET_CODE (y) == REG)
2558 {
2559 unsigned int regno = subreg_hard_regno (x, 1);
2560 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2561 }
2562 else
2563 abort ();
2564 }
2565
2566 return *xp;
2567}
2568
2569/* Do alter_subreg on all the SUBREGs contained in X. */
2570
2571static rtx
2572walk_alter_subreg (rtx *xp)
2573{
2574 rtx x = *xp;
2575 switch (GET_CODE (x))
2576 {
2577 case PLUS:
2578 case MULT:
2579 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2580 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
--- 20 unchanged lines hidden (view full) ---
2601 Not all of the bits there can be handled at this level in all cases.
2602
2603 The value is normally 0.
2604 1 means that the condition has become always true.
2605 -1 means that the condition has become always false.
2606 2 means that COND has been altered. */
2607
2608static int
2609alter_cond (rtx cond)
2610{
2611 int value = 0;
2612
2613 if (cc_status.flags & CC_REVERSED)
2614 {
2615 value = 2;
2616 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2617 }
--- 136 unchanged lines hidden (view full) ---
2754 return value;
2755}
2756#endif
2757
2758/* Report inconsistency between the assembler template and the operands.
2759 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2760
2761void
2762output_operand_lossage (const char *msgid, ...)
2763{
2764 char *fmt_string;
2765 char *new_message;
2766 const char *pfx_str;
2767 va_list ap;
2768
2769 va_start (ap, msgid);
2770
2771 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
2772 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
2773 vasprintf (&new_message, fmt_string, ap);
2774
2775 if (this_is_asm_operands)
2776 error_for_asm (this_is_asm_operands, "%s", new_message);
2777 else
2778 internal_error ("%s", new_message);
2779
2780 free (fmt_string);
2781 free (new_message);
2782 va_end (ap);
2783}
2784
2785/* Output of assembler code from a template, and its subroutines. */
2786
2787/* Annotate the assembly with a comment describing the pattern and
2788 alternative used. */
2789
2790static void
2791output_asm_name (void)
2792{
2793 if (debug_insn)
2794 {
2795 int num = INSN_CODE (debug_insn);
2796 fprintf (asm_out_file, "\t%s %d\t%s",
2797 ASM_COMMENT_START, INSN_UID (debug_insn),
2798 insn_data[num].name);
2799 if (insn_data[num].n_alternatives > 1)
--- 8 unchanged lines hidden (view full) ---
2808 }
2809}
2810
2811/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2812 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2813 corresponds to the address of the object and 0 if to the object. */
2814
2815static tree
2816get_mem_expr_from_op (rtx op, int *paddressp)
2817{
2818 tree expr;
2819 int inner_addressp;
2820
2821 *paddressp = 0;
2822
2823 if (GET_CODE (op) == REG)
2824 return REG_EXPR (op);
2825 else if (GET_CODE (op) != MEM)
2826 return 0;
2827
2828 if (MEM_EXPR (op) != 0)
2829 return MEM_EXPR (op);
2830
2831 /* Otherwise we have an address, so indicate it and look at the address. */
2832 *paddressp = 1;
--- 16 unchanged lines hidden (view full) ---
2849 return inner_addressp ? 0 : expr;
2850}
2851
2852/* Output operand names for assembler instructions. OPERANDS is the
2853 operand vector, OPORDER is the order to write the operands, and NOPS
2854 is the number of operands to write. */
2855
2856static void
2857output_asm_operand_names (rtx *operands, int *oporder, int nops)
2858{
2859 int wrote = 0;
2860 int i;
2861
2862 for (i = 0; i < nops; i++)
2863 {
2864 int addressp;
2865 rtx op = operands[oporder[i]];
2866 tree expr = get_mem_expr_from_op (op, &addressp);
2867
2868 fprintf (asm_out_file, "%c%s",
2869 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2870 wrote = 1;
2871 if (expr)
2872 {
2873 fprintf (asm_out_file, "%s",
2874 addressp ? "*" : "");
2875 print_mem_expr (asm_out_file, expr);
2876 wrote = 1;
2877 }
2878 else if (REG_P (op) && ORIGINAL_REGNO (op)
2879 && ORIGINAL_REGNO (op) != REGNO (op))
2880 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2881 }
2882}
2883
2884/* Output text from TEMPLATE to the assembler output file,
2885 obeying %-directions to substitute operands taken from
2886 the vector OPERANDS.
2887
2888 %N (for N a digit) means print operand N in usual manner.
--- 4 unchanged lines hidden (view full) ---
2893 %aN means expect operand N to be a memory address
2894 (not a memory reference!) and print a reference
2895 to that address.
2896 %nN means expect operand N to be a constant
2897 and print a constant expression for minus the value
2898 of the operand, with no other punctuation. */
2899
2900void
2901output_asm_insn (const char *template, rtx *operands)
2902{
2903 const char *p;
2904 int c;
2905#ifdef ASSEMBLER_DIALECT
2906 int dialect = 0;
2907#endif
2908 int oporder[MAX_RECOG_OPERANDS];
2909 char opoutput[MAX_RECOG_OPERANDS];
--- 189 unchanged lines hidden (view full) ---
3099 output_asm_name ();
3100
3101 putc ('\n', asm_out_file);
3102}
3103
3104/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3105
3106void
3107output_asm_label (rtx x)
3108{
3109 char buf[256];
3110
3111 if (GET_CODE (x) == LABEL_REF)
3112 x = XEXP (x, 0);
3113 if (GET_CODE (x) == CODE_LABEL
3114 || (GET_CODE (x) == NOTE
3115 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
--- 10 unchanged lines hidden (view full) ---
3126 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3127 between the % and the digits.
3128 When CODE is a non-letter, X is 0.
3129
3130 The meanings of the letters are machine-dependent and controlled
3131 by PRINT_OPERAND. */
3132
3133static void
3134output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3135{
3136 if (x && GET_CODE (x) == SUBREG)
3137 x = alter_subreg (&x);
3138
3139 /* If X is a pseudo-register, abort now rather than writing trash to the
3140 assembler file. */
3141
3142 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3143 abort ();
3144
3145 PRINT_OPERAND (asm_out_file, x, code);
3146}
3147
3148/* Print a memory reference operand for address X
3149 using machine-dependent assembler syntax.
3150 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3151
3152void
3153output_address (rtx x)
3154{
3155 walk_alter_subreg (&x);
3156 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3157}
3158
3159/* Print an integer constant expression in assembler syntax.
3160 Addition and subtraction are the only arithmetic
3161 that may appear in these expressions. */
3162
3163void
3164output_addr_const (FILE *file, rtx x)
3165{
3166 char buf[256];
3167
3168 restart:
3169 switch (GET_CODE (x))
3170 {
3171 case PC:
3172 putc ('.', file);
--- 105 unchanged lines hidden (view full) ---
3278}
3279
3280/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3281 %R prints the value of REGISTER_PREFIX.
3282 %L prints the value of LOCAL_LABEL_PREFIX.
3283 %U prints the value of USER_LABEL_PREFIX.
3284 %I prints the value of IMMEDIATE_PREFIX.
3285 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3286 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3287
3288 We handle alternate assembler dialects here, just like output_asm_insn. */
3289
3290void
3291asm_fprintf (FILE *file, const char *p, ...)
3292{
3293 char buf[10];
3294 char *q, c;
3295 va_list argptr;
3296
3297 va_start (argptr, p);
3298
3299 buf[0] = '%';
3300
3301 while ((c = *p++))
3302 switch (c)
3303 {
3304#ifdef ASSEMBLER_DIALECT
3305 case '{':
--- 21 unchanged lines hidden (view full) ---
3327
3328 case '}':
3329 break;
3330#endif
3331
3332 case '%':
3333 c = *p++;
3334 q = &buf[1];
3335 while (strchr ("-+ #0", c))
3336 {
3337 *q++ = c;
3338 c = *p++;
3339 }
3340 while (ISDIGIT (c) || c == '.')
3341 {
3342 *q++ = c;
3343 c = *p++;
3344 }
3345 switch (c)
3346 {
3347 case '%':
3348 putc ('%', file);
3349 break;
3350
3351 case 'd': case 'i': case 'u':
3352 case 'x': case 'X': case 'o':
3353 case 'c':
3354 *q++ = c;
3355 *q = 0;
3356 fprintf (file, buf, va_arg (argptr, int));
3357 break;
3358
3359 case 'w':
3360 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3361 'o' cases, but we do not check for those cases. It
3362 means that the value is a HOST_WIDE_INT, which may be
3363 either `long' or `long long'. */
3364 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3365 q += strlen (HOST_WIDE_INT_PRINT);
3366 *q++ = *p++;
3367 *q = 0;
3368 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3369 break;
3370
3371 case 'l':
3372 *q++ = c;
3373#ifdef HAVE_LONG_LONG
3374 if (*p == 'l')
3375 {
3376 *q++ = *p++;
3377 *q++ = *p++;
3378 *q = 0;
3379 fprintf (file, buf, va_arg (argptr, long long));
3380 }
3381 else
3382#endif
3383 {
3384 *q++ = *p++;
3385 *q = 0;
3386 fprintf (file, buf, va_arg (argptr, long));
3387 }
3388
3389 break;
3390
3391 case 's':
3392 *q++ = c;
3393 *q = 0;
3394 fprintf (file, buf, va_arg (argptr, char *));
3395 break;
3396
--- 21 unchanged lines hidden (view full) ---
3418#endif
3419 break;
3420
3421 case 'U':
3422 fputs (user_label_prefix, file);
3423 break;
3424
3425#ifdef ASM_FPRINTF_EXTENSIONS
3426 /* Uppercase letters are reserved for general use by asm_fprintf
3427 and so are not available to target specific code. In order to
3428 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3429 they are defined here. As they get turned into real extensions
3430 to asm_fprintf they should be removed from this list. */
3431 case 'A': case 'B': case 'C': case 'D': case 'E':
3432 case 'F': case 'G': case 'H': case 'J': case 'K':
3433 case 'M': case 'N': case 'P': case 'Q': case 'S':
3434 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3435 break;
3436
3437 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3438#endif
3439 default:
3440 abort ();
3441 }
3442 break;
3443
3444 default:
3445 putc (c, file);
3446 }
3447 va_end (argptr);
3448}
3449
3450/* Split up a CONST_DOUBLE or integer constant rtx
3451 into two rtx's for single words,
3452 storing in *FIRST the word that comes first in memory in the target
3453 and in *SECOND the other. */
3454
3455void
3456split_double (rtx value, rtx *first, rtx *second)
3457{
3458 if (GET_CODE (value) == CONST_INT)
3459 {
3460 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3461 {
3462 /* In this case the CONST_INT holds both target words.
3463 Extract the bits from it into two word-sized pieces.
3464 Sign extend each half to HOST_WIDE_INT. */
--- 122 unchanged lines hidden (view full) ---
3587 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3588 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3589 }
3590}
3591
3592/* Return nonzero if this function has no function calls. */
3593
3594int
3595leaf_function_p (void)
3596{
3597 rtx insn;
3598 rtx link;
3599
3600 if (current_function_profile || profile_arc_flag)
3601 return 0;
3602
3603 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
--- 26 unchanged lines hidden (view full) ---
3630 return 1;
3631}
3632
3633/* Return 1 if branch is a forward branch.
3634 Uses insn_shuid array, so it works only in the final pass. May be used by
3635 output templates to customary add branch prediction hints.
3636 */
3637int
3638final_forward_branch_p (rtx insn)
3639{
3640 int insn_id, label_id;
3641 if (!uid_shuid)
3642 abort ();
3643 insn_id = INSN_SHUID (insn);
3644 label_id = INSN_SHUID (JUMP_LABEL (insn));
3645 /* We've hit some insns that does not have id information available. */
3646 if (!insn_id || !label_id)
--- 11 unchanged lines hidden (view full) ---
3658 uses the "output" registers instead. */
3659
3660#ifdef LEAF_REGISTERS
3661
3662/* Return 1 if this function uses only the registers that can be
3663 safely renumbered. */
3664
3665int
3666only_leaf_regs_used (void)
3667{
3668 int i;
3669 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3670
3671 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3672 if ((regs_ever_live[i] || global_regs[i])
3673 && ! permitted_reg_in_leaf_functions[i])
3674 return 0;
3675
3676 if (current_function_uses_pic_offset_table
3677 && pic_offset_table_rtx != 0
3678 && GET_CODE (pic_offset_table_rtx) == REG
3679 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3680 return 0;
3681
3682 return 1;
3683}
3684
3685/* Scan all instructions and renumber all registers into those
3686 available in leaf functions. */
3687
3688static void
3689leaf_renumber_regs (rtx first)
3690{
3691 rtx insn;
3692
3693 /* Renumber only the actual patterns.
3694 The reg-notes can contain frame pointer refs,
3695 and renumbering them could crash, and should not be needed. */
3696 for (insn = first; insn; insn = NEXT_INSN (insn))
3697 if (INSN_P (insn))
--- 4 unchanged lines hidden (view full) ---
3702 if (INSN_P (XEXP (insn, 0)))
3703 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3704}
3705
3706/* Scan IN_RTX and its subexpressions, and renumber all regs into those
3707 available in leaf functions. */
3708
3709void
3710leaf_renumber_regs_insn (rtx in_rtx)
3711{
3712 int i, j;
3713 const char *format_ptr;
3714
3715 if (in_rtx == 0)
3716 return;
3717
3718 /* Renumber all input-registers into output-registers.
--- 60 unchanged lines hidden (view full) ---
3779 case 'u':
3780 break;
3781
3782 default:
3783 abort ();
3784 }
3785}
3786#endif
3787
3788
3789/* When -gused is used, emit debug info for only used symbols. But in
3790 addition to the standard intercepted debug_hooks there are some direct
3791 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3792 Those routines may also be called from a higher level intercepted routine. So
3793 to prevent recording data for an inner call to one of these for an intercept,
3794 we maintain an intercept nesting counter (debug_nesting). We only save the
3795 intercepted arguments if the nesting is 1. */
3796int debug_nesting = 0;
3797
3798static tree *symbol_queue;
3799int symbol_queue_index = 0;
3800static int symbol_queue_size = 0;
3801
3802/* Generate the symbols for any queued up type symbols we encountered
3803 while generating the type info for some originally used symbol.
3804 This might generate additional entries in the queue. Only when
3805 the nesting depth goes to 0 is this routine called. */
3806
3807void
3808debug_flush_symbol_queue (void)
3809{
3810 int i;
3811
3812 /* Make sure that additionally queued items are not flushed
3813 prematurely. */
3814
3815 ++debug_nesting;
3816
3817 for (i = 0; i < symbol_queue_index; ++i)
3818 {
3819 /* If we pushed queued symbols then such symbols are must be
3820 output no matter what anyone else says. Specifically,
3821 we need to make sure dbxout_symbol() thinks the symbol was
3822 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3823 which may be set for outside reasons. */
3824 int saved_tree_used = TREE_USED (symbol_queue[i]);
3825 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3826 TREE_USED (symbol_queue[i]) = 1;
3827 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3828
3829#ifdef DBX_DEBUGGING_INFO
3830 dbxout_symbol (symbol_queue[i], 0);
3831#endif
3832
3833 TREE_USED (symbol_queue[i]) = saved_tree_used;
3834 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3835 }
3836
3837 symbol_queue_index = 0;
3838 --debug_nesting;
3839}
3840
3841/* Queue a type symbol needed as part of the definition of a decl
3842 symbol. These symbols are generated when debug_flush_symbol_queue()
3843 is called. */
3844
3845void
3846debug_queue_symbol (tree decl)
3847{
3848 if (symbol_queue_index >= symbol_queue_size)
3849 {
3850 symbol_queue_size += 10;
3851 symbol_queue = xrealloc (symbol_queue,
3852 symbol_queue_size * sizeof (tree));
3853 }
3854
3855 symbol_queue[symbol_queue_index++] = decl;
3856}
3857
3858/* Free symbol queue. */
3859void
3860debug_free_queue (void)
3861{
3862 if (symbol_queue)
3863 {
3864 free (symbol_queue);
3865 symbol_queue = NULL;
3866 symbol_queue_size = 0;
3867 }
3868}
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
--- 29 unchanged lines hidden (view full) ---
41 (the one that tests the condition codes) to be modified.
42
43 The code for the function prologue and epilogue are generated
44 directly in assembler by the target functions function_prologue and
45 function_epilogue. Those instructions never exist as rtl. */
46
47#include "config.h"
48#include "system.h"
49#include "coretypes.h"
50#include "tm.h"
51
52#include "tree.h"
53#include "rtl.h"
54#include "tm_p.h"
55#include "regs.h"
56#include "insn-config.h"
57#include "insn-attr.h"
58#include "recog.h"
--- 6 unchanged lines hidden (view full) ---
65#include "function.h"
66#include "toplev.h"
67#include "reload.h"
68#include "intl.h"
69#include "basic-block.h"
70#include "target.h"
71#include "debug.h"
72#include "expr.h"
73#include "cfglayout.h"
74
75#ifdef XCOFF_DEBUGGING_INFO
76#include "xcoffout.h" /* Needed for external data
77 declarations for e.g. AIX 4.x. */
78#endif
79
80#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
81#include "dwarf2out.h"
82#endif
83
84#ifdef DBX_DEBUGGING_INFO
85#include "dbxout.h"
86#endif
87
88/* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
89 null default for it to save conditionalization later. */
90#ifndef CC_STATUS_INIT
91#define CC_STATUS_INIT
92#endif
93
94/* How to start an assembler comment. */
95#ifndef ASM_COMMENT_START
--- 10 unchanged lines hidden (view full) ---
106#endif
107
108#if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
109#define HAVE_READONLY_DATA_SECTION 1
110#else
111#define HAVE_READONLY_DATA_SECTION 0
112#endif
113
114/* Bitflags used by final_scan_insn. */
115#define SEEN_BB 1
116#define SEEN_NOTE 2
117#define SEEN_EMITTED 4
118
119/* Last insn processed by final_scan_insn. */
120static rtx debug_insn;
121rtx current_output_insn;
122
123/* Line number of last NOTE. */
124static int last_linenum;
125
126/* Highest line number in current block. */
--- 14 unchanged lines hidden (view full) ---
141
142/* Number of operands of this insn, for an `asm' with operands. */
143static unsigned int insn_noperands;
144
145/* Compare optimization flag. */
146
147static rtx last_ignored_compare = 0;
148
149/* Assign a unique number to each insn that is output.
150 This can be used to generate unique local labels. */
151
152static int insn_counter = 0;
153
154#ifdef HAVE_cc0
155/* This variable contains machine-dependent flags (defined in tm.h)
156 set and examined by output routines
--- 13 unchanged lines hidden (view full) ---
170 In life_analysis, or in stupid_life_analysis, this is set
171 up to record the hard regs used explicitly. Reload adds
172 in the hard regs used for holding pseudo regs. Final uses
173 it to generate the code in the function prologue and epilogue
174 to save and restore registers as needed. */
175
176char regs_ever_live[FIRST_PSEUDO_REGISTER];
177
178/* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
179 Unlike regs_ever_live, elements of this array corresponding to
180 eliminable regs like the frame pointer are set if an asm sets them. */
181
182char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
183
184/* Nonzero means current function must be given a frame pointer.
185 Initialized in function.c to 0. Set only in reload1.c as per
186 the needs of the function. */
187
188int frame_pointer_needed;
189
190/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
191
192static int block_depth;
193
194/* Nonzero if have enabled APP processing of our assembler output. */
--- 6 unchanged lines hidden (view full) ---
201rtx final_sequence;
202
203#ifdef ASSEMBLER_DIALECT
204
205/* Number of the assembler dialect to use, starting at 0. */
206static int dialect_number;
207#endif
208
209#ifdef HAVE_conditional_execution
210/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
211rtx current_insn_predicate;
212#endif
213
214#ifdef HAVE_ATTR_length
215static int asm_insn_count (rtx);
216#endif
217static void profile_function (FILE *);
218static void profile_after_prologue (FILE *);
219static bool notice_source_line (rtx);
220static rtx walk_alter_subreg (rtx *);
221static void output_asm_name (void);
222static void output_alternate_entry_point (FILE *, rtx);
223static tree get_mem_expr_from_op (rtx, int *);
224static void output_asm_operand_names (rtx *, int *, int);
225static void output_operand (rtx, int);
226#ifdef LEAF_REGISTERS
227static void leaf_renumber_regs (rtx);
228#endif
229#ifdef HAVE_cc0
230static int alter_cond (rtx);
231#endif
232#ifndef ADDR_VEC_ALIGN
233static int final_addr_vec_align (rtx);
234#endif
235#ifdef HAVE_ATTR_length
236static int align_fuzz (rtx, rtx, int, unsigned);
237#endif
238
239/* Initialize data in final at the beginning of a compilation. */
240
241void
242init_final (const char *filename ATTRIBUTE_UNUSED)
243{
244 app_on = 0;
245 final_sequence = 0;
246
247#ifdef ASSEMBLER_DIALECT
248 dialect_number = ASSEMBLER_DIALECT;
249#endif
250}
251
252/* Default target function prologue and epilogue assembler output.
253
254 If not overridden for epilogue code, then the function body itself
255 contains return instructions wherever needed. */
256void
257default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
258 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
259{
260}
261
262/* Default target hook that outputs nothing to a stream. */
263void
264no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
265{
266}
267
268/* Enable APP processing of subsequent output.
269 Used before the output from an `asm' statement. */
270
271void
272app_enable (void)
273{
274 if (! app_on)
275 {
276 fputs (ASM_APP_ON, asm_out_file);
277 app_on = 1;
278 }
279}
280
281/* Disable APP processing of subsequent output.
282 Called from varasm.c before most kinds of output. */
283
284void
285app_disable (void)
286{
287 if (app_on)
288 {
289 fputs (ASM_APP_OFF, asm_out_file);
290 app_on = 0;
291 }
292}
293
294/* Return the number of slots filled in the current
295 delayed branch sequence (we don't count the insn needing the
296 delay slot). Zero if not in a delayed branch sequence. */
297
298#ifdef DELAY_SLOTS
299int
300dbr_sequence_length (void)
301{
302 if (final_sequence != 0)
303 return XVECLEN (final_sequence, 0) - 1;
304 else
305 return 0;
306}
307#endif
308
--- 36 unchanged lines hidden (view full) ---
345
346static rtx *uid_align;
347static int *uid_shuid;
348static struct label_alignment *label_align;
349
350/* Indicate that branch shortening hasn't yet been done. */
351
352void
353init_insn_lengths (void)
354{
355 if (uid_shuid)
356 {
357 free (uid_shuid);
358 uid_shuid = 0;
359 }
360 if (insn_lengths)
361 {
--- 10 unchanged lines hidden (view full) ---
372 uid_align = 0;
373 }
374}
375
376/* Obtain the current length of an insn. If branch shortening has been done,
377 get its actual length. Otherwise, get its maximum length. */
378
379int
380get_attr_length (rtx insn ATTRIBUTE_UNUSED)
381{
382#ifdef HAVE_ATTR_length
383 rtx body;
384 int i;
385 int length = 0;
386
387 if (insn_lengths_max_uid > INSN_UID (insn))
388 return insn_lengths[INSN_UID (insn)];
--- 117 unchanged lines hidden (view full) ---
506#endif
507
508#ifndef JUMP_ALIGN_MAX_SKIP
509#define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
510#endif
511
512#ifndef ADDR_VEC_ALIGN
513static int
514final_addr_vec_align (rtx addr_vec)
515{
516 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
517
518 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
519 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
520 return exact_log2 (align);
521
522}
--- 13 unchanged lines hidden (view full) ---
536 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
537
538#define LABEL_TO_MAX_SKIP(LABEL) \
539 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
540
541/* For the benefit of port specific code do this also as a function. */
542
543int
544label_to_alignment (rtx label)
545{
546 return LABEL_TO_ALIGNMENT (label);
547}
548
549#ifdef HAVE_ATTR_length
550/* The differences in addresses
551 between a branch and its target might grow or shrink depending on
552 the alignment the start insn of the range (the branch for a forward
--- 18 unchanged lines hidden (view full) ---
571 START and END might grow / shrink due to a different address for start
572 which changes the size of alignment insns between START and END.
573 KNOWN_ALIGN_LOG is the alignment known for START.
574 GROWTH should be ~0 if the objective is to compute potential code size
575 increase, and 0 if the objective is to compute potential shrink.
576 The return value is undefined for any other value of GROWTH. */
577
578static int
579align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
580{
581 int uid = INSN_UID (start);
582 rtx align_label;
583 int known_align = 1 << known_align_log;
584 int end_shuid = INSN_SHUID (end);
585 int fuzz = 0;
586
587 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
--- 22 unchanged lines hidden (view full) ---
610 branch shortening pass, minus a value to account for possible size
611 increase due to alignment. For a backward branch, it is the start
612 address of the branch as known from the current pass, plus a value
613 to account for possible size increase due to alignment.
614 NB.: Therefore, the maximum offset allowed for backward branches needs
615 to exclude the branch size. */
616
617int
618insn_current_reference_address (rtx branch)
619{
620 rtx dest, seq;
621 int seq_uid;
622
623 if (! INSN_ADDRESSES_SET_P ())
624 return 0;
625
626 seq = NEXT_INSN (PREV_INSN (branch));
--- 20 unchanged lines hidden (view full) ---
647 /* Backward branch. */
648 return (insn_current_address
649 + align_fuzz (dest, seq, length_unit_log, ~0));
650 }
651}
652#endif /* HAVE_ATTR_length */
653
654void
655compute_alignments (void)
656{
657 int log, max_skip, max_log;
658 basic_block bb;
659
660 if (label_align)
661 {
662 free (label_align);
663 label_align = 0;
664 }
665
666 max_labelno = max_label_num ();
667 min_labelno = get_first_label_num ();
668 label_align = xcalloc (max_labelno - min_labelno + 1,
669 sizeof (struct label_alignment));
670
671 /* If not optimizing or optimizing for size, don't assign any alignments. */
672 if (! optimize || optimize_size)
673 return;
674
675 FOR_EACH_BB (bb)
676 {
677 rtx label = BB_HEAD (bb);
678 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
679 edge e;
680
681 if (GET_CODE (label) != CODE_LABEL
682 || probably_never_executed_bb_p (bb))
683 continue;
684 max_log = LABEL_ALIGN (label);
685 max_skip = LABEL_ALIGN_MAX_SKIP;
686
687 for (e = bb->pred; e; e = e->pred_next)
688 {
689 if (e->flags & EDGE_FALLTHRU)
690 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
--- 22 unchanged lines hidden (view full) ---
713 {
714 max_log = log;
715 max_skip = JUMP_ALIGN_MAX_SKIP;
716 }
717 }
718 /* In case block is frequent and reached mostly by non-fallthru edge,
719 align it. It is most likely a first block of loop. */
720 if (has_fallthru
721 && maybe_hot_bb_p (bb)
722 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
723 && branch_frequency > fallthru_frequency * 2)
724 {
725 log = LOOP_ALIGN (label);
726 if (max_log < log)
727 {
728 max_log = log;
729 max_skip = LOOP_ALIGN_MAX_SKIP;
730 }
731 }
732 LABEL_TO_ALIGNMENT (label) = max_log;
733 LABEL_TO_MAX_SKIP (label) = max_skip;
734 }
735}
736
737/* Make a pass over all insns and compute their actual lengths by shortening
738 any branches of variable length if possible. */
739
740/* shorten_branches might be called multiple times: for example, the SH
741 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
742 In order to do this, it needs proper length information, which it obtains
743 by calling shorten_branches. This cannot be collapsed with
744 shorten_branches itself into a single pass unless we also want to integrate
745 reorg.c, since the branch splitting exposes new instructions with delay
746 slots. */
747
748void
749shorten_branches (rtx first ATTRIBUTE_UNUSED)
750{
751 rtx insn;
752 int max_uid;
753 int i;
754 int max_log;
755 int max_skip;
756#ifdef HAVE_ATTR_length
757#define MAX_CODE_ALIGN 16
--- 4 unchanged lines hidden (view full) ---
762 int uid;
763 rtx align_tab[MAX_CODE_ALIGN];
764
765#endif
766
767 /* Compute maximum UID and allocate label_align / uid_shuid. */
768 max_uid = get_max_uid ();
769
770 uid_shuid = xmalloc (max_uid * sizeof *uid_shuid);
771
772 if (max_labelno != max_label_num ())
773 {
774 int old = max_labelno;
775 int n_labels;
776 int n_old_labels;
777
778 max_labelno = max_label_num ();
779
780 n_labels = max_labelno - min_labelno + 1;
781 n_old_labels = old - min_labelno + 1;
782
783 label_align = xrealloc (label_align,
784 n_labels * sizeof (struct label_alignment));
785
786 /* Range of labels grows monotonically in the function. Abort here
787 means that the initialization of array got lost. */
788 if (n_old_labels > n_labels)
789 abort ();
790
791 memset (label_align + n_old_labels, 0,
792 (n_labels - n_old_labels) * sizeof (struct label_alignment));
--- 78 unchanged lines hidden (view full) ---
871 }
872 break;
873 }
874 }
875 }
876#ifdef HAVE_ATTR_length
877
878 /* Allocate the rest of the arrays. */
879 insn_lengths = xmalloc (max_uid * sizeof (*insn_lengths));
880 insn_lengths_max_uid = max_uid;
881 /* Syntax errors can lead to labels being outside of the main insn stream.
882 Initialize insn_addresses, so that we get reproducible results. */
883 INSN_ADDRESSES_ALLOC (max_uid);
884
885 varying_length = xcalloc (max_uid, sizeof (char));
886
887 /* Initialize uid_align. We scan instructions
888 from end to start, and keep in align_tab[n] the last seen insn
889 that does an alignment of at least n+1, i.e. the successor
890 in the alignment chain for an insn that does / has a known
891 alignment of n. */
892 uid_align = xcalloc (max_uid, sizeof *uid_align);
893
894 for (i = MAX_CODE_ALIGN; --i >= 0;)
895 align_tab[i] = NULL_RTX;
896 seq = get_last_insn ();
897 for (; seq; seq = PREV_INSN (seq))
898 {
899 int uid = INSN_UID (seq);
900 int log;
--- 60 unchanged lines hidden (view full) ---
961 flags.min_after_base = min > rel;
962 flags.max_after_base = max > rel;
963 ADDR_DIFF_VEC_FLAGS (pat) = flags;
964 }
965 }
966#endif /* CASE_VECTOR_SHORTEN_MODE */
967
968 /* Compute initial lengths, addresses, and varying flags for each insn. */
969 for (insn_current_address = 0, insn = first;
970 insn != 0;
971 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
972 {
973 uid = INSN_UID (insn);
974
975 insn_lengths[uid] = 0;
976
977 if (GET_CODE (insn) == CODE_LABEL)
--- 84 unchanged lines hidden (view full) ---
1062 /* Now loop over all the insns finding varying length insns. For each,
1063 get the current insn length. If it has changed, reflect the change.
1064 When nothing changes for a full pass, we are done. */
1065
1066 while (something_changed)
1067 {
1068 something_changed = 0;
1069 insn_current_align = MAX_CODE_ALIGN - 1;
1070 for (insn_current_address = 0, insn = first;
1071 insn != 0;
1072 insn = NEXT_INSN (insn))
1073 {
1074 int new_length;
1075#ifdef ADJUST_INSN_LENGTH
1076 int tmp_length;
1077#endif
1078 int length_align;
--- 217 unchanged lines hidden (view full) ---
1296}
1297
1298#ifdef HAVE_ATTR_length
1299/* Given the body of an INSN known to be generated by an ASM statement, return
1300 the number of machine instructions likely to be generated for this insn.
1301 This is used to compute its length. */
1302
1303static int
1304asm_insn_count (rtx body)
1305{
1306 const char *template;
1307 int count = 1;
1308
1309 if (GET_CODE (body) == ASM_INPUT)
1310 template = XSTR (body, 0);
1311 else
1312 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
--- 12 unchanged lines hidden (view full) ---
1325 assembler pseudo-ops have already been output in `assemble_start_function'.
1326
1327 FIRST is the first insn of the rtl for the function being compiled.
1328 FILE is the file to write assembler code to.
1329 OPTIMIZE is nonzero if we should eliminate redundant
1330 test and compare insns. */
1331
1332void
1333final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1334 int optimize ATTRIBUTE_UNUSED)
1335{
1336 block_depth = 0;
1337
1338 this_is_asm_operands = 0;
1339
1340 last_filename = locator_file (prologue_locator);
1341 last_linenum = locator_line (prologue_locator);
1342
1343 high_block_linenum = high_function_linenum = last_linenum;
1344
1345 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1346
1347#if defined (DWARF2_UNWIND_INFO) || defined (IA64_UNWIND_INFO)
1348 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1349 dwarf2out_begin_prologue (0, NULL);
1350#endif
--- 15 unchanged lines hidden (view full) ---
1366 dwarf2out_frame_debug (NULL_RTX);
1367#endif
1368
1369 /* If debugging, assign block numbers to all of the blocks in this
1370 function. */
1371 if (write_symbols)
1372 {
1373 remove_unnecessary_notes ();
1374 reemit_insn_block_notes ();
1375 number_blocks (current_function_decl);
1376 /* We never actually put out begin/end notes for the top-level
1377 block in the function. But, conceptually, that block is
1378 always needed. */
1379 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1380 }
1381
1382 /* First output the function prologue: code to set up the stack frame. */
1383 (*targetm.asm_out.function_prologue) (file, get_frame_size ());
1384
1385 /* If the machine represents the prologue as RTL, the profiling code must
1386 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1387#ifdef HAVE_prologue
1388 if (! HAVE_prologue)
1389#endif
1390 profile_after_prologue (file);
1391}
1392
1393static void
1394profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1395{
1396#ifndef PROFILE_BEFORE_PROLOGUE
1397 if (current_function_profile)
1398 profile_function (file);
1399#endif /* not PROFILE_BEFORE_PROLOGUE */
1400}
1401
1402static void
1403profile_function (FILE *file ATTRIBUTE_UNUSED)
1404{
1405#ifndef NO_PROFILE_COUNTERS
1406# define NO_PROFILE_COUNTERS 0
1407#endif
1408#if defined(ASM_OUTPUT_REG_PUSH)
1409 int sval = current_function_returns_struct;
1410 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1411#if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1412 int cxt = current_function_needs_context;
1413#endif
1414#endif /* ASM_OUTPUT_REG_PUSH */
1415
1416 if (! NO_PROFILE_COUNTERS)
1417 {
1418 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1419 data_section ();
1420 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1421 (*targetm.asm_out.internal_label) (file, "LP", current_function_funcdef_no);
1422 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1423 }
1424
1425 function_section (current_function_decl);
1426
1427#if defined(ASM_OUTPUT_REG_PUSH)
1428 if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG)
1429 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1430#endif
1431
1432#if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1433 if (cxt)
1434 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1435#else
1436#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1437 if (cxt)
1438 {
--- 11 unchanged lines hidden (view full) ---
1450#if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1451 if (cxt)
1452 {
1453 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1454 }
1455#endif
1456#endif
1457
1458#if defined(ASM_OUTPUT_REG_PUSH)
1459 if (sval && svrtx != NULL_RTX && GET_CODE (svrtx) == REG)
1460 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1461#endif
1462}
1463
1464/* Output assembler code for the end of a function.
1465 For clarity, args are same as those of `final_start_function'
1466 even though not all of them are needed. */
1467
1468void
1469final_end_function (void)
1470{
1471 app_disable ();
1472
1473 (*debug_hooks->end_function) (high_function_linenum);
1474
1475 /* Finally, output the function epilogue:
1476 code to restore the stack frame and return to the caller. */
1477 (*targetm.asm_out.function_epilogue) (asm_out_file, get_frame_size ());
--- 15 unchanged lines hidden (view full) ---
1493 just scanning as if we were outputting.
1494 Prescanning deletes and rearranges insns just like ordinary output.
1495 PRESCAN is -2 if we are outputting after having prescanned.
1496 In this case, don't try to delete or rearrange insns
1497 because that has already been done.
1498 Prescanning is done only on certain machines. */
1499
1500void
1501final (rtx first, FILE *file, int optimize, int prescan)
1502{
1503 rtx insn;
1504 int max_uid = 0;
1505 int seen = 0;
1506
1507 last_ignored_compare = 0;
1508
1509#ifdef SDB_DEBUGGING_INFO
1510 /* When producing SDB debugging info, delete troublesome line number
1511 notes from inlined functions in other files as well as duplicate
1512 line number notes. */
1513 if (write_symbols == SDB_DEBUG)
1514 {
1515 rtx last = 0;
1516 for (insn = first; insn; insn = NEXT_INSN (insn))
1517 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0)
1518 {
1519 if ((RTX_INTEGRATED_P (insn)
1520 && strcmp (NOTE_SOURCE_FILE (insn), main_input_filename) != 0)
1521 || (last != 0
1522 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1523 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)))
1524 {
1525 delete_insn (insn); /* Use delete_note. */
1526 continue;
1527 }
1528 last = insn;
1529 }
1530 }
1531#endif
1532
1533 for (insn = first; insn; insn = NEXT_INSN (insn))
1534 {
1535 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1536 max_uid = INSN_UID (insn);
1537#ifdef HAVE_cc0
1538 /* If CC tracking across branches is enabled, record the insn which
1539 jumps to each branch only reached from one place. */
1540 if (optimize && GET_CODE (insn) == JUMP_INSN)
1541 {
1542 rtx lab = JUMP_LABEL (insn);
1543 if (lab && LABEL_NUSES (lab) == 1)
1544 {
--- 19 unchanged lines hidden (view full) ---
1564 insn_current_address = -1;
1565 else
1566 abort ();
1567 }
1568 else
1569 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1570#endif /* HAVE_ATTR_length */
1571
1572 insn = final_scan_insn (insn, file, optimize, prescan, 0, &seen);
1573 }
1574}
1575
1576const char *
1577get_insn_template (int code, rtx insn)
1578{
1579 switch (insn_data[code].output_format)
1580 {
1581 case INSN_OUTPUT_FORMAT_SINGLE:
1582 return insn_data[code].output.single;
1583 case INSN_OUTPUT_FORMAT_MULTI:
1584 return insn_data[code].output.multi[which_alternative];
1585 case INSN_OUTPUT_FORMAT_FUNCTION:
1586 if (insn == NULL)
1587 abort ();
1588 return (*insn_data[code].output.function) (recog_data.operand, insn);
1589
1590 default:
1591 abort ();
1592 }
1593}
1594
1595/* Emit the appropriate declaration for an alternate-entry-point
1596 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1597 LABEL_KIND != LABEL_NORMAL.
1598
1599 The case fall-through in this function is intentional. */
1600static void
1601output_alternate_entry_point (FILE *file, rtx insn)
1602{
1603 const char *name = LABEL_NAME (insn);
1604
1605 switch (LABEL_KIND (insn))
1606 {
1607 case LABEL_WEAK_ENTRY:
1608#ifdef ASM_WEAKEN_LABEL
1609 ASM_WEAKEN_LABEL (file, name);
--- 14 unchanged lines hidden (view full) ---
1624}
1625
1626/* The final scan for one insn, INSN.
1627 Args are same as in `final', except that INSN
1628 is the insn being scanned.
1629 Value returned is the next insn to be scanned.
1630
1631 NOPEEPHOLES is the flag to disallow peephole processing (currently
1632 used for within delayed branch sequence output).
1633
1634 SEEN is used to track the end of the prologue, for emitting
1635 debug information. We force the emission of a line note after
1636 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1637 at the beginning of the second basic block, whichever comes
1638 first. */
1639
1640rtx
1641final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1642 int prescan, int nopeepholes ATTRIBUTE_UNUSED,
1643 int *seen)
1644{
1645#ifdef HAVE_cc0
1646 rtx set;
1647#endif
1648
1649 insn_counter++;
1650
1651 /* Ignore deleted insns. These can occur when we split insns (due to a
--- 22 unchanged lines hidden (view full) ---
1674
1675 case NOTE_INSN_BASIC_BLOCK:
1676#ifdef IA64_UNWIND_INFO
1677 IA64_UNWIND_EMIT (asm_out_file, insn);
1678#endif
1679 if (flag_debug_asm)
1680 fprintf (asm_out_file, "\t%s basic block %d\n",
1681 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1682
1683 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1684 {
1685 *seen |= SEEN_EMITTED;
1686 last_filename = NULL;
1687 }
1688 else
1689 *seen |= SEEN_BB;
1690
1691 break;
1692
1693 case NOTE_INSN_EH_REGION_BEG:
1694 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1695 NOTE_EH_HANDLER (insn));
1696 break;
1697
1698 case NOTE_INSN_EH_REGION_END:
1699 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1700 NOTE_EH_HANDLER (insn));
1701 break;
1702
1703 case NOTE_INSN_PROLOGUE_END:
1704 (*targetm.asm_out.function_end_prologue) (file);
1705 profile_after_prologue (file);
1706
1707 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1708 {
1709 *seen |= SEEN_EMITTED;
1710 last_filename = NULL;
1711 }
1712 else
1713 *seen |= SEEN_NOTE;
1714
1715 break;
1716
1717 case NOTE_INSN_EPILOGUE_BEG:
1718 (*targetm.asm_out.function_begin_epilogue) (file);
1719 break;
1720
1721 case NOTE_INSN_FUNCTION_BEG:
1722 app_disable ();
1723 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1724
1725 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1726 {
1727 *seen |= SEEN_EMITTED;
1728 last_filename = NULL;
1729 }
1730 else
1731 *seen |= SEEN_NOTE;
1732
1733 break;
1734
1735 case NOTE_INSN_BLOCK_BEG:
1736 if (debug_info_level == DINFO_LEVEL_NORMAL
1737 || debug_info_level == DINFO_LEVEL_VERBOSE
1738 || write_symbols == DWARF_DEBUG
1739 || write_symbols == DWARF2_DEBUG
1740 || write_symbols == VMS_AND_DWARF2_DEBUG
--- 42 unchanged lines hidden (view full) ---
1783 break;
1784
1785 case 0:
1786 break;
1787
1788 default:
1789 if (NOTE_LINE_NUMBER (insn) <= 0)
1790 abort ();
1791 break;
1792 }
1793 break;
1794
1795 case BARRIER:
1796#if defined (DWARF2_UNWIND_INFO)
1797 if (dwarf2out_do_frame ())
1798 dwarf2out_frame_debug (insn);
--- 47 unchanged lines hidden (view full) ---
1846 {
1847 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1848 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1849 }
1850 }
1851#endif
1852 if (prescan > 0)
1853 break;
1854
1855 if (LABEL_NAME (insn))
1856 (*debug_hooks->label) (insn);
1857
1858 if (app_on)
1859 {
1860 fputs (ASM_APP_OFF, file);
1861 app_on = 0;
1862 }
--- 29 unchanged lines hidden (view full) ---
1892 }
1893 else
1894 function_section (current_function_decl);
1895
1896#ifdef ASM_OUTPUT_CASE_LABEL
1897 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1898 NEXT_INSN (insn));
1899#else
1900 (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn));
1901#endif
1902#endif
1903 break;
1904 }
1905 }
1906 if (LABEL_ALT_ENTRY_P (insn))
1907 output_alternate_entry_point (file, insn);
1908 else
1909 (*targetm.asm_out.internal_label) (file, "L", CODE_LABEL_NUMBER (insn));
1910 break;
1911
1912 default:
1913 {
1914 rtx body = PATTERN (insn);
1915 int insn_code_number;
1916 const char *template;
1917 rtx note;
1918
1919 /* An INSN, JUMP_INSN or CALL_INSN.
1920 First check for special kinds that recog doesn't recognize. */
1921
1922 if (GET_CODE (body) == USE /* These are just declarations. */
1923 || GET_CODE (body) == CLOBBER)
1924 break;
1925
1926#ifdef HAVE_cc0
1927 /* If there is a REG_CC_SETTER note on this insn, it means that
1928 the setting of the condition code was done in the delay slot
1929 of the insn that branched here. So recover the cc status
1930 from the insn that set it. */
--- 73 unchanged lines hidden (view full) ---
2004 insn);
2005#endif
2006#endif
2007
2008 function_section (current_function_decl);
2009
2010 break;
2011 }
2012 /* Output this line note if it is the first or the last line
2013 note in a row. */
2014 if (notice_source_line (insn))
2015 {
2016 (*debug_hooks->source_line) (last_linenum, last_filename);
2017 }
2018
2019 if (GET_CODE (body) == ASM_INPUT)
2020 {
2021 const char *string = XSTR (body, 0);
2022
2023 /* There's no telling what that did to the condition codes. */
2024 CC_STATUS_INIT;
2025 if (prescan > 0)
--- 10 unchanged lines hidden (view full) ---
2036 }
2037 break;
2038 }
2039
2040 /* Detect `asm' construct with operands. */
2041 if (asm_noperands (body) >= 0)
2042 {
2043 unsigned int noperands = asm_noperands (body);
2044 rtx *ops = alloca (noperands * sizeof (rtx));
2045 const char *string;
2046
2047 /* There's no telling what that did to the condition codes. */
2048 CC_STATUS_INIT;
2049 if (prescan > 0)
2050 break;
2051
2052 /* Get out the operand values. */
2053 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2054 /* Inhibit aborts on what would otherwise be compiler bugs. */
2055 insn_noperands = noperands;
2056 this_is_asm_operands = insn;
2057
2058#ifdef FINAL_PRESCAN_INSN
2059 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2060#endif
2061
2062 /* Output the insn using them. */
2063 if (string[0])
2064 {
2065 if (! app_on)
2066 {
2067 fputs (ASM_APP_ON, file);
2068 app_on = 1;
2069 }
--- 15 unchanged lines hidden (view full) ---
2085 /* A delayed-branch sequence */
2086 int i;
2087 rtx next;
2088
2089 if (prescan > 0)
2090 break;
2091 final_sequence = body;
2092
2093 /* Record the delay slots' frame information before the branch.
2094 This is needed for delayed calls: see execute_cfa_program(). */
2095#if defined (DWARF2_UNWIND_INFO)
2096 if (dwarf2out_do_frame ())
2097 for (i = 1; i < XVECLEN (body, 0); i++)
2098 dwarf2out_frame_debug (XVECEXP (body, 0, i));
2099#endif
2100
2101 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2102 force the restoration of a comparison that was previously
2103 thought unnecessary. If that happens, cancel this sequence
2104 and cause that insn to be restored. */
2105
2106 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, prescan, 1, seen);
2107 if (next != XVECEXP (body, 0, 1))
2108 {
2109 final_sequence = 0;
2110 return next;
2111 }
2112
2113 for (i = 1; i < XVECLEN (body, 0); i++)
2114 {
2115 rtx insn = XVECEXP (body, 0, i);
2116 rtx next = NEXT_INSN (insn);
2117 /* We loop in case any instruction in a delay slot gets
2118 split. */
2119 do
2120 insn = final_scan_insn (insn, file, 0, prescan, 1, seen);
2121 while (insn != next);
2122 }
2123#ifdef DBR_OUTPUT_SEQEND
2124 DBR_OUTPUT_SEQEND (file);
2125#endif
2126 final_sequence = 0;
2127
2128 /* If the insn requiring the delay slot was a CALL_INSN, the
--- 20 unchanged lines hidden (view full) ---
2149 This is done only when optimizing; if not optimizing,
2150 it should be possible for the user to alter a variable
2151 with the debugger in between statements
2152 and the next statement should reexamine the variable
2153 to compute the condition codes. */
2154
2155 if (optimize)
2156 {
2157 if (set
2158 && GET_CODE (SET_DEST (set)) == CC0
2159 && insn != last_ignored_compare)
2160 {
2161 if (GET_CODE (SET_SRC (set)) == SUBREG)
2162 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2163 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2164 {
--- 151 unchanged lines hidden (view full) ---
2316 /* When peepholing, if there were notes within the peephole,
2317 emit them before the peephole. */
2318 if (next != 0 && next != NEXT_INSN (insn))
2319 {
2320 rtx prev = PREV_INSN (insn);
2321
2322 for (note = NEXT_INSN (insn); note != next;
2323 note = NEXT_INSN (note))
2324 final_scan_insn (note, file, optimize, prescan, nopeepholes, seen);
2325
2326 /* In case this is prescan, put the notes
2327 in proper position for later rescan. */
2328 note = NEXT_INSN (insn);
2329 PREV_INSN (note) = prev;
2330 NEXT_INSN (prev) = note;
2331 NEXT_INSN (PREV_INSN (next)) = insn;
2332 PREV_INSN (insn) = PREV_INSN (next);
--- 64 unchanged lines hidden (view full) ---
2397 which follows a deleted test insn, and that test insn
2398 needs to be reinserted. */
2399 if (template == 0)
2400 {
2401 rtx prev;
2402
2403 if (prev_nonnote_insn (insn) != last_ignored_compare)
2404 abort ();
2405
2406 /* We have already processed the notes between the setter and
2407 the user. Make sure we don't process them again, this is
2408 particularly important if one of the notes is a block
2409 scope note or an EH note. */
2410 for (prev = insn;
2411 prev != last_ignored_compare;
2412 prev = PREV_INSN (prev))
--- 17 unchanged lines hidden (view full) ---
2430
2431#ifdef HAVE_ATTR_length
2432 /* This instruction should have been split in shorten_branches,
2433 to ensure that we would have valid length info for the
2434 splitees. */
2435 abort ();
2436#endif
2437
2438 return new;
2439 }
2440
2441 if (prescan > 0)
2442 break;
2443
2444#ifdef IA64_UNWIND_INFO
2445 IA64_UNWIND_EMIT (asm_out_file, insn);
2446#endif
2447 /* Output assembler code from the template. */
2448
2449 output_asm_insn (template, recog_data.operand);
2450
2451 /* If necessary, report the effect that the instruction has on
2452 the unwind info. We've already done this for delay slots
2453 and call instructions. */
2454#if defined (DWARF2_UNWIND_INFO)
2455 if (GET_CODE (insn) == INSN
2456#if !defined (HAVE_prologue)
2457 && !ACCUMULATE_OUTGOING_ARGS
2458#endif
2459 && final_sequence == 0
2460 && dwarf2out_do_frame ())
2461 dwarf2out_frame_debug (insn);
2462#endif
2463
2464#if 0
2465 /* It's not at all clear why we did this and doing so used to
2466 interfere with tests that used REG_WAS_0 notes, which are
2467 now gone, so let's try with this out. */
2468
2469 /* Mark this insn as having been output. */
2470 INSN_DELETED_P (insn) = 1;
2471#endif
2472
2473 /* Emit information for vtable gc. */
2474 note = find_reg_note (insn, REG_VTABLE_REF, NULL_RTX);
2475
2476 current_output_insn = debug_insn = 0;
2477 }
2478 }
2479 return NEXT_INSN (insn);
2480}
2481
2482/* Output debugging info to the assembler file FILE
2483 based on the NOTE-insn INSN, assumed to be a line number. */
2484
2485static bool
2486notice_source_line (rtx insn)
2487{
2488 const char *filename = insn_file (insn);
2489 int linenum = insn_line (insn);
2490
2491 if (filename && (filename != last_filename || last_linenum != linenum))
2492 {
2493 last_filename = filename;
2494 last_linenum = linenum;
2495 high_block_linenum = MAX (last_linenum, high_block_linenum);
2496 high_function_linenum = MAX (last_linenum, high_function_linenum);
2497 return true;
2498 }
2499 return false;
2500}
2501
2502/* For each operand in INSN, simplify (subreg (reg)) so that it refers
2503 directly to the desired hard register. */
2504
2505void
2506cleanup_subreg_operands (rtx insn)
2507{
2508 int i;
2509 extract_insn_cached (insn);
2510 for (i = 0; i < recog_data.n_operands; i++)
2511 {
2512 /* The following test cannot use recog_data.operand when testing
2513 for a SUBREG: the underlying object might have been changed
2514 already if we are inside a match_operator expression that
2515 matches the else clause. Instead we test the underlying
2516 expression directly. */
2517 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2518 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2519 else if (GET_CODE (recog_data.operand[i]) == PLUS
2520 || GET_CODE (recog_data.operand[i]) == MULT
--- 11 unchanged lines hidden (view full) ---
2532 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2533 }
2534}
2535
2536/* If X is a SUBREG, replace it with a REG or a MEM,
2537 based on the thing it is a subreg of. */
2538
2539rtx
2540alter_subreg (rtx *xp)
2541{
2542 rtx x = *xp;
2543 rtx y = SUBREG_REG (x);
2544
2545 /* simplify_subreg does not remove subreg from volatile references.
2546 We are required to. */
2547 if (GET_CODE (y) == MEM)
2548 *xp = adjust_address (y, GET_MODE (x), SUBREG_BYTE (x));
2549 else
2550 {
2551 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2552 SUBREG_BYTE (x));
2553
2554 if (new != 0)
2555 *xp = new;
2556 /* Simplify_subreg can't handle some REG cases, but we have to. */
2557 else if (GET_CODE (y) == REG)
2558 {
2559 unsigned int regno = subreg_hard_regno (x, 1);
2560 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2561 }
2562 else
2563 abort ();
2564 }
2565
2566 return *xp;
2567}
2568
2569/* Do alter_subreg on all the SUBREGs contained in X. */
2570
2571static rtx
2572walk_alter_subreg (rtx *xp)
2573{
2574 rtx x = *xp;
2575 switch (GET_CODE (x))
2576 {
2577 case PLUS:
2578 case MULT:
2579 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2580 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
--- 20 unchanged lines hidden (view full) ---
2601 Not all of the bits there can be handled at this level in all cases.
2602
2603 The value is normally 0.
2604 1 means that the condition has become always true.
2605 -1 means that the condition has become always false.
2606 2 means that COND has been altered. */
2607
2608static int
2609alter_cond (rtx cond)
2610{
2611 int value = 0;
2612
2613 if (cc_status.flags & CC_REVERSED)
2614 {
2615 value = 2;
2616 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2617 }
--- 136 unchanged lines hidden (view full) ---
2754 return value;
2755}
2756#endif
2757
2758/* Report inconsistency between the assembler template and the operands.
2759 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2760
2761void
2762output_operand_lossage (const char *msgid, ...)
2763{
2764 char *fmt_string;
2765 char *new_message;
2766 const char *pfx_str;
2767 va_list ap;
2768
2769 va_start (ap, msgid);
2770
2771 pfx_str = this_is_asm_operands ? _("invalid `asm': ") : "output_operand: ";
2772 asprintf (&fmt_string, "%s%s", pfx_str, _(msgid));
2773 vasprintf (&new_message, fmt_string, ap);
2774
2775 if (this_is_asm_operands)
2776 error_for_asm (this_is_asm_operands, "%s", new_message);
2777 else
2778 internal_error ("%s", new_message);
2779
2780 free (fmt_string);
2781 free (new_message);
2782 va_end (ap);
2783}
2784
2785/* Output of assembler code from a template, and its subroutines. */
2786
2787/* Annotate the assembly with a comment describing the pattern and
2788 alternative used. */
2789
2790static void
2791output_asm_name (void)
2792{
2793 if (debug_insn)
2794 {
2795 int num = INSN_CODE (debug_insn);
2796 fprintf (asm_out_file, "\t%s %d\t%s",
2797 ASM_COMMENT_START, INSN_UID (debug_insn),
2798 insn_data[num].name);
2799 if (insn_data[num].n_alternatives > 1)
--- 8 unchanged lines hidden (view full) ---
2808 }
2809}
2810
2811/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2812 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2813 corresponds to the address of the object and 0 if to the object. */
2814
2815static tree
2816get_mem_expr_from_op (rtx op, int *paddressp)
2817{
2818 tree expr;
2819 int inner_addressp;
2820
2821 *paddressp = 0;
2822
2823 if (GET_CODE (op) == REG)
2824 return REG_EXPR (op);
2825 else if (GET_CODE (op) != MEM)
2826 return 0;
2827
2828 if (MEM_EXPR (op) != 0)
2829 return MEM_EXPR (op);
2830
2831 /* Otherwise we have an address, so indicate it and look at the address. */
2832 *paddressp = 1;
--- 16 unchanged lines hidden (view full) ---
2849 return inner_addressp ? 0 : expr;
2850}
2851
2852/* Output operand names for assembler instructions. OPERANDS is the
2853 operand vector, OPORDER is the order to write the operands, and NOPS
2854 is the number of operands to write. */
2855
2856static void
2857output_asm_operand_names (rtx *operands, int *oporder, int nops)
2858{
2859 int wrote = 0;
2860 int i;
2861
2862 for (i = 0; i < nops; i++)
2863 {
2864 int addressp;
2865 rtx op = operands[oporder[i]];
2866 tree expr = get_mem_expr_from_op (op, &addressp);
2867
2868 fprintf (asm_out_file, "%c%s",
2869 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2870 wrote = 1;
2871 if (expr)
2872 {
2873 fprintf (asm_out_file, "%s",
2874 addressp ? "*" : "");
2875 print_mem_expr (asm_out_file, expr);
2876 wrote = 1;
2877 }
2878 else if (REG_P (op) && ORIGINAL_REGNO (op)
2879 && ORIGINAL_REGNO (op) != REGNO (op))
2880 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2881 }
2882}
2883
2884/* Output text from TEMPLATE to the assembler output file,
2885 obeying %-directions to substitute operands taken from
2886 the vector OPERANDS.
2887
2888 %N (for N a digit) means print operand N in usual manner.
--- 4 unchanged lines hidden (view full) ---
2893 %aN means expect operand N to be a memory address
2894 (not a memory reference!) and print a reference
2895 to that address.
2896 %nN means expect operand N to be a constant
2897 and print a constant expression for minus the value
2898 of the operand, with no other punctuation. */
2899
2900void
2901output_asm_insn (const char *template, rtx *operands)
2902{
2903 const char *p;
2904 int c;
2905#ifdef ASSEMBLER_DIALECT
2906 int dialect = 0;
2907#endif
2908 int oporder[MAX_RECOG_OPERANDS];
2909 char opoutput[MAX_RECOG_OPERANDS];
--- 189 unchanged lines hidden (view full) ---
3099 output_asm_name ();
3100
3101 putc ('\n', asm_out_file);
3102}
3103
3104/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3105
3106void
3107output_asm_label (rtx x)
3108{
3109 char buf[256];
3110
3111 if (GET_CODE (x) == LABEL_REF)
3112 x = XEXP (x, 0);
3113 if (GET_CODE (x) == CODE_LABEL
3114 || (GET_CODE (x) == NOTE
3115 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
--- 10 unchanged lines hidden (view full) ---
3126 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3127 between the % and the digits.
3128 When CODE is a non-letter, X is 0.
3129
3130 The meanings of the letters are machine-dependent and controlled
3131 by PRINT_OPERAND. */
3132
3133static void
3134output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3135{
3136 if (x && GET_CODE (x) == SUBREG)
3137 x = alter_subreg (&x);
3138
3139 /* If X is a pseudo-register, abort now rather than writing trash to the
3140 assembler file. */
3141
3142 if (x && GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER)
3143 abort ();
3144
3145 PRINT_OPERAND (asm_out_file, x, code);
3146}
3147
3148/* Print a memory reference operand for address X
3149 using machine-dependent assembler syntax.
3150 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3151
3152void
3153output_address (rtx x)
3154{
3155 walk_alter_subreg (&x);
3156 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3157}
3158
3159/* Print an integer constant expression in assembler syntax.
3160 Addition and subtraction are the only arithmetic
3161 that may appear in these expressions. */
3162
3163void
3164output_addr_const (FILE *file, rtx x)
3165{
3166 char buf[256];
3167
3168 restart:
3169 switch (GET_CODE (x))
3170 {
3171 case PC:
3172 putc ('.', file);
--- 105 unchanged lines hidden (view full) ---
3278}
3279
3280/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3281 %R prints the value of REGISTER_PREFIX.
3282 %L prints the value of LOCAL_LABEL_PREFIX.
3283 %U prints the value of USER_LABEL_PREFIX.
3284 %I prints the value of IMMEDIATE_PREFIX.
3285 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3286 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3287
3288 We handle alternate assembler dialects here, just like output_asm_insn. */
3289
3290void
3291asm_fprintf (FILE *file, const char *p, ...)
3292{
3293 char buf[10];
3294 char *q, c;
3295 va_list argptr;
3296
3297 va_start (argptr, p);
3298
3299 buf[0] = '%';
3300
3301 while ((c = *p++))
3302 switch (c)
3303 {
3304#ifdef ASSEMBLER_DIALECT
3305 case '{':
--- 21 unchanged lines hidden (view full) ---
3327
3328 case '}':
3329 break;
3330#endif
3331
3332 case '%':
3333 c = *p++;
3334 q = &buf[1];
3335 while (strchr ("-+ #0", c))
3336 {
3337 *q++ = c;
3338 c = *p++;
3339 }
3340 while (ISDIGIT (c) || c == '.')
3341 {
3342 *q++ = c;
3343 c = *p++;
3344 }
3345 switch (c)
3346 {
3347 case '%':
3348 putc ('%', file);
3349 break;
3350
3351 case 'd': case 'i': case 'u':
3352 case 'x': case 'X': case 'o':
3353 case 'c':
3354 *q++ = c;
3355 *q = 0;
3356 fprintf (file, buf, va_arg (argptr, int));
3357 break;
3358
3359 case 'w':
3360 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3361 'o' cases, but we do not check for those cases. It
3362 means that the value is a HOST_WIDE_INT, which may be
3363 either `long' or `long long'. */
3364 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3365 q += strlen (HOST_WIDE_INT_PRINT);
3366 *q++ = *p++;
3367 *q = 0;
3368 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3369 break;
3370
3371 case 'l':
3372 *q++ = c;
3373#ifdef HAVE_LONG_LONG
3374 if (*p == 'l')
3375 {
3376 *q++ = *p++;
3377 *q++ = *p++;
3378 *q = 0;
3379 fprintf (file, buf, va_arg (argptr, long long));
3380 }
3381 else
3382#endif
3383 {
3384 *q++ = *p++;
3385 *q = 0;
3386 fprintf (file, buf, va_arg (argptr, long));
3387 }
3388
3389 break;
3390
3391 case 's':
3392 *q++ = c;
3393 *q = 0;
3394 fprintf (file, buf, va_arg (argptr, char *));
3395 break;
3396
--- 21 unchanged lines hidden (view full) ---
3418#endif
3419 break;
3420
3421 case 'U':
3422 fputs (user_label_prefix, file);
3423 break;
3424
3425#ifdef ASM_FPRINTF_EXTENSIONS
3426 /* Uppercase letters are reserved for general use by asm_fprintf
3427 and so are not available to target specific code. In order to
3428 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3429 they are defined here. As they get turned into real extensions
3430 to asm_fprintf they should be removed from this list. */
3431 case 'A': case 'B': case 'C': case 'D': case 'E':
3432 case 'F': case 'G': case 'H': case 'J': case 'K':
3433 case 'M': case 'N': case 'P': case 'Q': case 'S':
3434 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3435 break;
3436
3437 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3438#endif
3439 default:
3440 abort ();
3441 }
3442 break;
3443
3444 default:
3445 putc (c, file);
3446 }
3447 va_end (argptr);
3448}
3449
3450/* Split up a CONST_DOUBLE or integer constant rtx
3451 into two rtx's for single words,
3452 storing in *FIRST the word that comes first in memory in the target
3453 and in *SECOND the other. */
3454
3455void
3456split_double (rtx value, rtx *first, rtx *second)
3457{
3458 if (GET_CODE (value) == CONST_INT)
3459 {
3460 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3461 {
3462 /* In this case the CONST_INT holds both target words.
3463 Extract the bits from it into two word-sized pieces.
3464 Sign extend each half to HOST_WIDE_INT. */
--- 122 unchanged lines hidden (view full) ---
3587 *first = GEN_INT ((HOST_WIDE_INT) l[0]);
3588 *second = GEN_INT ((HOST_WIDE_INT) l[1]);
3589 }
3590}
3591
3592/* Return nonzero if this function has no function calls. */
3593
3594int
3595leaf_function_p (void)
3596{
3597 rtx insn;
3598 rtx link;
3599
3600 if (current_function_profile || profile_arc_flag)
3601 return 0;
3602
3603 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
--- 26 unchanged lines hidden (view full) ---
3630 return 1;
3631}
3632
3633/* Return 1 if branch is a forward branch.
3634 Uses insn_shuid array, so it works only in the final pass. May be used by
3635 output templates to customary add branch prediction hints.
3636 */
3637int
3638final_forward_branch_p (rtx insn)
3639{
3640 int insn_id, label_id;
3641 if (!uid_shuid)
3642 abort ();
3643 insn_id = INSN_SHUID (insn);
3644 label_id = INSN_SHUID (JUMP_LABEL (insn));
3645 /* We've hit some insns that does not have id information available. */
3646 if (!insn_id || !label_id)
--- 11 unchanged lines hidden (view full) ---
3658 uses the "output" registers instead. */
3659
3660#ifdef LEAF_REGISTERS
3661
3662/* Return 1 if this function uses only the registers that can be
3663 safely renumbered. */
3664
3665int
3666only_leaf_regs_used (void)
3667{
3668 int i;
3669 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3670
3671 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3672 if ((regs_ever_live[i] || global_regs[i])
3673 && ! permitted_reg_in_leaf_functions[i])
3674 return 0;
3675
3676 if (current_function_uses_pic_offset_table
3677 && pic_offset_table_rtx != 0
3678 && GET_CODE (pic_offset_table_rtx) == REG
3679 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3680 return 0;
3681
3682 return 1;
3683}
3684
3685/* Scan all instructions and renumber all registers into those
3686 available in leaf functions. */
3687
3688static void
3689leaf_renumber_regs (rtx first)
3690{
3691 rtx insn;
3692
3693 /* Renumber only the actual patterns.
3694 The reg-notes can contain frame pointer refs,
3695 and renumbering them could crash, and should not be needed. */
3696 for (insn = first; insn; insn = NEXT_INSN (insn))
3697 if (INSN_P (insn))
--- 4 unchanged lines hidden (view full) ---
3702 if (INSN_P (XEXP (insn, 0)))
3703 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3704}
3705
3706/* Scan IN_RTX and its subexpressions, and renumber all regs into those
3707 available in leaf functions. */
3708
3709void
3710leaf_renumber_regs_insn (rtx in_rtx)
3711{
3712 int i, j;
3713 const char *format_ptr;
3714
3715 if (in_rtx == 0)
3716 return;
3717
3718 /* Renumber all input-registers into output-registers.
--- 60 unchanged lines hidden (view full) ---
3779 case 'u':
3780 break;
3781
3782 default:
3783 abort ();
3784 }
3785}
3786#endif
3787
3788
3789/* When -gused is used, emit debug info for only used symbols. But in
3790 addition to the standard intercepted debug_hooks there are some direct
3791 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3792 Those routines may also be called from a higher level intercepted routine. So
3793 to prevent recording data for an inner call to one of these for an intercept,
3794 we maintain an intercept nesting counter (debug_nesting). We only save the
3795 intercepted arguments if the nesting is 1. */
3796int debug_nesting = 0;
3797
3798static tree *symbol_queue;
3799int symbol_queue_index = 0;
3800static int symbol_queue_size = 0;
3801
3802/* Generate the symbols for any queued up type symbols we encountered
3803 while generating the type info for some originally used symbol.
3804 This might generate additional entries in the queue. Only when
3805 the nesting depth goes to 0 is this routine called. */
3806
3807void
3808debug_flush_symbol_queue (void)
3809{
3810 int i;
3811
3812 /* Make sure that additionally queued items are not flushed
3813 prematurely. */
3814
3815 ++debug_nesting;
3816
3817 for (i = 0; i < symbol_queue_index; ++i)
3818 {
3819 /* If we pushed queued symbols then such symbols are must be
3820 output no matter what anyone else says. Specifically,
3821 we need to make sure dbxout_symbol() thinks the symbol was
3822 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3823 which may be set for outside reasons. */
3824 int saved_tree_used = TREE_USED (symbol_queue[i]);
3825 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3826 TREE_USED (symbol_queue[i]) = 1;
3827 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3828
3829#ifdef DBX_DEBUGGING_INFO
3830 dbxout_symbol (symbol_queue[i], 0);
3831#endif
3832
3833 TREE_USED (symbol_queue[i]) = saved_tree_used;
3834 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3835 }
3836
3837 symbol_queue_index = 0;
3838 --debug_nesting;
3839}
3840
3841/* Queue a type symbol needed as part of the definition of a decl
3842 symbol. These symbols are generated when debug_flush_symbol_queue()
3843 is called. */
3844
3845void
3846debug_queue_symbol (tree decl)
3847{
3848 if (symbol_queue_index >= symbol_queue_size)
3849 {
3850 symbol_queue_size += 10;
3851 symbol_queue = xrealloc (symbol_queue,
3852 symbol_queue_size * sizeof (tree));
3853 }
3854
3855 symbol_queue[symbol_queue_index++] = decl;
3856}
3857
3858/* Free symbol queue. */
3859void
3860debug_free_queue (void)
3861{
3862 if (symbol_queue)
3863 {
3864 free (symbol_queue);
3865 symbol_queue = NULL;
3866 symbol_queue_size = 0;
3867 }
3868}