ofw_pci.h (256281) | ofw_pci.h (292789) |
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1/*- 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 42 unchanged lines hidden (view full) --- 51 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 52 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 53 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 * SUCH DAMAGE. 56 * 57 * from: NetBSD: psychoreg.h,v 1.14 2008/05/30 02:29:37 mrg Exp 58 * | 1/*- 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 42 unchanged lines hidden (view full) --- 51 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 52 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 53 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 * SUCH DAMAGE. 56 * 57 * from: NetBSD: psychoreg.h,v 1.14 2008/05/30 02:29:37 mrg Exp 58 * |
59 * $FreeBSD: stable/10/sys/sparc64/pci/ofw_pci.h 220038 2011-03-26 16:49:12Z marius $ | 59 * $FreeBSD: stable/10/sys/sparc64/pci/ofw_pci.h 292789 2015-12-27 19:37:47Z marius $ |
60 */ 61 62#ifndef _SPARC64_PCI_OFW_PCI_H_ 63#define _SPARC64_PCI_OFW_PCI_H_ 64 | 60 */ 61 62#ifndef _SPARC64_PCI_OFW_PCI_H_ 63#define _SPARC64_PCI_OFW_PCI_H_ 64 |
65#include <sys/rman.h> 66 |
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65#include <dev/ofw/ofw_bus_subr.h> 66 67#include "ofw_pci_if.h" 68 69typedef uint32_t ofw_pci_intr_t; 70 71/* PCI range child spaces. XXX: are these MI? */ 72#define OFW_PCI_CS_CONFIG 0x00 73#define OFW_PCI_CS_IO 0x01 74#define OFW_PCI_CS_MEM32 0x02 75#define OFW_PCI_CS_MEM64 0x03 | 67#include <dev/ofw/ofw_bus_subr.h> 68 69#include "ofw_pci_if.h" 70 71typedef uint32_t ofw_pci_intr_t; 72 73/* PCI range child spaces. XXX: are these MI? */ 74#define OFW_PCI_CS_CONFIG 0x00 75#define OFW_PCI_CS_IO 0x01 76#define OFW_PCI_CS_MEM32 0x02 77#define OFW_PCI_CS_MEM64 0x03 |
78#define OFW_PCI_NUM_CS 4 |
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76 77/* OFW device types */ 78#define OFW_TYPE_PCI "pci" 79#define OFW_TYPE_PCIE "pciex" 80 81struct ofw_pci_msi_addr_ranges { 82 uint32_t addr32_hi; 83 uint32_t addr32_lo; --- 35 unchanged lines hidden (view full) --- 119 (((uint64_t)(r)->phys_hi << 32) | (uint64_t)(r)->phys_lo) 120#define OFW_PCI_RANGE_SIZE(r) \ 121 (((uint64_t)(r)->size_hi << 32) | (uint64_t)(r)->size_lo) 122#define OFW_PCI_RANGE_CS(r) (((r)->cspace >> 24) & 0x03) 123 124/* default values */ 125#define OFW_PCI_LATENCY 64 126 | 79 80/* OFW device types */ 81#define OFW_TYPE_PCI "pci" 82#define OFW_TYPE_PCIE "pciex" 83 84struct ofw_pci_msi_addr_ranges { 85 uint32_t addr32_hi; 86 uint32_t addr32_lo; --- 35 unchanged lines hidden (view full) --- 122 (((uint64_t)(r)->phys_hi << 32) | (uint64_t)(r)->phys_lo) 123#define OFW_PCI_RANGE_SIZE(r) \ 124 (((uint64_t)(r)->size_hi << 32) | (uint64_t)(r)->size_lo) 125#define OFW_PCI_RANGE_CS(r) (((r)->cspace >> 24) & 0x03) 126 127/* default values */ 128#define OFW_PCI_LATENCY 64 129 |
130/* 131 * Common and generic parts of host-PCI-bridge support 132 */ 133 134struct ofw_pci_softc { 135 struct rman sc_pci_mem_rman; 136 struct rman sc_pci_io_rman; 137 138 bus_space_handle_t sc_pci_bh[OFW_PCI_NUM_CS]; 139 bus_space_tag_t sc_pci_cfgt; 140 bus_space_tag_t sc_pci_iot; 141 bus_dma_tag_t sc_pci_dmat; 142 143 struct ofw_bus_iinfo sc_pci_iinfo; 144 145 phandle_t sc_node; 146 147 uint8_t sc_pci_secbus; 148 uint8_t sc_pci_subbus; 149}; 150 151int ofw_pci_attach_common(device_t dev, bus_dma_tag_t dmat, u_long iosize, 152 u_long memsize); 153uint32_t ofw_pci_read_config_common(device_t dev, u_int regmax, u_long offset, 154 u_int bus, u_int slot, u_int func, u_int reg, int width); 155void ofw_pci_write_config_common(device_t dev, u_int regmax, u_long offset, 156 u_int bus, u_int slot, u_int func, u_int reg, uint32_t val, int width); 157ofw_pci_intr_t ofw_pci_route_interrupt_common(device_t bridge, device_t dev, 158 int pin); 159 160void ofw_pci_dmamap_sync_stst_order_common(void); 161 162bus_activate_resource_t ofw_pci_activate_resource; 163bus_adjust_resource_t ofw_pci_adjust_resource; 164bus_alloc_resource_t ofw_pci_alloc_resource; 165bus_get_dma_tag_t ofw_pci_get_dma_tag; 166bus_read_ivar_t ofw_pci_read_ivar; 167 168ofw_bus_get_node_t ofw_pci_get_node; 169 |
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127#endif /* ! _SPARC64_PCI_OFW_PCI_H_ */ | 170#endif /* ! _SPARC64_PCI_OFW_PCI_H_ */ |