1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com>
4 *
5 * The following Boot Header format/structures and values are defined in the
6 * following documents:
7 *   * Xilinx Zynq-7000 Technical Reference Manual (Section 6.3)
8 *   * Xilinx Zynq-7000 Software Developers Guide (Appendix A.7 and A.8)
9 *
10 * Expected Header Size = 0x8C0
11 * Forced as 'little' endian, 32-bit words
12 *
13 *  0x  0 - Interrupt Table (8 words)
14 *  ...     (Default value = 0xeafffffe)
15 *  0x 1f
16 *  0x 20 - Width Detection
17 *         * DEFAULT_WIDTHDETECTION    0xaa995566
18 *  0x 24 - Image Identifier
19 *         * DEFAULT_IMAGEIDENTIFIER   0x584c4e58
20 *  0x 28 - Encryption
21 *         * 0x00000000 - None
22 *         * 0xa5c3c5a3 - eFuse
23 *         * 0x3a5c3c5a - bbRam
24 *  0x 2C - User Field
25 *  0x 30 - Image Offset
26 *  0x 34 - Image Size
27 *  0x 38 - Reserved (0x00000000) (according to spec)
28 *          * FSBL defines this field for Image Destination Address.
29 *  0x 3C - Image Load
30 *  0x 40 - Image Stored Size
31 *  0x 44 - Reserved (0x00000000) (according to spec)
32 *          * FSBL defines this field for QSPI configuration Data.
33 *  0x 48 - Checksum
34 *  0x 4c - Unused (21 words)
35 *  ...
36 *  0x 9c
37 *  0x a0 - Register Initialization, 256 Address and Data word pairs
38 *         * List is terminated with an address of 0xffffffff or
39 *  ...    * at the max number of entries
40 *  0x89c
41 *  0x8a0 - Unused (8 words)
42 *  ...
43 *  0x8bf
44 *  0x8c0 - Data/Image starts here or above
45 */
46
47#include "imagetool.h"
48#include "mkimage.h"
49#include <image.h>
50
51#define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe))
52#define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
53#define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
54#define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
55
56enum {
57	ENCRYPTION_EFUSE = 0xa5c3c5a3,
58	ENCRYPTION_BBRAM = 0x3a5c3c5a,
59	ENCRYPTION_NONE = 0x0,
60};
61
62struct zynq_reginit {
63	uint32_t address;
64	uint32_t data;
65};
66
67#define HEADER_INTERRUPT_VECTORS 8
68#define HEADER_REGINITS 256
69
70struct zynq_header {
71	uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */
72	uint32_t width_detection; /* 0x20 */
73	uint32_t image_identifier; /* 0x24 */
74	uint32_t encryption; /* 0x28 */
75	uint32_t user_field; /* 0x2c */
76	uint32_t image_offset; /* 0x30 */
77	uint32_t image_size; /* 0x34 */
78	uint32_t __reserved1; /* 0x38 */
79	uint32_t image_load; /* 0x3c */
80	uint32_t image_stored_size; /* 0x40 */
81	uint32_t __reserved2; /* 0x44 */
82	uint32_t checksum; /* 0x48 */
83	uint32_t __reserved3[21]; /* 0x4c */
84	struct zynq_reginit register_init[HEADER_REGINITS]; /* 0xa0 */
85	uint32_t __reserved4[8]; /* 0x8a0 */
86};
87
88static struct zynq_header zynqimage_header;
89
90static uint32_t zynqimage_checksum(struct zynq_header *ptr)
91{
92	uint32_t checksum = 0;
93
94	if (ptr == NULL)
95		return 0;
96
97	checksum += le32_to_cpu(ptr->width_detection);
98	checksum += le32_to_cpu(ptr->image_identifier);
99	checksum += le32_to_cpu(ptr->encryption);
100	checksum += le32_to_cpu(ptr->user_field);
101	checksum += le32_to_cpu(ptr->image_offset);
102	checksum += le32_to_cpu(ptr->image_size);
103	checksum += le32_to_cpu(ptr->__reserved1);
104	checksum += le32_to_cpu(ptr->image_load);
105	checksum += le32_to_cpu(ptr->image_stored_size);
106	checksum += le32_to_cpu(ptr->__reserved2);
107	checksum = ~checksum;
108
109	return cpu_to_le32(checksum);
110}
111
112static void zynqimage_default_header(struct zynq_header *ptr)
113{
114	int i;
115
116	if (ptr == NULL)
117		return;
118
119	ptr->width_detection = HEADER_WIDTHDETECTION;
120	ptr->image_identifier = HEADER_IMAGEIDENTIFIER;
121	ptr->encryption = cpu_to_le32(ENCRYPTION_NONE);
122
123	/* Setup not-supported/constant/reserved fields */
124	for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++)
125		ptr->interrupt_vectors[i] = HEADER_INTERRUPT_DEFAULT;
126
127	for (i = 0; i < HEADER_REGINITS; i++) {
128		ptr->register_init[i].address = HEADER_REGINIT_NULL;
129		ptr->register_init[i].data = HEADER_REGINIT_NULL;
130	}
131
132	/*
133	 * Certain reserved fields are required to be set to 0, ensure they are
134	 * set as such.
135	 */
136	ptr->__reserved1 = 0x0;
137	ptr->__reserved2 = 0x0;
138}
139
140/* mkimage glue functions */
141static int zynqimage_verify_header(unsigned char *ptr, int image_size,
142		struct image_tool_params *params)
143{
144	struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
145
146	if (image_size < sizeof(struct zynq_header))
147		return -1;
148
149	if (zynqhdr->__reserved1 != 0)
150		return -1;
151
152	if (zynqhdr->__reserved2 != 0)
153		return -1;
154
155	if (zynqhdr->width_detection != HEADER_WIDTHDETECTION)
156		return -1;
157	if (zynqhdr->image_identifier != HEADER_IMAGEIDENTIFIER)
158		return -1;
159
160	if (zynqimage_checksum(zynqhdr) != zynqhdr->checksum)
161		return -1;
162
163	return 0;
164}
165
166static void zynqimage_print_header(const void *ptr, struct image_tool_params *params)
167{
168	struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
169	int i;
170
171	printf("Image Type   : Xilinx Zynq Boot Image support\n");
172	printf("Image Offset : 0x%08x\n", le32_to_cpu(zynqhdr->image_offset));
173	printf("Image Size   : %lu bytes (%lu bytes packed)\n",
174	       (unsigned long)le32_to_cpu(zynqhdr->image_size),
175	       (unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
176	printf("Image Load   : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
177	printf("User Field   : 0x%08x\n", le32_to_cpu(zynqhdr->user_field));
178	printf("Checksum     : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
179
180	for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++) {
181		if (zynqhdr->interrupt_vectors[i] == HEADER_INTERRUPT_DEFAULT)
182			continue;
183
184		printf("Modified Interrupt Vector Address [%d]: 0x%08x\n", i,
185		       le32_to_cpu(zynqhdr->interrupt_vectors[i]));
186	}
187
188	for (i = 0; i < HEADER_REGINITS; i++) {
189		if (zynqhdr->register_init[i].address == HEADER_REGINIT_NULL)
190			break;
191
192		if (i == 0)
193			printf("Custom Register Initialization:\n");
194
195		printf("    @ 0x%08x -> 0x%08x\n",
196		       le32_to_cpu(zynqhdr->register_init[i].address),
197		       le32_to_cpu(zynqhdr->register_init[i].data));
198	}
199}
200
201static int zynqimage_check_params(struct image_tool_params *params)
202{
203	if (!params)
204		return 0;
205
206	if (params->addr != 0x0) {
207		fprintf(stderr, "Error: Load Address cannot be specified.\n");
208		return -1;
209	}
210
211	/*
212	 * If the entry point is specified ensure it is 64 byte aligned.
213	 */
214	if (params->eflag && (params->ep % 64 != 0)) {
215		fprintf(stderr,
216			"Error: Entry Point must be aligned to a 64-byte boundary.\n");
217		return -1;
218	}
219
220	return !(params->lflag || params->dflag);
221}
222
223static int zynqimage_check_image_types(uint8_t type)
224{
225	if (type == IH_TYPE_ZYNQIMAGE)
226		return EXIT_SUCCESS;
227	return EXIT_FAILURE;
228}
229
230static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
231	const char *filename)
232{
233	FILE *fp;
234	struct zynq_reginit reginit;
235	unsigned int reg_count = 0;
236	int r, err;
237	struct stat path_stat;
238
239	/* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
240	fp = fopen(filename, "r");
241	if (!fp) {
242		fprintf(stderr, "Cannot open initparams file: %s\n", filename);
243		exit(1);
244	}
245
246	err = fstat(fileno(fp), &path_stat);
247	if (err) {
248		fclose(fp);
249		return;
250	}
251
252	if (!S_ISREG(path_stat.st_mode)) {
253		fclose(fp);
254		return;
255	}
256
257	do {
258		r = fscanf(fp, "%x %x", &reginit.address, &reginit.data);
259		if (r == 2) {
260			zynqhdr->register_init[reg_count] = reginit;
261			++reg_count;
262		}
263		r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
264	} while ((r != EOF) && (reg_count < HEADER_REGINITS));
265	fclose(fp);
266}
267
268static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
269		struct image_tool_params *params)
270{
271	struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
272	zynqimage_default_header(zynqhdr);
273
274	/* place image directly after header */
275	zynqhdr->image_offset =
276		cpu_to_le32((uint32_t)sizeof(struct zynq_header));
277	zynqhdr->image_size = cpu_to_le32((uint32_t)sbuf->st_size);
278	zynqhdr->image_stored_size = zynqhdr->image_size;
279	zynqhdr->image_load = 0x0;
280	if (params->eflag)
281		zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
282
283	/* User can pass in text file with init list */
284	if (strlen(params->imagename2))
285		zynqimage_parse_initparams(zynqhdr, params->imagename2);
286
287	zynqhdr->checksum = zynqimage_checksum(zynqhdr);
288}
289
290U_BOOT_IMAGE_TYPE(
291	zynqimage,
292	"Xilinx Zynq Boot Image support",
293	sizeof(struct zynq_header),
294	(void *)&zynqimage_header,
295	zynqimage_check_params,
296	zynqimage_verify_header,
297	zynqimage_print_header,
298	zynqimage_set_header,
299	NULL,
300	zynqimage_check_image_types,
301	NULL,
302	NULL
303);
304