1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (c) 2011 The Chromium OS Authors. 4 * 5 * NOTE: Please do not add new devicetree-reading functionality into this file. 6 * Add it to the ofnode API instead, since that is compatible with livetree. 7 */ 8 9#ifndef USE_HOSTCC 10 11#define LOG_CATEGORY LOGC_DT 12 13#include <bloblist.h> 14#include <boot_fit.h> 15#include <display_options.h> 16#include <dm.h> 17#include <hang.h> 18#include <init.h> 19#include <log.h> 20#include <malloc.h> 21#include <net.h> 22#include <spl.h> 23#include <env.h> 24#include <errno.h> 25#include <fdtdec.h> 26#include <fdt_support.h> 27#include <gzip.h> 28#include <mapmem.h> 29#include <linux/libfdt.h> 30#include <serial.h> 31#include <asm/global_data.h> 32#include <asm/sections.h> 33#include <dm/ofnode.h> 34#include <dm/of_extra.h> 35#include <linux/ctype.h> 36#include <linux/lzo.h> 37#include <linux/ioport.h> 38 39DECLARE_GLOBAL_DATA_PTR; 40 41/* 42 * Here are the type we know about. One day we might allow drivers to 43 * register. For now we just put them here. The COMPAT macro allows us to 44 * turn this into a sparse list later, and keeps the ID with the name. 45 * 46 * NOTE: This list is basically a TODO list for things that need to be 47 * converted to driver model. So don't add new things here unless there is a 48 * good reason why driver-model conversion is infeasible. Examples include 49 * things which are used before driver model is available. 50 */ 51#define COMPAT(id, name) name 52static const char * const compat_names[COMPAT_COUNT] = { 53 COMPAT(UNKNOWN, "<none>"), 54 COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"), 55 COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"), 56 COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"), 57 COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"), 58 COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"), 59 COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"), 60 COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"), 61 COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"), 62 COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"), 63 COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"), 64 COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"), 65 COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), 66 COMPAT(INTEL_MICROCODE, "intel,microcode"), 67 COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"), 68 COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"), 69 COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"), 70 COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"), 71 COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"), 72 COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"), 73 COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"), 74 COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"), 75 COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"), 76 COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"), 77 COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"), 78 COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"), 79 COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"), 80 COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"), 81 COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"), 82 COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"), 83 COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"), 84 COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init") 85}; 86 87static const char *const fdt_src_name[] = { 88 [FDTSRC_SEPARATE] = "separate", 89 [FDTSRC_FIT] = "fit", 90 [FDTSRC_BOARD] = "board", 91 [FDTSRC_EMBED] = "embed", 92 [FDTSRC_ENV] = "env", 93 [FDTSRC_BLOBLIST] = "bloblist", 94}; 95 96const char *fdtdec_get_srcname(void) 97{ 98 return fdt_src_name[gd->fdt_src]; 99} 100 101const char *fdtdec_get_compatible(enum fdt_compat_id id) 102{ 103 /* We allow reading of the 'unknown' ID for testing purposes */ 104 assert(id >= 0 && id < COMPAT_COUNT); 105 return compat_names[id]; 106} 107 108fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node, 109 const char *prop_name, int index, int na, 110 int ns, fdt_size_t *sizep, 111 bool translate) 112{ 113 const fdt32_t *prop, *prop_end; 114 const fdt32_t *prop_addr, *prop_size, *prop_after_size; 115 int len; 116 fdt_addr_t addr; 117 118 debug("%s: %s: ", __func__, prop_name); 119 120 prop = fdt_getprop(blob, node, prop_name, &len); 121 if (!prop) { 122 debug("(not found)\n"); 123 return FDT_ADDR_T_NONE; 124 } 125 prop_end = prop + (len / sizeof(*prop)); 126 127 prop_addr = prop + (index * (na + ns)); 128 prop_size = prop_addr + na; 129 prop_after_size = prop_size + ns; 130 if (prop_after_size > prop_end) { 131 debug("(not enough data: expected >= %d cells, got %d cells)\n", 132 (u32)(prop_after_size - prop), ((u32)(prop_end - prop))); 133 return FDT_ADDR_T_NONE; 134 } 135 136#if CONFIG_IS_ENABLED(OF_TRANSLATE) 137 if (translate) 138 addr = fdt_translate_address(blob, node, prop_addr); 139 else 140#endif 141 addr = fdtdec_get_number(prop_addr, na); 142 143 if (sizep) { 144 *sizep = fdtdec_get_number(prop_size, ns); 145 debug("addr=%08llx, size=%llx\n", (unsigned long long)addr, 146 (unsigned long long)*sizep); 147 } else { 148 debug("addr=%08llx\n", (unsigned long long)addr); 149 } 150 151 return addr; 152} 153 154fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent, 155 int node, const char *prop_name, 156 int index, fdt_size_t *sizep, 157 bool translate) 158{ 159 int na, ns; 160 161 debug("%s: ", __func__); 162 163 na = fdt_address_cells(blob, parent); 164 if (na < 1) { 165 debug("(bad #address-cells)\n"); 166 return FDT_ADDR_T_NONE; 167 } 168 169 ns = fdt_size_cells(blob, parent); 170 if (ns < 0) { 171 debug("(bad #size-cells)\n"); 172 return FDT_ADDR_T_NONE; 173 } 174 175 debug("na=%d, ns=%d, ", na, ns); 176 177 return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na, 178 ns, sizep, translate); 179} 180 181fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node, 182 const char *prop_name, int index, 183 fdt_size_t *sizep, 184 bool translate) 185{ 186 int parent; 187 188 debug("%s: ", __func__); 189 190 parent = fdt_parent_offset(blob, node); 191 if (parent < 0) { 192 debug("(no parent found)\n"); 193 return FDT_ADDR_T_NONE; 194 } 195 196 return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name, 197 index, sizep, translate); 198} 199 200fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, 201 const char *prop_name, fdt_size_t *sizep) 202{ 203 int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0; 204 205 return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0, 206 sizeof(fdt_addr_t) / sizeof(fdt32_t), 207 ns, sizep, false); 208} 209 210fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name) 211{ 212 return fdtdec_get_addr_size(blob, node, prop_name, NULL); 213} 214 215int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) 216{ 217 const char *list, *end; 218 int len; 219 220 list = fdt_getprop(blob, node, "compatible", &len); 221 if (!list) 222 return -ENOENT; 223 224 end = list + len; 225 while (list < end) { 226 len = strlen(list); 227 if (len >= strlen("pciVVVV,DDDD")) { 228 char *s = strstr(list, "pci"); 229 230 /* 231 * check if the string is something like pciVVVV,DDDD.RR 232 * or just pciVVVV,DDDD 233 */ 234 if (s && s[7] == ',' && 235 (s[12] == '.' || s[12] == 0)) { 236 s += 3; 237 *vendor = simple_strtol(s, NULL, 16); 238 239 s += 5; 240 *device = simple_strtol(s, NULL, 16); 241 242 return 0; 243 } 244 } 245 list += (len + 1); 246 } 247 248 return -ENOENT; 249} 250 251int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr, 252 u32 *bar) 253{ 254 int barnum; 255 256 /* extract the bar number from fdt_pci_addr */ 257 barnum = addr->phys_hi & 0xff; 258 if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS) 259 return -EINVAL; 260 261 barnum = (barnum - PCI_BASE_ADDRESS_0) / 4; 262 263 *bar = dm_pci_read_bar32(dev, barnum); 264 265 return 0; 266} 267 268int fdtdec_get_pci_bus_range(const void *blob, int node, 269 struct fdt_resource *res) 270{ 271 const u32 *values; 272 int len; 273 274 values = fdt_getprop(blob, node, "bus-range", &len); 275 if (!values || len < sizeof(*values) * 2) 276 return -EINVAL; 277 278 res->start = fdt32_to_cpu(*values++); 279 res->end = fdt32_to_cpu(*values); 280 281 return 0; 282} 283 284uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name, 285 uint64_t default_val) 286{ 287 const unaligned_fdt64_t *cell64; 288 int length; 289 290 cell64 = fdt_getprop(blob, node, prop_name, &length); 291 if (!cell64 || length < sizeof(*cell64)) 292 return default_val; 293 294 return fdt64_to_cpu(*cell64); 295} 296 297int fdtdec_get_is_enabled(const void *blob, int node) 298{ 299 const char *cell; 300 301 /* 302 * It should say "okay", so only allow that. Some fdts use "ok" but 303 * this is a bug. Please fix your device tree source file. See here 304 * for discussion: 305 * 306 * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html 307 */ 308 cell = fdt_getprop(blob, node, "status", NULL); 309 if (cell) 310 return strcmp(cell, "okay") == 0; 311 return 1; 312} 313 314enum fdt_compat_id fdtdec_lookup(const void *blob, int node) 315{ 316 enum fdt_compat_id id; 317 318 /* Search our drivers */ 319 for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++) 320 if (fdt_node_check_compatible(blob, node, 321 compat_names[id]) == 0) 322 return id; 323 return COMPAT_UNKNOWN; 324} 325 326int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id) 327{ 328 return fdt_node_offset_by_compatible(blob, node, compat_names[id]); 329} 330 331int fdtdec_next_compatible_subnode(const void *blob, int node, 332 enum fdt_compat_id id, int *depthp) 333{ 334 do { 335 node = fdt_next_node(blob, node, depthp); 336 } while (*depthp > 1); 337 338 /* If this is a direct subnode, and compatible, return it */ 339 if (*depthp == 1 && 0 == fdt_node_check_compatible( 340 blob, node, compat_names[id])) 341 return node; 342 343 return -FDT_ERR_NOTFOUND; 344} 345 346int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id, 347 int *upto) 348{ 349#define MAX_STR_LEN 20 350 char str[MAX_STR_LEN + 20]; 351 int node, err; 352 353 /* snprintf() is not available */ 354 assert(strlen(name) < MAX_STR_LEN); 355 sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto); 356 node = fdt_path_offset(blob, str); 357 if (node < 0) 358 return node; 359 err = fdt_node_check_compatible(blob, node, compat_names[id]); 360 if (err < 0) 361 return err; 362 if (err) 363 return -FDT_ERR_NOTFOUND; 364 (*upto)++; 365 return node; 366} 367 368int fdtdec_find_aliases_for_id(const void *blob, const char *name, 369 enum fdt_compat_id id, int *node_list, 370 int maxcount) 371{ 372 memset(node_list, '\0', sizeof(*node_list) * maxcount); 373 374 return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount); 375} 376 377/* TODO: Can we tighten this code up a little? */ 378int fdtdec_add_aliases_for_id(const void *blob, const char *name, 379 enum fdt_compat_id id, int *node_list, 380 int maxcount) 381{ 382 int name_len = strlen(name); 383 int nodes[maxcount]; 384 int num_found = 0; 385 int offset, node; 386 int alias_node; 387 int count; 388 int i, j; 389 390 /* find the alias node if present */ 391 alias_node = fdt_path_offset(blob, "/aliases"); 392 393 /* 394 * start with nothing, and we can assume that the root node can't 395 * match 396 */ 397 memset(nodes, '\0', sizeof(nodes)); 398 399 /* First find all the compatible nodes */ 400 for (node = count = 0; node >= 0 && count < maxcount;) { 401 node = fdtdec_next_compatible(blob, node, id); 402 if (node >= 0) 403 nodes[count++] = node; 404 } 405 if (node >= 0) 406 debug("%s: warning: maxcount exceeded with alias '%s'\n", 407 __func__, name); 408 409 /* Now find all the aliases */ 410 for (offset = fdt_first_property_offset(blob, alias_node); 411 offset > 0; 412 offset = fdt_next_property_offset(blob, offset)) { 413 const struct fdt_property *prop; 414 const char *path; 415 int number; 416 int found; 417 418 node = 0; 419 prop = fdt_get_property_by_offset(blob, offset, NULL); 420 path = fdt_string(blob, fdt32_to_cpu(prop->nameoff)); 421 if (prop->len && 0 == strncmp(path, name, name_len)) 422 node = fdt_path_offset(blob, prop->data); 423 if (node <= 0) 424 continue; 425 426 /* Get the alias number */ 427 number = dectoul(path + name_len, NULL); 428 if (number < 0 || number >= maxcount) { 429 debug("%s: warning: alias '%s' is out of range\n", 430 __func__, path); 431 continue; 432 } 433 434 /* Make sure the node we found is actually in our list! */ 435 found = -1; 436 for (j = 0; j < count; j++) 437 if (nodes[j] == node) { 438 found = j; 439 break; 440 } 441 442 if (found == -1) { 443 debug("%s: warning: alias '%s' points to a node " 444 "'%s' that is missing or is not compatible " 445 " with '%s'\n", __func__, path, 446 fdt_get_name(blob, node, NULL), 447 compat_names[id]); 448 continue; 449 } 450 451 /* 452 * Add this node to our list in the right place, and mark 453 * it as done. 454 */ 455 if (fdtdec_get_is_enabled(blob, node)) { 456 if (node_list[number]) { 457 debug("%s: warning: alias '%s' requires that " 458 "a node be placed in the list in a " 459 "position which is already filled by " 460 "node '%s'\n", __func__, path, 461 fdt_get_name(blob, node, NULL)); 462 continue; 463 } 464 node_list[number] = node; 465 if (number >= num_found) 466 num_found = number + 1; 467 } 468 nodes[found] = 0; 469 } 470 471 /* Add any nodes not mentioned by an alias */ 472 for (i = j = 0; i < maxcount; i++) { 473 if (!node_list[i]) { 474 for (; j < maxcount; j++) 475 if (nodes[j] && 476 fdtdec_get_is_enabled(blob, nodes[j])) 477 break; 478 479 /* Have we run out of nodes to add? */ 480 if (j == maxcount) 481 break; 482 483 assert(!node_list[i]); 484 node_list[i] = nodes[j++]; 485 if (i >= num_found) 486 num_found = i + 1; 487 } 488 } 489 490 return num_found; 491} 492 493int fdtdec_get_alias_seq(const void *blob, const char *base, int offset, 494 int *seqp) 495{ 496 int base_len = strlen(base); 497 const char *find_name; 498 int find_namelen; 499 int prop_offset; 500 int aliases; 501 502 find_name = fdt_get_name(blob, offset, &find_namelen); 503 debug("Looking for '%s' at %d, name %s\n", base, offset, find_name); 504 505 aliases = fdt_path_offset(blob, "/aliases"); 506 for (prop_offset = fdt_first_property_offset(blob, aliases); 507 prop_offset > 0; 508 prop_offset = fdt_next_property_offset(blob, prop_offset)) { 509 const char *prop; 510 const char *name; 511 const char *slash; 512 int len, val; 513 514 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); 515 debug(" - %s, %s\n", name, prop); 516 if (len < find_namelen || *prop != '/' || prop[len - 1] || 517 strncmp(name, base, base_len)) 518 continue; 519 520 slash = strrchr(prop, '/'); 521 if (strcmp(slash + 1, find_name)) 522 continue; 523 524 /* 525 * Adding an extra check to distinguish DT nodes with 526 * same name 527 */ 528 if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) { 529 if (fdt_get_phandle(blob, offset) != 530 fdt_get_phandle(blob, fdt_path_offset(blob, prop))) 531 continue; 532 } 533 534 val = trailing_strtol(name); 535 if (val != -1) { 536 *seqp = val; 537 debug("Found seq %d\n", *seqp); 538 return 0; 539 } 540 } 541 542 debug("Not found\n"); 543 return -ENOENT; 544} 545 546int fdtdec_get_alias_highest_id(const void *blob, const char *base) 547{ 548 int base_len = strlen(base); 549 int prop_offset; 550 int aliases; 551 int max = -1; 552 553 debug("Looking for highest alias id for '%s'\n", base); 554 555 aliases = fdt_path_offset(blob, "/aliases"); 556 for (prop_offset = fdt_first_property_offset(blob, aliases); 557 prop_offset > 0; 558 prop_offset = fdt_next_property_offset(blob, prop_offset)) { 559 const char *prop; 560 const char *name; 561 int len, val; 562 563 prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len); 564 debug(" - %s, %s\n", name, prop); 565 if (*prop != '/' || prop[len - 1] || 566 strncmp(name, base, base_len)) 567 continue; 568 569 val = trailing_strtol(name); 570 if (val > max) { 571 debug("Found seq %d\n", val); 572 max = val; 573 } 574 } 575 576 return max; 577} 578 579const char *fdtdec_get_chosen_prop(const void *blob, const char *name) 580{ 581 int chosen_node; 582 583 if (!blob) 584 return NULL; 585 chosen_node = fdt_path_offset(blob, "/chosen"); 586 return fdt_getprop(blob, chosen_node, name, NULL); 587} 588 589int fdtdec_get_chosen_node(const void *blob, const char *name) 590{ 591 const char *prop; 592 593 prop = fdtdec_get_chosen_prop(blob, name); 594 if (!prop) 595 return -FDT_ERR_NOTFOUND; 596 return fdt_path_offset(blob, prop); 597} 598 599/** 600 * fdtdec_prepare_fdt() - Check we have a valid fdt available to control U-Boot 601 * 602 * @blob: Blob to check 603 * 604 * If not, a message is printed to the console if the console is ready. 605 * 606 * Return: 0 if all ok, -ENOENT if not 607 */ 608static int fdtdec_prepare_fdt(const void *blob) 609{ 610 if (!blob || ((uintptr_t)blob & 3) || fdt_check_header(blob)) { 611 if (spl_phase() <= PHASE_SPL) { 612 puts("Missing DTB\n"); 613 } else { 614 printf("No valid device tree binary found at %p\n", 615 blob); 616 if (_DEBUG && blob) { 617 printf("fdt_blob=%p\n", blob); 618 print_buffer((ulong)blob, blob, 4, 32, 0); 619 } 620 } 621 return -ENOENT; 622 } 623 624 return 0; 625} 626 627int fdtdec_check_fdt(void) 628{ 629 /* 630 * We must have an FDT, but we cannot panic() yet since the console 631 * is not ready. So for now, just assert(). Boards which need an early 632 * FDT (prior to console ready) will need to make their own 633 * arrangements and do their own checks. 634 */ 635 assert(!fdtdec_prepare_fdt(gd->fdt_blob)); 636 return 0; 637} 638 639int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name) 640{ 641 const u32 *phandle; 642 int lookup; 643 644 debug("%s: %s\n", __func__, prop_name); 645 phandle = fdt_getprop(blob, node, prop_name, NULL); 646 if (!phandle) 647 return -FDT_ERR_NOTFOUND; 648 649 lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle)); 650 return lookup; 651} 652 653/** 654 * Look up a property in a node and check that it has a minimum length. 655 * 656 * @param blob FDT blob 657 * @param node node to examine 658 * @param prop_name name of property to find 659 * @param min_len minimum property length in bytes 660 * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not 661 found, or -FDT_ERR_BADLAYOUT if not enough data 662 * Return: pointer to cell, which is only valid if err == 0 663 */ 664static const void *get_prop_check_min_len(const void *blob, int node, 665 const char *prop_name, int min_len, 666 int *err) 667{ 668 const void *cell; 669 int len; 670 671 debug("%s: %s\n", __func__, prop_name); 672 cell = fdt_getprop(blob, node, prop_name, &len); 673 if (!cell) 674 *err = -FDT_ERR_NOTFOUND; 675 else if (len < min_len) 676 *err = -FDT_ERR_BADLAYOUT; 677 else 678 *err = 0; 679 return cell; 680} 681 682int fdtdec_get_int_array(const void *blob, int node, const char *prop_name, 683 u32 *array, int count) 684{ 685 const u32 *cell; 686 int err = 0; 687 688 debug("%s: %s\n", __func__, prop_name); 689 cell = get_prop_check_min_len(blob, node, prop_name, 690 sizeof(u32) * count, &err); 691 if (!err) { 692 int i; 693 694 for (i = 0; i < count; i++) 695 array[i] = fdt32_to_cpu(cell[i]); 696 } 697 return err; 698} 699 700int fdtdec_get_int_array_count(const void *blob, int node, 701 const char *prop_name, u32 *array, int count) 702{ 703 const u32 *cell; 704 int len, elems; 705 int i; 706 707 debug("%s: %s\n", __func__, prop_name); 708 cell = fdt_getprop(blob, node, prop_name, &len); 709 if (!cell) 710 return -FDT_ERR_NOTFOUND; 711 elems = len / sizeof(u32); 712 if (count > elems) 713 count = elems; 714 for (i = 0; i < count; i++) 715 array[i] = fdt32_to_cpu(cell[i]); 716 717 return count; 718} 719 720const u32 *fdtdec_locate_array(const void *blob, int node, 721 const char *prop_name, int count) 722{ 723 const u32 *cell; 724 int err; 725 726 cell = get_prop_check_min_len(blob, node, prop_name, 727 sizeof(u32) * count, &err); 728 return err ? NULL : cell; 729} 730 731int fdtdec_get_bool(const void *blob, int node, const char *prop_name) 732{ 733 const s32 *cell; 734 int len; 735 736 debug("%s: %s\n", __func__, prop_name); 737 cell = fdt_getprop(blob, node, prop_name, &len); 738 return cell != NULL; 739} 740 741int fdtdec_parse_phandle_with_args(const void *blob, int src_node, 742 const char *list_name, 743 const char *cells_name, 744 int cell_count, int index, 745 struct fdtdec_phandle_args *out_args) 746{ 747 const __be32 *list, *list_end; 748 int rc = 0, size, cur_index = 0; 749 uint32_t count = 0; 750 int node = -1; 751 int phandle; 752 753 /* Retrieve the phandle list property */ 754 list = fdt_getprop(blob, src_node, list_name, &size); 755 if (!list) 756 return -ENOENT; 757 list_end = list + size / sizeof(*list); 758 759 /* Loop over the phandles until all the requested entry is found */ 760 while (list < list_end) { 761 rc = -EINVAL; 762 count = 0; 763 764 /* 765 * If phandle is 0, then it is an empty entry with no 766 * arguments. Skip forward to the next entry. 767 */ 768 phandle = be32_to_cpup(list++); 769 if (phandle) { 770 /* 771 * Find the provider node and parse the #*-cells 772 * property to determine the argument length. 773 * 774 * This is not needed if the cell count is hard-coded 775 * (i.e. cells_name not set, but cell_count is set), 776 * except when we're going to return the found node 777 * below. 778 */ 779 if (cells_name || cur_index == index) { 780 node = fdt_node_offset_by_phandle(blob, 781 phandle); 782 if (node < 0) { 783 debug("%s: could not find phandle\n", 784 fdt_get_name(blob, src_node, 785 NULL)); 786 goto err; 787 } 788 } 789 790 if (cells_name) { 791 count = fdtdec_get_int(blob, node, cells_name, 792 -1); 793 if (count == -1) { 794 debug("%s: could not get %s for %s\n", 795 fdt_get_name(blob, src_node, 796 NULL), 797 cells_name, 798 fdt_get_name(blob, node, 799 NULL)); 800 goto err; 801 } 802 } else { 803 count = cell_count; 804 } 805 806 /* 807 * Make sure that the arguments actually fit in the 808 * remaining property data length 809 */ 810 if (list + count > list_end) { 811 debug("%s: arguments longer than property\n", 812 fdt_get_name(blob, src_node, NULL)); 813 goto err; 814 } 815 } 816 817 /* 818 * All of the error cases above bail out of the loop, so at 819 * this point, the parsing is successful. If the requested 820 * index matches, then fill the out_args structure and return, 821 * or return -ENOENT for an empty entry. 822 */ 823 rc = -ENOENT; 824 if (cur_index == index) { 825 if (!phandle) 826 goto err; 827 828 if (out_args) { 829 int i; 830 831 if (count > MAX_PHANDLE_ARGS) { 832 debug("%s: too many arguments %d\n", 833 fdt_get_name(blob, src_node, 834 NULL), count); 835 count = MAX_PHANDLE_ARGS; 836 } 837 out_args->node = node; 838 out_args->args_count = count; 839 for (i = 0; i < count; i++) { 840 out_args->args[i] = 841 be32_to_cpup(list++); 842 } 843 } 844 845 /* Found it! return success */ 846 return 0; 847 } 848 849 node = -1; 850 list += count; 851 cur_index++; 852 } 853 854 /* 855 * Result will be one of: 856 * -ENOENT : index is for empty phandle 857 * -EINVAL : parsing error on data 858 * [1..n] : Number of phandle (count mode; when index = -1) 859 */ 860 rc = index < 0 ? cur_index : -ENOENT; 861 err: 862 return rc; 863} 864 865int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name, 866 u8 *array, int count) 867{ 868 const u8 *cell; 869 int err; 870 871 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 872 if (!err) 873 memcpy(array, cell, count); 874 return err; 875} 876 877const u8 *fdtdec_locate_byte_array(const void *blob, int node, 878 const char *prop_name, int count) 879{ 880 const u8 *cell; 881 int err; 882 883 cell = get_prop_check_min_len(blob, node, prop_name, count, &err); 884 if (err) 885 return NULL; 886 return cell; 887} 888 889u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells) 890{ 891 u64 number = 0; 892 893 while (cells--) 894 number = (number << 32) | fdt32_to_cpu(*ptr++); 895 896 return number; 897} 898 899int fdt_get_resource(const void *fdt, int node, const char *property, 900 unsigned int index, struct fdt_resource *res) 901{ 902 const fdt32_t *ptr, *end; 903 int na, ns, len, parent; 904 unsigned int i = 0; 905 906 parent = fdt_parent_offset(fdt, node); 907 if (parent < 0) 908 return parent; 909 910 na = fdt_address_cells(fdt, parent); 911 ns = fdt_size_cells(fdt, parent); 912 913 ptr = fdt_getprop(fdt, node, property, &len); 914 if (!ptr) 915 return len; 916 917 end = ptr + len / sizeof(*ptr); 918 919 while (ptr + na + ns <= end) { 920 if (i == index) { 921 if (CONFIG_IS_ENABLED(OF_TRANSLATE)) 922 res->start = fdt_translate_address(fdt, node, ptr); 923 else 924 res->start = fdtdec_get_number(ptr, na); 925 926 res->end = res->start; 927 res->end += fdtdec_get_number(&ptr[na], ns) - 1; 928 return 0; 929 } 930 931 ptr += na + ns; 932 i++; 933 } 934 935 return -FDT_ERR_NOTFOUND; 936} 937 938int fdt_get_named_resource(const void *fdt, int node, const char *property, 939 const char *prop_names, const char *name, 940 struct fdt_resource *res) 941{ 942 int index; 943 944 index = fdt_stringlist_search(fdt, node, prop_names, name); 945 if (index < 0) 946 return index; 947 948 return fdt_get_resource(fdt, node, property, index, res); 949} 950 951static int decode_timing_property(const void *blob, int node, const char *name, 952 struct timing_entry *result) 953{ 954 int length, ret = 0; 955 const u32 *prop; 956 957 prop = fdt_getprop(blob, node, name, &length); 958 if (!prop) { 959 debug("%s: could not find property %s\n", 960 fdt_get_name(blob, node, NULL), name); 961 return length; 962 } 963 964 if (length == sizeof(u32)) { 965 result->typ = fdtdec_get_int(blob, node, name, 0); 966 result->min = result->typ; 967 result->max = result->typ; 968 } else { 969 ret = fdtdec_get_int_array(blob, node, name, &result->min, 3); 970 } 971 972 return ret; 973} 974 975int fdtdec_decode_display_timing(const void *blob, int parent, int index, 976 struct display_timing *dt) 977{ 978 int i, node, timings_node; 979 u32 val = 0; 980 int ret = 0; 981 982 timings_node = fdt_subnode_offset(blob, parent, "display-timings"); 983 if (timings_node < 0) 984 return timings_node; 985 986 for (i = 0, node = fdt_first_subnode(blob, timings_node); 987 node > 0 && i != index; 988 node = fdt_next_subnode(blob, node)) 989 i++; 990 991 if (node < 0) 992 return node; 993 994 memset(dt, 0, sizeof(*dt)); 995 996 ret |= decode_timing_property(blob, node, "hback-porch", 997 &dt->hback_porch); 998 ret |= decode_timing_property(blob, node, "hfront-porch", 999 &dt->hfront_porch); 1000 ret |= decode_timing_property(blob, node, "hactive", &dt->hactive); 1001 ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len); 1002 ret |= decode_timing_property(blob, node, "vback-porch", 1003 &dt->vback_porch); 1004 ret |= decode_timing_property(blob, node, "vfront-porch", 1005 &dt->vfront_porch); 1006 ret |= decode_timing_property(blob, node, "vactive", &dt->vactive); 1007 ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len); 1008 ret |= decode_timing_property(blob, node, "clock-frequency", 1009 &dt->pixelclock); 1010 1011 dt->flags = 0; 1012 val = fdtdec_get_int(blob, node, "vsync-active", -1); 1013 if (val != -1) { 1014 dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH : 1015 DISPLAY_FLAGS_VSYNC_LOW; 1016 } 1017 val = fdtdec_get_int(blob, node, "hsync-active", -1); 1018 if (val != -1) { 1019 dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH : 1020 DISPLAY_FLAGS_HSYNC_LOW; 1021 } 1022 val = fdtdec_get_int(blob, node, "de-active", -1); 1023 if (val != -1) { 1024 dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH : 1025 DISPLAY_FLAGS_DE_LOW; 1026 } 1027 val = fdtdec_get_int(blob, node, "pixelclk-active", -1); 1028 if (val != -1) { 1029 dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE : 1030 DISPLAY_FLAGS_PIXDATA_NEGEDGE; 1031 } 1032 1033 if (fdtdec_get_bool(blob, node, "interlaced")) 1034 dt->flags |= DISPLAY_FLAGS_INTERLACED; 1035 if (fdtdec_get_bool(blob, node, "doublescan")) 1036 dt->flags |= DISPLAY_FLAGS_DOUBLESCAN; 1037 if (fdtdec_get_bool(blob, node, "doubleclk")) 1038 dt->flags |= DISPLAY_FLAGS_DOUBLECLK; 1039 1040 return ret; 1041} 1042 1043int fdtdec_setup_mem_size_base(void) 1044{ 1045 int ret; 1046 ofnode mem; 1047 struct resource res; 1048 1049 mem = ofnode_path("/memory"); 1050 if (!ofnode_valid(mem)) { 1051 debug("%s: Missing /memory node\n", __func__); 1052 return -EINVAL; 1053 } 1054 1055 ret = ofnode_read_resource(mem, 0, &res); 1056 if (ret != 0) { 1057 debug("%s: Unable to decode first memory bank\n", __func__); 1058 return -EINVAL; 1059 } 1060 1061 gd->ram_size = (phys_size_t)(res.end - res.start + 1); 1062 gd->ram_base = (unsigned long)res.start; 1063 debug("%s: Initial DRAM size %llx\n", __func__, 1064 (unsigned long long)gd->ram_size); 1065 1066 return 0; 1067} 1068 1069ofnode get_next_memory_node(ofnode mem) 1070{ 1071 do { 1072 mem = ofnode_by_prop_value(mem, "device_type", "memory", 7); 1073 } while (!ofnode_is_enabled(mem)); 1074 1075 return mem; 1076} 1077 1078int fdtdec_setup_memory_banksize(void) 1079{ 1080 int bank, ret, reg = 0; 1081 struct resource res; 1082 ofnode mem = ofnode_null(); 1083 1084 mem = get_next_memory_node(mem); 1085 if (!ofnode_valid(mem)) { 1086 debug("%s: Missing /memory node\n", __func__); 1087 return -EINVAL; 1088 } 1089 1090 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 1091 ret = ofnode_read_resource(mem, reg++, &res); 1092 if (ret < 0) { 1093 reg = 0; 1094 mem = get_next_memory_node(mem); 1095 if (!ofnode_valid(mem)) 1096 break; 1097 1098 ret = ofnode_read_resource(mem, reg++, &res); 1099 if (ret < 0) 1100 break; 1101 } 1102 1103 if (ret != 0) 1104 return -EINVAL; 1105 1106 gd->bd->bi_dram[bank].start = (phys_addr_t)res.start; 1107 gd->bd->bi_dram[bank].size = 1108 (phys_size_t)(res.end - res.start + 1); 1109 1110 debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n", 1111 __func__, bank, 1112 (unsigned long long)gd->bd->bi_dram[bank].start, 1113 (unsigned long long)gd->bd->bi_dram[bank].size); 1114 } 1115 1116 return 0; 1117} 1118 1119int fdtdec_setup_mem_size_base_lowest(void) 1120{ 1121 int bank, ret, reg = 0; 1122 struct resource res; 1123 unsigned long base; 1124 phys_size_t size; 1125 ofnode mem = ofnode_null(); 1126 1127 gd->ram_base = (unsigned long)~0; 1128 1129 mem = get_next_memory_node(mem); 1130 if (!ofnode_valid(mem)) { 1131 debug("%s: Missing /memory node\n", __func__); 1132 return -EINVAL; 1133 } 1134 1135 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 1136 ret = ofnode_read_resource(mem, reg++, &res); 1137 if (ret < 0) { 1138 reg = 0; 1139 mem = get_next_memory_node(mem); 1140 if (!ofnode_valid(mem)) 1141 break; 1142 1143 ret = ofnode_read_resource(mem, reg++, &res); 1144 if (ret < 0) 1145 break; 1146 } 1147 1148 if (ret != 0) 1149 return -EINVAL; 1150 1151 base = (unsigned long)res.start; 1152 size = (phys_size_t)(res.end - res.start + 1); 1153 1154 if (gd->ram_base > base && size) { 1155 gd->ram_base = base; 1156 gd->ram_size = size; 1157 debug("%s: Initial DRAM base %lx size %lx\n", 1158 __func__, base, (unsigned long)size); 1159 } 1160 } 1161 1162 return 0; 1163} 1164 1165static int uncompress_blob(const void *src, ulong sz_src, void **dstp) 1166{ 1167#if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\ 1168 CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO) 1169 size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ); 1170 bool gzip = 0, lzo = 0; 1171 ulong sz_in = sz_src; 1172 void *dst; 1173 int rc; 1174 1175 if (CONFIG_IS_ENABLED(GZIP)) 1176 if (gzip_parse_header(src, sz_in) >= 0) 1177 gzip = 1; 1178 if (CONFIG_IS_ENABLED(LZO)) 1179 if (!gzip && lzop_is_valid_header(src)) 1180 lzo = 1; 1181 1182 if (!gzip && !lzo) 1183 return -EBADMSG; 1184 1185 1186 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) { 1187 dst = malloc(sz_out); 1188 if (!dst) { 1189 puts("uncompress_blob: Unable to allocate memory\n"); 1190 return -ENOMEM; 1191 } 1192 } else { 1193# if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA) 1194 dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR); 1195# else 1196 return -ENOTSUPP; 1197# endif 1198 } 1199 1200 if (CONFIG_IS_ENABLED(GZIP) && gzip) 1201 rc = gunzip(dst, sz_out, (u8 *)src, &sz_in); 1202 else if (CONFIG_IS_ENABLED(LZO) && lzo) 1203 rc = lzop_decompress(src, sz_in, dst, &sz_out); 1204 else 1205 hang(); 1206 1207 if (rc < 0) { 1208 /* not a valid compressed blob */ 1209 puts("uncompress_blob: Unable to uncompress\n"); 1210 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) 1211 free(dst); 1212 return -EBADMSG; 1213 } 1214 *dstp = dst; 1215#else 1216 *dstp = (void *)src; 1217 *dstp = (void *)src; 1218#endif 1219 return 0; 1220} 1221 1222/** 1223 * fdt_find_separate() - Find a devicetree at the end of the image 1224 * 1225 * Return: pointer to FDT blob 1226 */ 1227static void *fdt_find_separate(void) 1228{ 1229 void *fdt_blob = NULL; 1230 1231 if (IS_ENABLED(CONFIG_SANDBOX)) 1232 return NULL; 1233 1234#ifdef CONFIG_SPL_BUILD 1235 /* FDT is at end of BSS unless it is in a different memory region */ 1236 if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS)) 1237 fdt_blob = (ulong *)_image_binary_end; 1238 else 1239 fdt_blob = (ulong *)__bss_end; 1240#else 1241 /* FDT is at end of image */ 1242 fdt_blob = (ulong *)_end; 1243 1244 if (_DEBUG && !fdtdec_prepare_fdt(fdt_blob)) { 1245 int stack_ptr; 1246 const void *top = fdt_blob + fdt_totalsize(fdt_blob); 1247 1248 /* 1249 * Perform a sanity check on the memory layout. If this fails, 1250 * it indicates that the device tree is positioned above the 1251 * global data pointer or the stack pointer. This should not 1252 * happen. 1253 * 1254 * If this fails, check that SYS_INIT_SP_ADDR has enough space 1255 * below it for SYS_MALLOC_F_LEN and global_data, as well as the 1256 * stack, without overwriting the device tree or U-Boot itself. 1257 * Since the device tree is sitting at _end (the start of the 1258 * BSS region), we need the top of the device tree to be below 1259 * any memory allocated by board_init_f_alloc_reserve(). 1260 */ 1261 if (top > (void *)gd || top > (void *)&stack_ptr) { 1262 printf("FDT %p gd %p\n", fdt_blob, gd); 1263 panic("FDT overlap"); 1264 } 1265 } 1266#endif 1267 1268 return fdt_blob; 1269} 1270 1271int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size) 1272{ 1273 const char *path; 1274 int offset, err; 1275 1276 if (!is_valid_ethaddr(mac)) 1277 return -EINVAL; 1278 1279 path = fdt_get_alias(fdt, "ethernet"); 1280 if (!path) 1281 return 0; 1282 1283 debug("ethernet alias found: %s\n", path); 1284 1285 offset = fdt_path_offset(fdt, path); 1286 if (offset < 0) { 1287 debug("ethernet alias points to absent node %s\n", path); 1288 return -ENOENT; 1289 } 1290 1291 err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size); 1292 if (err < 0) 1293 return err; 1294 1295 debug("MAC address: %pM\n", mac); 1296 1297 return 0; 1298} 1299 1300static int fdtdec_init_reserved_memory(void *blob) 1301{ 1302 int na, ns, node, err; 1303 fdt32_t value; 1304 1305 /* inherit #address-cells and #size-cells from the root node */ 1306 na = fdt_address_cells(blob, 0); 1307 ns = fdt_size_cells(blob, 0); 1308 1309 node = fdt_add_subnode(blob, 0, "reserved-memory"); 1310 if (node < 0) 1311 return node; 1312 1313 err = fdt_setprop(blob, node, "ranges", NULL, 0); 1314 if (err < 0) 1315 return err; 1316 1317 value = cpu_to_fdt32(ns); 1318 1319 err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value)); 1320 if (err < 0) 1321 return err; 1322 1323 value = cpu_to_fdt32(na); 1324 1325 err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value)); 1326 if (err < 0) 1327 return err; 1328 1329 return node; 1330} 1331 1332int fdtdec_add_reserved_memory(void *blob, const char *basename, 1333 const struct fdt_memory *carveout, 1334 const char **compatibles, unsigned int count, 1335 uint32_t *phandlep, unsigned long flags) 1336{ 1337 fdt32_t cells[4] = {}, *ptr = cells; 1338 uint32_t upper, lower, phandle; 1339 int parent, node, na, ns, err; 1340 fdt_size_t size; 1341 char name[64]; 1342 1343 /* create an empty /reserved-memory node if one doesn't exist */ 1344 parent = fdt_path_offset(blob, "/reserved-memory"); 1345 if (parent < 0) { 1346 parent = fdtdec_init_reserved_memory(blob); 1347 if (parent < 0) 1348 return parent; 1349 } 1350 1351 /* only 1 or 2 #address-cells and #size-cells are supported */ 1352 na = fdt_address_cells(blob, parent); 1353 if (na < 1 || na > 2) 1354 return -FDT_ERR_BADNCELLS; 1355 1356 ns = fdt_size_cells(blob, parent); 1357 if (ns < 1 || ns > 2) 1358 return -FDT_ERR_BADNCELLS; 1359 1360 /* find a matching node and return the phandle to that */ 1361 fdt_for_each_subnode(node, blob, parent) { 1362 const char *name = fdt_get_name(blob, node, NULL); 1363 fdt_addr_t addr; 1364 fdt_size_t size; 1365 1366 addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns, 1367 &size, false); 1368 if (addr == FDT_ADDR_T_NONE) { 1369 debug("failed to read address/size for %s\n", name); 1370 continue; 1371 } 1372 1373 if (addr == carveout->start && (addr + size - 1) == 1374 carveout->end) { 1375 if (phandlep) 1376 *phandlep = fdt_get_phandle(blob, node); 1377 return 0; 1378 } 1379 } 1380 1381 /* 1382 * Unpack the start address and generate the name of the new node 1383 * base on the basename and the unit-address. 1384 */ 1385 upper = upper_32_bits(carveout->start); 1386 lower = lower_32_bits(carveout->start); 1387 1388 if (na > 1 && upper > 0) 1389 snprintf(name, sizeof(name), "%s@%x,%x", basename, upper, 1390 lower); 1391 else { 1392 if (upper > 0) { 1393 debug("address %08x:%08x exceeds addressable space\n", 1394 upper, lower); 1395 return -FDT_ERR_BADVALUE; 1396 } 1397 1398 snprintf(name, sizeof(name), "%s@%x", basename, lower); 1399 } 1400 1401 node = fdt_add_subnode(blob, parent, name); 1402 if (node < 0) 1403 return node; 1404 1405 if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) { 1406 err = fdt_setprop(blob, node, "no-map", NULL, 0); 1407 if (err < 0) 1408 return err; 1409 } 1410 1411 if (phandlep) { 1412 err = fdt_generate_phandle(blob, &phandle); 1413 if (err < 0) 1414 return err; 1415 1416 err = fdtdec_set_phandle(blob, node, phandle); 1417 if (err < 0) 1418 return err; 1419 } 1420 1421 /* store one or two address cells */ 1422 if (na > 1) 1423 *ptr++ = cpu_to_fdt32(upper); 1424 1425 *ptr++ = cpu_to_fdt32(lower); 1426 1427 /* store one or two size cells */ 1428 size = carveout->end - carveout->start + 1; 1429 upper = upper_32_bits(size); 1430 lower = lower_32_bits(size); 1431 1432 if (ns > 1) 1433 *ptr++ = cpu_to_fdt32(upper); 1434 1435 *ptr++ = cpu_to_fdt32(lower); 1436 1437 err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells)); 1438 if (err < 0) 1439 return err; 1440 1441 if (compatibles && count > 0) { 1442 size_t length = 0, len = 0; 1443 unsigned int i; 1444 char *buffer; 1445 1446 for (i = 0; i < count; i++) 1447 length += strlen(compatibles[i]) + 1; 1448 1449 buffer = malloc(length); 1450 if (!buffer) 1451 return -FDT_ERR_INTERNAL; 1452 1453 for (i = 0; i < count; i++) 1454 len += strlcpy(buffer + len, compatibles[i], 1455 length - len) + 1; 1456 1457 err = fdt_setprop(blob, node, "compatible", buffer, length); 1458 free(buffer); 1459 if (err < 0) 1460 return err; 1461 } 1462 1463 /* return the phandle for the new node for the caller to use */ 1464 if (phandlep) 1465 *phandlep = phandle; 1466 1467 return 0; 1468} 1469 1470int fdtdec_get_carveout(const void *blob, const char *node, 1471 const char *prop_name, unsigned int index, 1472 struct fdt_memory *carveout, const char **name, 1473 const char ***compatiblesp, unsigned int *countp, 1474 unsigned long *flags) 1475{ 1476 const fdt32_t *prop; 1477 uint32_t phandle; 1478 int offset, len; 1479 fdt_size_t size; 1480 1481 offset = fdt_path_offset(blob, node); 1482 if (offset < 0) 1483 return offset; 1484 1485 prop = fdt_getprop(blob, offset, prop_name, &len); 1486 if (!prop) { 1487 debug("failed to get %s for %s\n", prop_name, node); 1488 return -FDT_ERR_NOTFOUND; 1489 } 1490 1491 if ((len % sizeof(phandle)) != 0) { 1492 debug("invalid phandle property\n"); 1493 return -FDT_ERR_BADPHANDLE; 1494 } 1495 1496 if (len < (sizeof(phandle) * (index + 1))) { 1497 debug("invalid phandle index\n"); 1498 return -FDT_ERR_NOTFOUND; 1499 } 1500 1501 phandle = fdt32_to_cpu(prop[index]); 1502 1503 offset = fdt_node_offset_by_phandle(blob, phandle); 1504 if (offset < 0) { 1505 debug("failed to find node for phandle %u\n", phandle); 1506 return offset; 1507 } 1508 1509 if (name) 1510 *name = fdt_get_name(blob, offset, NULL); 1511 1512 if (compatiblesp) { 1513 const char **compatibles = NULL; 1514 const char *start, *end, *ptr; 1515 unsigned int count = 0; 1516 1517 prop = fdt_getprop(blob, offset, "compatible", &len); 1518 if (!prop) 1519 goto skip_compat; 1520 1521 start = ptr = (const char *)prop; 1522 end = start + len; 1523 1524 while (ptr < end) { 1525 ptr = strchrnul(ptr, '\0'); 1526 count++; 1527 ptr++; 1528 } 1529 1530 compatibles = malloc(sizeof(ptr) * count); 1531 if (!compatibles) 1532 return -FDT_ERR_INTERNAL; 1533 1534 ptr = start; 1535 count = 0; 1536 1537 while (ptr < end) { 1538 compatibles[count] = ptr; 1539 ptr = strchrnul(ptr, '\0'); 1540 count++; 1541 ptr++; 1542 } 1543 1544skip_compat: 1545 *compatiblesp = compatibles; 1546 1547 if (countp) 1548 *countp = count; 1549 } 1550 1551 carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset, 1552 "reg", 0, &size, 1553 true); 1554 if (carveout->start == FDT_ADDR_T_NONE) { 1555 debug("failed to read address/size from \"reg\" property\n"); 1556 return -FDT_ERR_NOTFOUND; 1557 } 1558 1559 carveout->end = carveout->start + size - 1; 1560 1561 if (flags) { 1562 *flags = 0; 1563 1564 if (fdtdec_get_bool(blob, offset, "no-map")) 1565 *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP; 1566 } 1567 1568 return 0; 1569} 1570 1571int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name, 1572 unsigned int index, const struct fdt_memory *carveout, 1573 const char *name, const char **compatibles, 1574 unsigned int count, unsigned long flags) 1575{ 1576 uint32_t phandle; 1577 int err, offset, len; 1578 fdt32_t value; 1579 void *prop; 1580 1581 err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles, 1582 count, &phandle, flags); 1583 if (err < 0) { 1584 debug("failed to add reserved memory: %d\n", err); 1585 return err; 1586 } 1587 1588 offset = fdt_path_offset(blob, node); 1589 if (offset < 0) { 1590 debug("failed to find offset for node %s: %d\n", node, offset); 1591 return offset; 1592 } 1593 1594 value = cpu_to_fdt32(phandle); 1595 1596 if (!fdt_getprop(blob, offset, prop_name, &len)) { 1597 if (len == -FDT_ERR_NOTFOUND) 1598 len = 0; 1599 else 1600 return len; 1601 } 1602 1603 if ((index + 1) * sizeof(value) > len) { 1604 err = fdt_setprop_placeholder(blob, offset, prop_name, 1605 (index + 1) * sizeof(value), 1606 &prop); 1607 if (err < 0) { 1608 debug("failed to resize reserved memory property: %s\n", 1609 fdt_strerror(err)); 1610 return err; 1611 } 1612 } 1613 1614 err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name, 1615 strlen(prop_name), 1616 index * sizeof(value), 1617 &value, sizeof(value)); 1618 if (err < 0) { 1619 debug("failed to update %s property for node %s: %s\n", 1620 prop_name, node, fdt_strerror(err)); 1621 return err; 1622 } 1623 1624 return 0; 1625} 1626 1627/* TODO(sjg@chromium.org): This function should not be weak */ 1628__weak int fdtdec_board_setup(const void *fdt_blob) 1629{ 1630 return 0; 1631} 1632 1633/** 1634 * setup_multi_dtb_fit() - locate the correct dtb from a FIT 1635 * 1636 * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a 1637 * supplied FIT 1638 * 1639 * It accepts the current value of gd->fdt_blob, which points to the FIT, then 1640 * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the 1641 * correct one 1642 */ 1643static void setup_multi_dtb_fit(void) 1644{ 1645 void *blob; 1646 1647 /* 1648 * Try and uncompress the blob. 1649 * Unfortunately there is no way to know how big the input blob really 1650 * is. So let us set the maximum input size arbitrarily high. 16MB 1651 * ought to be more than enough for packed DTBs. 1652 */ 1653 if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0) 1654 gd->fdt_blob = blob; 1655 1656 /* 1657 * Check if blob is a FIT images containings DTBs. 1658 * If so, pick the most relevant 1659 */ 1660 blob = locate_dtb_in_fit(gd->fdt_blob); 1661 if (blob) { 1662 gd_set_multi_dtb_fit(gd->fdt_blob); 1663 gd->fdt_blob = blob; 1664 gd->fdt_src = FDTSRC_FIT; 1665 } 1666} 1667 1668int fdtdec_setup(void) 1669{ 1670 int ret = -ENOENT; 1671 1672 /* If allowing a bloblist, check that first */ 1673 if (CONFIG_IS_ENABLED(BLOBLIST)) { 1674 ret = bloblist_maybe_init(); 1675 if (!ret) { 1676 gd->fdt_blob = bloblist_find(BLOBLISTT_CONTROL_FDT, 0); 1677 if (gd->fdt_blob) { 1678 gd->fdt_src = FDTSRC_BLOBLIST; 1679 log_debug("Devicetree is in bloblist at %p\n", 1680 gd->fdt_blob); 1681 } else { 1682 log_debug("No FDT found in bloblist\n"); 1683 ret = -ENOENT; 1684 } 1685 } 1686 } 1687 1688 /* Otherwise, the devicetree is typically appended to U-Boot */ 1689 if (ret) { 1690 if (IS_ENABLED(CONFIG_OF_SEPARATE)) { 1691 gd->fdt_blob = fdt_find_separate(); 1692 gd->fdt_src = FDTSRC_SEPARATE; 1693 } else { /* embed dtb in ELF file for testing / development */ 1694 gd->fdt_blob = dtb_dt_embedded(); 1695 gd->fdt_src = FDTSRC_EMBED; 1696 } 1697 } 1698 1699 /* Allow the board to override the fdt address. */ 1700 if (IS_ENABLED(CONFIG_OF_BOARD)) { 1701 gd->fdt_blob = board_fdt_blob_setup(&ret); 1702 if (!ret) 1703 gd->fdt_src = FDTSRC_BOARD; 1704 else if (ret != -EEXIST) 1705 return ret; 1706 } 1707 1708 /* Allow the early environment to override the fdt address */ 1709 if (!IS_ENABLED(CONFIG_SPL_BUILD)) { 1710 ulong addr; 1711 1712 addr = env_get_hex("fdtcontroladdr", 0); 1713 if (addr) { 1714 gd->fdt_blob = map_sysmem(addr, 0); 1715 gd->fdt_src = FDTSRC_ENV; 1716 } 1717 } 1718 1719 if (CONFIG_IS_ENABLED(MULTI_DTB_FIT)) 1720 setup_multi_dtb_fit(); 1721 1722 ret = fdtdec_prepare_fdt(gd->fdt_blob); 1723 if (!ret) 1724 ret = fdtdec_board_setup(gd->fdt_blob); 1725 oftree_reset(); 1726 1727 return ret; 1728} 1729 1730int fdtdec_resetup(int *rescan) 1731{ 1732 void *fdt_blob; 1733 1734 /* 1735 * If the current DTB is part of a compressed FIT image, 1736 * try to locate the best match from the uncompressed 1737 * FIT image stillpresent there. Save the time and space 1738 * required to uncompress it again. 1739 */ 1740 if (gd_multi_dtb_fit()) { 1741 fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit()); 1742 1743 if (fdt_blob == gd->fdt_blob) { 1744 /* 1745 * The best match did not change. no need to tear down 1746 * the DM and rescan the fdt. 1747 */ 1748 *rescan = 0; 1749 return 0; 1750 } 1751 1752 *rescan = 1; 1753 gd->fdt_blob = fdt_blob; 1754 return fdtdec_prepare_fdt(fdt_blob); 1755 } 1756 1757 /* 1758 * If multi_dtb_fit is NULL, it means that blob appended to u-boot is 1759 * not a FIT image containings DTB, but a single DTB. There is no need 1760 * to teard down DM and rescan the DT in this case. 1761 */ 1762 *rescan = 0; 1763 return 0; 1764} 1765 1766int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id, 1767 phys_addr_t *basep, phys_size_t *sizep, 1768 struct bd_info *bd) 1769{ 1770 int addr_cells, size_cells; 1771 const u32 *cell, *end; 1772 u64 total_size, size, addr; 1773 int node, child; 1774 bool auto_size; 1775 int bank; 1776 int len; 1777 1778 debug("%s: board_id=%d\n", __func__, board_id); 1779 if (!area) 1780 area = "/memory"; 1781 node = fdt_path_offset(blob, area); 1782 if (node < 0) { 1783 debug("No %s node found\n", area); 1784 return -ENOENT; 1785 } 1786 1787 cell = fdt_getprop(blob, node, "reg", &len); 1788 if (!cell) { 1789 debug("No reg property found\n"); 1790 return -ENOENT; 1791 } 1792 1793 addr_cells = fdt_address_cells(blob, node); 1794 size_cells = fdt_size_cells(blob, node); 1795 1796 /* Check the board id and mask */ 1797 for (child = fdt_first_subnode(blob, node); 1798 child >= 0; 1799 child = fdt_next_subnode(blob, child)) { 1800 int match_mask, match_value; 1801 1802 match_mask = fdtdec_get_int(blob, child, "match-mask", -1); 1803 match_value = fdtdec_get_int(blob, child, "match-value", -1); 1804 1805 if (match_value >= 0 && 1806 ((board_id & match_mask) == match_value)) { 1807 /* Found matching mask */ 1808 debug("Found matching mask %d\n", match_mask); 1809 node = child; 1810 cell = fdt_getprop(blob, node, "reg", &len); 1811 if (!cell) { 1812 debug("No memory-banks property found\n"); 1813 return -EINVAL; 1814 } 1815 break; 1816 } 1817 } 1818 /* Note: if no matching subnode was found we use the parent node */ 1819 1820 if (bd) { 1821 memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) * 1822 CONFIG_NR_DRAM_BANKS); 1823 } 1824 1825 auto_size = fdtdec_get_bool(blob, node, "auto-size"); 1826 1827 total_size = 0; 1828 end = cell + len / 4 - addr_cells - size_cells; 1829 debug("cell at %p, end %p\n", cell, end); 1830 for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) { 1831 if (cell > end) 1832 break; 1833 addr = 0; 1834 if (addr_cells == 2) 1835 addr += (u64)fdt32_to_cpu(*cell++) << 32UL; 1836 addr += fdt32_to_cpu(*cell++); 1837 if (bd) 1838 bd->bi_dram[bank].start = addr; 1839 if (basep && !bank) 1840 *basep = (phys_addr_t)addr; 1841 1842 size = 0; 1843 if (size_cells == 2) 1844 size += (u64)fdt32_to_cpu(*cell++) << 32UL; 1845 size += fdt32_to_cpu(*cell++); 1846 1847 if (auto_size) { 1848 u64 new_size; 1849 1850 debug("Auto-sizing %llx, size %llx: ", addr, size); 1851 new_size = get_ram_size((long *)(uintptr_t)addr, size); 1852 if (new_size == size) { 1853 debug("OK\n"); 1854 } else { 1855 debug("sized to %llx\n", new_size); 1856 size = new_size; 1857 } 1858 } 1859 1860 if (bd) 1861 bd->bi_dram[bank].size = size; 1862 total_size += size; 1863 } 1864 1865 debug("Memory size %llu\n", total_size); 1866 if (sizep) 1867 *sizep = (phys_size_t)total_size; 1868 1869 return 0; 1870} 1871 1872#endif /* !USE_HOSTCC */ 1873