1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Generation of tables for particular device types
4 *
5 * Copyright 2019 Google LLC
6 * Mostly taken from coreboot file of the same name
7 */
8
9#include <dm.h>
10#include <irq.h>
11#include <log.h>
12#include <usb.h>
13#include <acpi/acpigen.h>
14#include <acpi/acpi_device.h>
15#include <acpi/acpigen.h>
16#include <asm-generic/gpio.h>
17#include <dm/acpi.h>
18
19/**
20 * acpi_device_path_fill() - Find the root device and build a path from there
21 *
22 * This recursively reaches back to the root device and progressively adds path
23 * elements until the device is reached.
24 *
25 * @dev: Device to return path of
26 * @buf: Buffer to hold the path
27 * @buf_len: Length of buffer
28 * @cur: Current position in the buffer
29 * Return: new position in buffer after adding @dev, or -ve on error
30 */
31static int acpi_device_path_fill(const struct udevice *dev, char *buf,
32				 size_t buf_len, int cur)
33{
34	char name[ACPI_NAME_MAX];
35	int next = 0;
36	int ret;
37
38	ret = acpi_get_name(dev, name);
39	if (ret)
40		return ret;
41
42	/*
43	 * Make sure this name segment will fit, including the path segment
44	 * separator and possible NULL terminator, if this is the last segment.
45	 */
46	if (cur + strlen(name) + 2 > buf_len)
47		return -ENOSPC;
48
49	/* Walk up the tree to the root device */
50	if (dev_get_parent(dev)) {
51		next = acpi_device_path_fill(dev_get_parent(dev), buf, buf_len,
52					     cur);
53		if (next < 0)
54			return next;
55	}
56
57	/* Fill in the path from the root device */
58	next += snprintf(buf + next, buf_len - next, "%s%s",
59			 dev_get_parent(dev) && *name ? "." : "", name);
60
61	return next;
62}
63
64int acpi_device_path(const struct udevice *dev, char *buf, int maxlen)
65{
66	int ret;
67
68	ret = acpi_device_path_fill(dev, buf, maxlen, 0);
69	if (ret < 0)
70		return ret;
71
72	return 0;
73}
74
75int acpi_device_scope(const struct udevice *dev, char *scope, int maxlen)
76{
77	int ret;
78
79	if (!dev_get_parent(dev))
80		return log_msg_ret("noparent", -EINVAL);
81
82	ret = acpi_device_path_fill(dev_get_parent(dev), scope, maxlen, 0);
83	if (ret < 0)
84		return log_msg_ret("fill", ret);
85
86	return 0;
87}
88
89enum acpi_dev_status acpi_device_status(const struct udevice *dev)
90{
91	return ACPI_DSTATUS_ALL_ON;
92}
93
94/**
95 * largeres_write_len_f() - Write a placeholder word value
96 *
97 * Write a forward length for a large resource (2 bytes)
98 *
99 * Return: pointer to the zero word (for fixing up later)
100 */
101static void *largeres_write_len_f(struct acpi_ctx *ctx)
102{
103	u8 *p = acpigen_get_current(ctx);
104
105	acpigen_emit_word(ctx, 0);
106
107	return p;
108}
109
110/**
111 * largeres_fill_from_len() - Fill in a length value
112 *
113 * This calculated the number of bytes since the provided @start and writes it
114 * to @ptr, which was previous returned by largeres_write_len_f().
115 *
116 * @ptr: Word to update
117 * @start: Start address to count from to calculated the length
118 */
119static void largeres_fill_from_len(struct acpi_ctx *ctx, char *ptr, u8 *start)
120{
121	u16 len = acpigen_get_current(ctx) - start;
122
123	ptr[0] = len & 0xff;
124	ptr[1] = (len >> 8) & 0xff;
125}
126
127/**
128 * largeres_fill_len() - Fill in a length value, excluding the length itself
129 *
130 * Fill in the length field with the value calculated from after the 16bit
131 * field to acpigen current. This is useful since the length value does not
132 * include the length field itself.
133 *
134 * This calls acpi_device_largeres_fill_len() passing @ptr + 2 as @start
135 *
136 * @ptr: Word to update.
137 */
138static void largeres_fill_len(struct acpi_ctx *ctx, void *ptr)
139{
140	largeres_fill_from_len(ctx, ptr, ptr + sizeof(u16));
141}
142
143/* ACPI 6.3 section 6.4.3.6: Extended Interrupt Descriptor */
144static int acpi_device_write_interrupt(struct acpi_ctx *ctx,
145				       const struct acpi_irq *irq)
146{
147	void *desc_length;
148	u8 flags;
149
150	if (!irq->pin)
151		return -ENOENT;
152
153	/* This is supported by GpioInt() but not Interrupt() */
154	if (irq->polarity == ACPI_IRQ_ACTIVE_BOTH)
155		return -EINVAL;
156
157	/* Byte 0: Descriptor Type */
158	acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_INTERRUPT);
159
160	/* Byte 1-2: Length (filled in later) */
161	desc_length = largeres_write_len_f(ctx);
162
163	/*
164	 * Byte 3: Flags
165	 *  [7:5]: Reserved
166	 *    [4]: Wake     (0=NO_WAKE   1=WAKE)
167	 *    [3]: Sharing  (0=EXCLUSIVE 1=SHARED)
168	 *    [2]: Polarity (0=HIGH      1=LOW)
169	 *    [1]: Mode     (0=LEVEL     1=EDGE)
170	 *    [0]: Resource (0=PRODUCER  1=CONSUMER)
171	 */
172	flags = BIT(0); /* ResourceConsumer */
173	if (irq->mode == ACPI_IRQ_EDGE_TRIGGERED)
174		flags |= BIT(1);
175	if (irq->polarity == ACPI_IRQ_ACTIVE_LOW)
176		flags |= BIT(2);
177	if (irq->shared == ACPI_IRQ_SHARED)
178		flags |= BIT(3);
179	if (irq->wake == ACPI_IRQ_WAKE)
180		flags |= BIT(4);
181	acpigen_emit_byte(ctx, flags);
182
183	/* Byte 4: Interrupt Table Entry Count */
184	acpigen_emit_byte(ctx, 1);
185
186	/* Byte 5-8: Interrupt Number */
187	acpigen_emit_dword(ctx, irq->pin);
188
189	/* Fill in Descriptor Length (account for len word) */
190	largeres_fill_len(ctx, desc_length);
191
192	return 0;
193}
194
195int acpi_device_write_interrupt_irq(struct acpi_ctx *ctx,
196				    const struct irq *req_irq)
197{
198	struct acpi_irq irq;
199	int ret;
200
201	ret = irq_get_acpi(req_irq, &irq);
202	if (ret)
203		return log_msg_ret("get", ret);
204	ret = acpi_device_write_interrupt(ctx, &irq);
205	if (ret)
206		return log_msg_ret("write", ret);
207
208	return irq.pin;
209}
210
211/* ACPI 6.3 section 6.4.3.8.1 - GPIO Interrupt or I/O */
212int acpi_device_write_gpio(struct acpi_ctx *ctx, const struct acpi_gpio *gpio)
213{
214	void *start, *desc_length;
215	void *pin_table_offset, *vendor_data_offset, *resource_offset;
216	u16 flags = 0;
217	int pin;
218
219	if (gpio->type > ACPI_GPIO_TYPE_IO)
220		return -EINVAL;
221
222	start = acpigen_get_current(ctx);
223
224	/* Byte 0: Descriptor Type */
225	acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_GPIO);
226
227	/* Byte 1-2: Length (fill in later) */
228	desc_length = largeres_write_len_f(ctx);
229
230	/* Byte 3: Revision ID */
231	acpigen_emit_byte(ctx, ACPI_GPIO_REVISION_ID);
232
233	/* Byte 4: GpioIo or GpioInt */
234	acpigen_emit_byte(ctx, gpio->type);
235
236	/*
237	 * Byte 5-6: General Flags
238	 *   [15:1]: 0 => Reserved
239	 *      [0]: 1 => ResourceConsumer
240	 */
241	acpigen_emit_word(ctx, 1 << 0);
242
243	switch (gpio->type) {
244	case ACPI_GPIO_TYPE_INTERRUPT:
245		/*
246		 * Byte 7-8: GPIO Interrupt Flags
247		 *   [15:5]: 0 => Reserved
248		 *      [4]: Wake     (0=NO_WAKE   1=WAKE)
249		 *      [3]: Sharing  (0=EXCLUSIVE 1=SHARED)
250		 *    [2:1]: Polarity (0=HIGH      1=LOW     2=BOTH)
251		 *      [0]: Mode     (0=LEVEL     1=EDGE)
252		 */
253		if (gpio->irq.mode == ACPI_IRQ_EDGE_TRIGGERED)
254			flags |= 1 << 0;
255		if (gpio->irq.shared == ACPI_IRQ_SHARED)
256			flags |= 1 << 3;
257		if (gpio->irq.wake == ACPI_IRQ_WAKE)
258			flags |= 1 << 4;
259
260		switch (gpio->irq.polarity) {
261		case ACPI_IRQ_ACTIVE_HIGH:
262			flags |= 0 << 1;
263			break;
264		case ACPI_IRQ_ACTIVE_LOW:
265			flags |= 1 << 1;
266			break;
267		case ACPI_IRQ_ACTIVE_BOTH:
268			flags |= 2 << 1;
269			break;
270		}
271		break;
272
273	case ACPI_GPIO_TYPE_IO:
274		/*
275		 * Byte 7-8: GPIO IO Flags
276		 *   [15:4]: 0 => Reserved
277		 *      [3]: Sharing  (0=EXCLUSIVE 1=SHARED)
278		 *      [2]: 0 => Reserved
279		 *    [1:0]: IO Restriction
280		 *           0 => IoRestrictionNone
281		 *           1 => IoRestrictionInputOnly
282		 *           2 => IoRestrictionOutputOnly
283		 *           3 => IoRestrictionNoneAndPreserve
284		 */
285		flags |= gpio->io_restrict & 3;
286		if (gpio->io_shared)
287			flags |= 1 << 3;
288		break;
289	}
290	acpigen_emit_word(ctx, flags);
291
292	/*
293	 * Byte 9: Pin Configuration
294	 *  0x01 => Default (no configuration applied)
295	 *  0x02 => Pull-up
296	 *  0x03 => Pull-down
297	 *  0x04-0x7F => Reserved
298	 *  0x80-0xff => Vendor defined
299	 */
300	acpigen_emit_byte(ctx, gpio->pull);
301
302	/* Byte 10-11: Output Drive Strength in 1/100 mA */
303	acpigen_emit_word(ctx, gpio->output_drive_strength);
304
305	/* Byte 12-13: Debounce Timeout in 1/100 ms */
306	acpigen_emit_word(ctx, gpio->interrupt_debounce_timeout);
307
308	/* Byte 14-15: Pin Table Offset, relative to start */
309	pin_table_offset = largeres_write_len_f(ctx);
310
311	/* Byte 16: Reserved */
312	acpigen_emit_byte(ctx, 0);
313
314	/* Byte 17-18: Resource Source Name Offset, relative to start */
315	resource_offset = largeres_write_len_f(ctx);
316
317	/* Byte 19-20: Vendor Data Offset, relative to start */
318	vendor_data_offset = largeres_write_len_f(ctx);
319
320	/* Byte 21-22: Vendor Data Length */
321	acpigen_emit_word(ctx, 0);
322
323	/* Fill in Pin Table Offset */
324	largeres_fill_from_len(ctx, pin_table_offset, start);
325
326	/* Pin Table, one word for each pin */
327	for (pin = 0; pin < gpio->pin_count; pin++)
328		acpigen_emit_word(ctx, gpio->pins[pin]);
329
330	/* Fill in Resource Source Name Offset */
331	largeres_fill_from_len(ctx, resource_offset, start);
332
333	/* Resource Source Name String */
334	acpigen_emit_string(ctx, gpio->resource);
335
336	/* Fill in Vendor Data Offset */
337	largeres_fill_from_len(ctx, vendor_data_offset, start);
338
339	/* Fill in GPIO Descriptor Length (account for len word) */
340	largeres_fill_len(ctx, desc_length);
341
342	return gpio->pins[0];
343}
344
345int acpi_device_write_gpio_desc(struct acpi_ctx *ctx,
346				const struct gpio_desc *desc)
347{
348	struct acpi_gpio gpio;
349	int ret;
350
351	ret = gpio_get_acpi(desc, &gpio);
352	if (ret)
353		return log_msg_ret("desc", ret);
354	ret = acpi_device_write_gpio(ctx, &gpio);
355	if (ret < 0)
356		return log_msg_ret("gpio", ret);
357
358	return ret;
359}
360
361int acpi_device_write_interrupt_or_gpio(struct acpi_ctx *ctx,
362					struct udevice *dev, const char *prop)
363{
364	struct irq req_irq;
365	int pin;
366	int ret;
367
368	ret = irq_get_by_index(dev, 0, &req_irq);
369	if (!ret) {
370		ret = acpi_device_write_interrupt_irq(ctx, &req_irq);
371		if (ret < 0)
372			return log_msg_ret("irq", ret);
373		pin = ret;
374	} else {
375		struct gpio_desc req_gpio;
376
377		ret = gpio_request_by_name(dev, prop, 0, &req_gpio,
378					   GPIOD_IS_IN);
379		if (ret)
380			return log_msg_ret("no gpio", ret);
381		ret = acpi_device_write_gpio_desc(ctx, &req_gpio);
382		if (ret < 0)
383			return log_msg_ret("gpio", ret);
384		pin = ret;
385	}
386
387	return pin;
388}
389
390/* PowerResource() with Enable and/or Reset control */
391int acpi_device_add_power_res(struct acpi_ctx *ctx, u32 tx_state_val,
392			      const char *dw0_read, const char *dw0_write,
393			      const struct gpio_desc *reset_gpio,
394			      uint reset_delay_ms, uint reset_off_delay_ms,
395			      const struct gpio_desc *enable_gpio,
396			      uint enable_delay_ms, uint enable_off_delay_ms,
397			      const struct gpio_desc *stop_gpio,
398			      uint stop_delay_ms, uint stop_off_delay_ms)
399{
400	static const char *const power_res_dev_states[] = { "_PR0", "_PR3" };
401	struct acpi_gpio reset, enable, stop;
402	bool has_reset, has_enable, has_stop;
403	int ret;
404
405	gpio_get_acpi(reset_gpio, &reset);
406	gpio_get_acpi(enable_gpio, &enable);
407	gpio_get_acpi(stop_gpio, &stop);
408	has_reset = reset.pins[0];
409	has_enable = enable.pins[0];
410	has_stop = stop.pins[0];
411
412	if (!has_reset && !has_enable && !has_stop)
413		return -EINVAL;
414
415	/* PowerResource (PRIC, 0, 0) */
416	acpigen_write_power_res(ctx, "PRIC", 0, 0, power_res_dev_states,
417				ARRAY_SIZE(power_res_dev_states));
418
419	/* Method (_STA, 0, NotSerialized) { Return (0x1) } */
420	acpigen_write_sta(ctx, 0x1);
421
422	/* Method (_ON, 0, Serialized) */
423	acpigen_write_method_serialized(ctx, "_ON", 0);
424	if (has_reset) {
425		ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
426						 dw0_write, &reset, true);
427		if (ret)
428			return log_msg_ret("reset1", ret);
429	}
430	if (has_enable) {
431		ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
432						 dw0_write, &enable, true);
433		if (ret)
434			return log_msg_ret("enable1", ret);
435		if (enable_delay_ms)
436			acpigen_write_sleep(ctx, enable_delay_ms);
437	}
438	if (has_reset) {
439		ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
440						 dw0_write, &reset, false);
441		if (ret)
442			return log_msg_ret("reset2", ret);
443		if (reset_delay_ms)
444			acpigen_write_sleep(ctx, reset_delay_ms);
445	}
446	if (has_stop) {
447		ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
448						 dw0_write, &stop, false);
449		if (ret)
450			return log_msg_ret("stop1", ret);
451		if (stop_delay_ms)
452			acpigen_write_sleep(ctx, stop_delay_ms);
453	}
454	acpigen_pop_len(ctx);		/* _ON method */
455
456	/* Method (_OFF, 0, Serialized) */
457	acpigen_write_method_serialized(ctx, "_OFF", 0);
458	if (has_stop) {
459		ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
460						 dw0_write, &stop, true);
461		if (ret)
462			return log_msg_ret("stop2", ret);
463		if (stop_off_delay_ms)
464			acpigen_write_sleep(ctx, stop_off_delay_ms);
465	}
466	if (has_reset) {
467		ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
468						 dw0_write, &reset, true);
469		if (ret)
470			return log_msg_ret("reset3", ret);
471		if (reset_off_delay_ms)
472			acpigen_write_sleep(ctx, reset_off_delay_ms);
473	}
474	if (has_enable) {
475		ret = acpigen_set_enable_tx_gpio(ctx, tx_state_val, dw0_read,
476						 dw0_write, &enable, false);
477		if (ret)
478			return log_msg_ret("enable2", ret);
479		if (enable_off_delay_ms)
480			acpigen_write_sleep(ctx, enable_off_delay_ms);
481	}
482	acpigen_pop_len(ctx);		/* _OFF method */
483
484	acpigen_pop_len(ctx);		/* PowerResource PRIC */
485
486	return 0;
487}
488
489int acpi_device_write_dsm_i2c_hid(struct acpi_ctx *ctx,
490				  int hid_desc_reg_offset)
491{
492	int ret;
493
494	acpigen_write_dsm_start(ctx);
495	ret = acpigen_write_dsm_uuid_start(ctx, ACPI_DSM_I2C_HID_UUID);
496	if (ret)
497		return log_ret(ret);
498
499	acpigen_write_dsm_uuid_start_cond(ctx, 0);
500	/* ToInteger (Arg1, Local2) */
501	acpigen_write_to_integer(ctx, ARG1_OP, LOCAL2_OP);
502	/* If (LEqual (Local2, 0x0)) */
503	acpigen_write_if_lequal_op_int(ctx, LOCAL2_OP, 0x0);
504	/*   Return (Buffer (One) { 0x1f }) */
505	acpigen_write_return_singleton_buffer(ctx, 0x1f);
506	acpigen_pop_len(ctx);	/* Pop : If */
507	/* Else */
508	acpigen_write_else(ctx);
509	/*   If (LEqual (Local2, 0x1)) */
510	acpigen_write_if_lequal_op_int(ctx, LOCAL2_OP, 0x1);
511	/*     Return (Buffer (One) { 0x3f }) */
512	acpigen_write_return_singleton_buffer(ctx, 0x3f);
513	acpigen_pop_len(ctx);	/* Pop : If */
514	/*   Else */
515	acpigen_write_else(ctx);
516	/*     Return (Buffer (One) { 0x0 }) */
517	acpigen_write_return_singleton_buffer(ctx, 0x0);
518	acpigen_pop_len(ctx);	/* Pop : Else */
519	acpigen_pop_len(ctx);	/* Pop : Else */
520	acpigen_write_dsm_uuid_end_cond(ctx);
521
522	acpigen_write_dsm_uuid_start_cond(ctx, 1);
523	acpigen_write_return_byte(ctx, hid_desc_reg_offset);
524	acpigen_write_dsm_uuid_end_cond(ctx);
525
526	acpigen_write_dsm_uuid_end(ctx);
527	acpigen_write_dsm_end(ctx);
528
529	return 0;
530}
531
532/* ACPI 6.3 section 6.4.3.8.2.1 - I2cSerialBusV2() */
533static void acpi_device_write_i2c(struct acpi_ctx *ctx,
534				  const struct acpi_i2c *i2c)
535{
536	void *desc_length, *type_length;
537
538	/* Byte 0: Descriptor Type */
539	acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_SERIAL_BUS);
540
541	/* Byte 1+2: Length (filled in later) */
542	desc_length = largeres_write_len_f(ctx);
543
544	/* Byte 3: Revision ID */
545	acpigen_emit_byte(ctx, ACPI_I2C_SERIAL_BUS_REVISION_ID);
546
547	/* Byte 4: Resource Source Index is Reserved */
548	acpigen_emit_byte(ctx, 0);
549
550	/* Byte 5: Serial Bus Type is I2C */
551	acpigen_emit_byte(ctx, ACPI_SERIAL_BUS_TYPE_I2C);
552
553	/*
554	 * Byte 6: Flags
555	 *  [7:2]: 0 => Reserved
556	 *    [1]: 1 => ResourceConsumer
557	 *    [0]: 0 => ControllerInitiated
558	 */
559	acpigen_emit_byte(ctx, 1 << 1);
560
561	/*
562	 * Byte 7-8: Type Specific Flags
563	 *   [15:1]: 0 => Reserved
564	 *      [0]: 0 => 7bit, 1 => 10bit
565	 */
566	acpigen_emit_word(ctx, i2c->mode_10bit);
567
568	/* Byte 9: Type Specific Revision ID */
569	acpigen_emit_byte(ctx, ACPI_I2C_TYPE_SPECIFIC_REVISION_ID);
570
571	/* Byte 10-11: I2C Type Data Length */
572	type_length = largeres_write_len_f(ctx);
573
574	/* Byte 12-15: I2C Bus Speed */
575	acpigen_emit_dword(ctx, i2c->speed);
576
577	/* Byte 16-17: I2C Slave Address */
578	acpigen_emit_word(ctx, i2c->address);
579
580	/* Fill in Type Data Length */
581	largeres_fill_len(ctx, type_length);
582
583	/* Byte 18+: ResourceSource */
584	acpigen_emit_string(ctx, i2c->resource);
585
586	/* Fill in I2C Descriptor Length */
587	largeres_fill_len(ctx, desc_length);
588}
589
590/**
591 * acpi_device_set_i2c() - Set up an ACPI I2C struct from a device
592 *
593 * The value of @scope is not copied, but only referenced. This implies the
594 * caller has to ensure it stays valid for the lifetime of @i2c.
595 *
596 * @dev: I2C device to convert
597 * @i2c: Place to put the new structure
598 * @scope: Scope of the I2C device (this is the controller path)
599 * Return: chip address of device
600 */
601static int acpi_device_set_i2c(const struct udevice *dev, struct acpi_i2c *i2c,
602			       const char *scope)
603{
604	struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
605	struct udevice *bus = dev_get_parent(dev);
606
607	memset(i2c, '\0', sizeof(*i2c));
608	i2c->address = chip->chip_addr;
609	i2c->mode_10bit = 0;
610
611	/*
612	 * i2c_bus->speed_hz is set if this device is probed, but if not we
613	 * must use the device tree
614	 */
615	i2c->speed = dev_read_u32_default(bus, "clock-frequency",
616					  I2C_SPEED_STANDARD_RATE);
617	i2c->resource = scope;
618
619	return i2c->address;
620}
621
622int acpi_device_write_i2c_dev(struct acpi_ctx *ctx, const struct udevice *dev)
623{
624	char scope[ACPI_PATH_MAX];
625	struct acpi_i2c i2c;
626	int ret;
627
628	ret = acpi_device_scope(dev, scope, sizeof(scope));
629	if (ret)
630		return log_msg_ret("scope", ret);
631	ret = acpi_device_set_i2c(dev, &i2c, scope);
632	if (ret < 0)
633		return log_msg_ret("set", ret);
634	acpi_device_write_i2c(ctx, &i2c);
635
636	return ret;
637}
638
639#ifdef CONFIG_SPI
640/* ACPI 6.1 section 6.4.3.8.2.2 - SpiSerialBus() */
641static void acpi_device_write_spi(struct acpi_ctx *ctx, const struct acpi_spi *spi)
642{
643	void *desc_length, *type_length;
644	u16 flags = 0;
645
646	/* Byte 0: Descriptor Type */
647	acpigen_emit_byte(ctx, ACPI_DESCRIPTOR_SERIAL_BUS);
648
649	/* Byte 1+2: Length (filled in later) */
650	desc_length = largeres_write_len_f(ctx);
651
652	/* Byte 3: Revision ID */
653	acpigen_emit_byte(ctx, ACPI_SPI_SERIAL_BUS_REVISION_ID);
654
655	/* Byte 4: Resource Source Index is Reserved */
656	acpigen_emit_byte(ctx, 0);
657
658	/* Byte 5: Serial Bus Type is SPI */
659	acpigen_emit_byte(ctx, ACPI_SERIAL_BUS_TYPE_SPI);
660
661	/*
662	 * Byte 6: Flags
663	 *  [7:2]: 0 => Reserved
664	 *    [1]: 1 => ResourceConsumer
665	 *    [0]: 0 => ControllerInitiated
666	 */
667	acpigen_emit_byte(ctx, BIT(1));
668
669	/*
670	 * Byte 7-8: Type Specific Flags
671	 *   [15:2]: 0 => Reserveda
672	 *      [1]: 0 => ActiveLow, 1 => ActiveHigh
673	 *      [0]: 0 => FourWire, 1 => ThreeWire
674	 */
675	if (spi->wire_mode == SPI_3_WIRE_MODE)
676		flags |= BIT(0);
677	if (spi->device_select_polarity == SPI_POLARITY_HIGH)
678		flags |= BIT(1);
679	acpigen_emit_word(ctx, flags);
680
681	/* Byte 9: Type Specific Revision ID */
682	acpigen_emit_byte(ctx, ACPI_SPI_TYPE_SPECIFIC_REVISION_ID);
683
684	/* Byte 10-11: SPI Type Data Length */
685	type_length = largeres_write_len_f(ctx);
686
687	/* Byte 12-15: Connection Speed */
688	acpigen_emit_dword(ctx, spi->speed);
689
690	/* Byte 16: Data Bit Length */
691	acpigen_emit_byte(ctx, spi->data_bit_length);
692
693	/* Byte 17: Clock Phase */
694	acpigen_emit_byte(ctx, spi->clock_phase);
695
696	/* Byte 18: Clock Polarity */
697	acpigen_emit_byte(ctx, spi->clock_polarity);
698
699	/* Byte 19-20: Device Selection */
700	acpigen_emit_word(ctx, spi->device_select);
701
702	/* Fill in Type Data Length */
703	largeres_fill_len(ctx, type_length);
704
705	/* Byte 21+: ResourceSource String */
706	acpigen_emit_string(ctx, spi->resource);
707
708	/* Fill in SPI Descriptor Length */
709	largeres_fill_len(ctx, desc_length);
710}
711
712/**
713 * acpi_device_set_spi() - Set up an ACPI SPI struct from a device
714 *
715 * The value of @scope is not copied, but only referenced. This implies the
716 * caller has to ensure it stays valid for the lifetime of @spi.
717 *
718 * @dev: SPI device to convert
719 * @spi: Place to put the new structure
720 * @scope: Scope of the SPI device (this is the controller path)
721 * Return: 0 (always)
722 */
723static int acpi_device_set_spi(const struct udevice *dev, struct acpi_spi *spi,
724			       const char *scope)
725{
726	struct dm_spi_slave_plat *plat;
727	struct spi_slave *slave = dev_get_parent_priv(dev);
728
729	plat = dev_get_parent_plat(slave->dev);
730	memset(spi, '\0', sizeof(*spi));
731	spi->device_select = plat->cs;
732	spi->device_select_polarity = SPI_POLARITY_LOW;
733	spi->wire_mode = SPI_4_WIRE_MODE;
734	spi->speed = plat->max_hz;
735	spi->data_bit_length = slave->wordlen;
736	spi->clock_phase = plat->mode & SPI_CPHA ?
737		 SPI_CLOCK_PHASE_SECOND : SPI_CLOCK_PHASE_FIRST;
738	spi->clock_polarity = plat->mode & SPI_CPOL ?
739		 SPI_POLARITY_HIGH : SPI_POLARITY_LOW;
740	spi->resource = scope;
741
742	return 0;
743}
744
745int acpi_device_write_spi_dev(struct acpi_ctx *ctx, const struct udevice *dev)
746{
747	char scope[ACPI_PATH_MAX];
748	struct acpi_spi spi;
749	int ret;
750
751	ret = acpi_device_scope(dev, scope, sizeof(scope));
752	if (ret)
753		return log_msg_ret("scope", ret);
754	ret = acpi_device_set_spi(dev, &spi, scope);
755	if (ret)
756		return log_msg_ret("set", ret);
757	acpi_device_write_spi(ctx, &spi);
758
759	return 0;
760}
761#endif /* CONFIG_SPI */
762
763static const char *acpi_name_from_id(enum uclass_id id)
764{
765	switch (id) {
766	case UCLASS_USB_HUB:
767		/* Root Hub */
768		return "RHUB";
769	/* DSDT: acpi/northbridge.asl */
770	case UCLASS_NORTHBRIDGE:
771		return "MCHC";
772	/* DSDT: acpi/lpc.asl */
773	case UCLASS_LPC:
774		return "LPCB";
775	/* DSDT: acpi/xhci.asl */
776	case UCLASS_USB:
777		/* This only supports USB3.0 controllers at present */
778		return "XHCI";
779	case UCLASS_PWM:
780		return "PWM";
781	default:
782		return NULL;
783	}
784}
785
786/* If you change this function, add test cases to dm_test_acpi_get_name() */
787int acpi_device_infer_name(const struct udevice *dev, char *out_name)
788{
789	enum uclass_id parent_id = UCLASS_INVALID;
790	enum uclass_id id;
791	const char *name = NULL;
792
793	id = device_get_uclass_id(dev);
794	if (dev_get_parent(dev))
795		parent_id = device_get_uclass_id(dev_get_parent(dev));
796
797	if (id == UCLASS_SOUND)
798		name = "HDAS";
799	else if (id == UCLASS_PCI)
800		name = "PCI0";
801	else if (device_is_on_pci_bus(dev))
802		name = acpi_name_from_id(id);
803	if (!name) {
804		switch (parent_id) {
805		case UCLASS_USB: {
806			struct usb_device *udev = dev_get_parent_priv(dev);
807
808			sprintf(out_name, udev->speed >= USB_SPEED_SUPER ?
809				"HS%02d" : "FS%02d", udev->portnr);
810			name = out_name;
811			break;
812		}
813		default:
814			break;
815		}
816	}
817	if (!name) {
818		switch (id) {
819		/* DSDT: acpi/lpss.asl */
820		case UCLASS_SERIAL:
821			sprintf(out_name, "URT%d", dev_seq(dev));
822			name = out_name;
823			break;
824		case UCLASS_I2C:
825			sprintf(out_name, "I2C%d", dev_seq(dev));
826			name = out_name;
827			break;
828		case UCLASS_SPI:
829			sprintf(out_name, "SPI%d", dev_seq(dev));
830			name = out_name;
831			break;
832		default:
833			break;
834		}
835	}
836	if (!name) {
837		log_warning("No name for device '%s'\n", dev->name);
838		return -ENOENT;
839	}
840	if (name != out_name)
841		acpi_copy_name(out_name, name);
842
843	return 0;
844}
845