1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright (c) 2009 Wind River Systems, Inc. 4 * Tom Rix <Tom.Rix at windriver.com> 5 * 6 * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git 7 * 8 * Copyright (C) 2007-2009 Texas Instruments, Inc. 9 */ 10 11#ifndef TWL4030_H 12#define TWL4030_H 13 14#include <i2c.h> 15 16/* I2C chip addresses */ 17 18/* USB */ 19#define TWL4030_CHIP_USB 0x48 20/* AUD */ 21#define TWL4030_CHIP_AUDIO_VOICE 0x49 22#define TWL4030_CHIP_GPIO 0x49 23#define TWL4030_CHIP_INTBR 0x49 24#define TWL4030_CHIP_PIH 0x49 25#define TWL4030_CHIP_TEST 0x49 26/* AUX */ 27#define TWL4030_CHIP_KEYPAD 0x4a 28#define TWL4030_CHIP_MADC 0x4a 29#define TWL4030_CHIP_INTERRUPTS 0x4a 30#define TWL4030_CHIP_LED 0x4a 31#define TWL4030_CHIP_MAIN_CHARGE 0x4a 32#define TWL4030_CHIP_PRECHARGE 0x4a 33#define TWL4030_CHIP_PWM0 0x4a 34#define TWL4030_CHIP_PWM1 0x4a 35#define TWL4030_CHIP_PWMA 0x4a 36#define TWL4030_CHIP_PWMB 0x4a 37/* POWER */ 38#define TWL4030_CHIP_BACKUP 0x4b 39#define TWL4030_CHIP_INT 0x4b 40#define TWL4030_CHIP_PM_MASTER 0x4b 41#define TWL4030_CHIP_PM_RECEIVER 0x4b 42#define TWL4030_CHIP_RTC 0x4b 43#define TWL4030_CHIP_SECURED_REG 0x4b 44 45/* Register base addresses */ 46 47/* USB */ 48#define TWL4030_BASEADD_USB 0x0000 49/* AUD */ 50#define TWL4030_BASEADD_AUDIO_VOICE 0x0000 51#define TWL4030_BASEADD_GPIO 0x0098 52#define TWL4030_BASEADD_INTBR 0x0085 53#define TWL4030_BASEADD_PIH 0x0080 54#define TWL4030_BASEADD_TEST 0x004C 55/* AUX */ 56#define TWL4030_BASEADD_INTERRUPTS 0x00B9 57#define TWL4030_BASEADD_LED 0x00EE 58#define TWL4030_BASEADD_MADC 0x0000 59#define TWL4030_BASEADD_MAIN_CHARGE 0x0074 60#define TWL4030_BASEADD_PRECHARGE 0x00AA 61#define TWL4030_BASEADD_PWM0 0x00F8 62#define TWL4030_BASEADD_PWM1 0x00FB 63#define TWL4030_BASEADD_PWMA 0x00EF 64#define TWL4030_BASEADD_PWMB 0x00F1 65#define TWL4030_BASEADD_KEYPAD 0x00D2 66/* POWER */ 67#define TWL4030_BASEADD_BACKUP 0x0014 68#define TWL4030_BASEADD_INT 0x002E 69#define TWL4030_BASEADD_PM_MASTER 0x0036 70#define TWL4030_BASEADD_PM_RECIEVER 0x005B 71#define TWL4030_BASEADD_RTC 0x001C 72#define TWL4030_BASEADD_SECURED_REG 0x0000 73 74/* 75 * Power Management Master 76 */ 77#define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x36 78#define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x37 79#define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x38 80#define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x39 81#define TWL4030_PM_MASTER_STS_BOOT 0x3A 82#define TWL4030_PM_MASTER_CFG_BOOT 0x3B 83#define TWL4030_PM_MASTER_SHUNDAN 0x3C 84#define TWL4030_PM_MASTER_BOOT_BCI 0x3D 85#define TWL4030_PM_MASTER_CFG_PWRANA1 0x3E 86#define TWL4030_PM_MASTER_CFG_PWRANA2 0x3F 87#define TWL4030_PM_MASTER_BGAP_TRIM 0x40 88#define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x41 89#define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x42 90#define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x43 91#define TWL4030_PM_MASTER_PROTECT_KEY 0x44 92#define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x45 93#define TWL4030_PM_MASTER_P1_SW_EVENTS 0x46 94#define TWL4030_PM_MASTER_P2_SW_EVENTS 0x47 95#define TWL4030_PM_MASTER_P3_SW_EVENTS 0x48 96#define TWL4030_PM_MASTER_STS_P123_STATE 0x49 97#define TWL4030_PM_MASTER_PB_CFG 0x4A 98#define TWL4030_PM_MASTER_PB_WORD_MSB 0x4B 99#define TWL4030_PM_MASTER_PB_WORD_LSB 0x4C 100#define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x52 101#define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x53 102#define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x54 103#define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x55 104#define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x56 105#define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x57 106#define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x58 107#define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x59 108#define TWL4030_PM_MASTER_MEMORY_DATA 0x5A 109#define TWL4030_PM_MASTER_SC_CONFIG 0x5B 110#define TWL4030_PM_MASTER_SC_DETECT1 0x5C 111#define TWL4030_PM_MASTER_SC_DETECT2 0x5D 112#define TWL4030_PM_MASTER_WATCHDOG_CFG 0x5E 113#define TWL4030_PM_MASTER_IT_CHECK_CFG 0x5F 114#define TWL4030_PM_MASTER_VIBRATOR_CFG 0x60 115#define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG 0x61 116#define TWL4030_PM_MASTER_VDD1_TRIM1 0x62 117#define TWL4030_PM_MASTER_VDD1_TRIM2 0x63 118#define TWL4030_PM_MASTER_VDD2_TRIM1 0x64 119#define TWL4030_PM_MASTER_VDD2_TRIM2 0x65 120#define TWL4030_PM_MASTER_VIO_TRIM1 0x66 121#define TWL4030_PM_MASTER_VIO_TRIM2 0x67 122#define TWL4030_PM_MASTER_MISC_CFG 0x68 123#define TWL4030_PM_MASTER_LS_TST_A 0x69 124#define TWL4030_PM_MASTER_LS_TST_B 0x6A 125#define TWL4030_PM_MASTER_LS_TST_C 0x6B 126#define TWL4030_PM_MASTER_LS_TST_D 0x6C 127#define TWL4030_PM_MASTER_BB_CFG 0x6D 128#define TWL4030_PM_MASTER_MISC_TST 0x6E 129#define TWL4030_PM_MASTER_TRIM1 0x6F 130 131/* Power bus message definitions */ 132 133/* The TWL4030/5030 splits its power-management resources (the various 134 * regulators, clock and reset lines) into 3 processor groups - P1, P2 and 135 * P3. These groups can then be configured to transition between sleep, wait-on 136 * and active states by sending messages to the power bus. See Section 5.4.2 137 * Power Resources of TWL4030 TRM 138 */ 139 140/* Processor groups */ 141#define DEV_GRP_NULL 0x0 142#define DEV_GRP_P1 0x1 /* P1: all OMAP devices */ 143#define DEV_GRP_P2 0x2 /* P2: all Modem devices */ 144#define DEV_GRP_P3 0x4 /* P3: all peripheral devices */ 145 146/* Resource groups */ 147#define RES_GRP_RES 0x0 /* Reserved */ 148#define RES_GRP_PP 0x1 /* Power providers */ 149#define RES_GRP_RC 0x2 /* Reset and control */ 150#define RES_GRP_PP_RC 0x3 151#define RES_GRP_PR 0x4 /* Power references */ 152#define RES_GRP_PP_PR 0x5 153#define RES_GRP_RC_PR 0x6 154#define RES_GRP_ALL 0x7 /* All resource groups */ 155 156#define RES_TYPE2_R0 0x0 157 158#define RES_TYPE_ALL 0x7 159 160/* Resource states */ 161#define RES_STATE_WRST 0xF 162#define RES_STATE_ACTIVE 0xE 163#define RES_STATE_SLEEP 0x8 164#define RES_STATE_OFF 0x0 165 166/* Power resources */ 167 168/* Power providers */ 169#define RES_VAUX1 1 170#define RES_VAUX2 2 171#define RES_VAUX3 3 172#define RES_VAUX4 4 173#define RES_VMMC1 5 174#define RES_VMMC2 6 175#define RES_VPLL1 7 176#define RES_VPLL2 8 177#define RES_VSIM 9 178#define RES_VDAC 10 179#define RES_VINTANA1 11 180#define RES_VINTANA2 12 181#define RES_VINTDIG 13 182#define RES_VIO 14 183#define RES_VDD1 15 184#define RES_VDD2 16 185#define RES_VUSB_1V5 17 186#define RES_VUSB_1V8 18 187#define RES_VUSB_3V1 19 188#define RES_VUSBCP 20 189#define RES_REGEN 21 190/* Reset and control */ 191#define RES_NRES_PWRON 22 192#define RES_CLKEN 23 193#define RES_SYSEN 24 194#define RES_HFCLKOUT 25 195#define RES_32KCLKOUT 26 196#define RES_RESET 27 197/* Power Reference */ 198#define RES_Main_Ref 28 199 200/* P[1-3]_SW_EVENTS */ 201#define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON (1 << 6) 202#define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN (1 << 5) 203#define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET (1 << 4) 204#define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP (1 << 3) 205#define TWL4030_PM_MASTER_SW_EVENTS_DEVACT (1 << 2) 206#define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP (1 << 1) 207#define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0) 208 209/* HW conditions */ 210#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_PWON (1 << 0) 211#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_CHG (1 << 1) 212#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_USB (1 << 2) 213#define TWL4030_PM_MASTER_STS_HW_CONDITIONS_VBUS (1 << 7) 214 215/* Power transition */ 216#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_PWON (1 << 0) 217#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_CHG (1 << 1) 218#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_USB (1 << 2) 219#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_RTC (1 << 3) 220#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBAT (1 << 4) 221#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_VBUS (1 << 5) 222#define TWL4030_PM_MASTER_CFG_TRANSITION_STARTON_SWBUG (1 << 7) 223 224/* PWRANA2 */ 225#define TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT0_LOWV (1 << 1) 226#define TWL4030_PM_MASTER_CFG_PWRANA2_LOJIT1_LOWV (1 << 2) 227 228#define TOTAL_RESOURCES 28 229/* 230 * Power Bus Message Format ... these can be sent individually by Linux, 231 * but are usually part of downloaded scripts that are run when various 232 * power events are triggered. 233 * 234 * Broadcast Message (16 Bits): 235 * DEV_GRP[15:13] MT[12] RES_GRP[11:9] RES_TYPE2[8:7] RES_TYPE[6:4] 236 * RES_STATE[3:0] 237 * 238 * Singular Message (16 Bits): 239 * DEV_GRP[15:13] MT[12] RES_ID[11:4] RES_STATE[3:0] 240 */ 241 242#define MSG_BROADCAST(devgrp, grp, type, type2, state) \ 243 ((devgrp) << 13 | 1 << 12 | (grp) << 9 | (type2) << 7 \ 244 | (type) << 4 | (state)) 245 246#define MSG_SINGULAR(devgrp, id, state) \ 247 ((devgrp) << 13 | 0 << 12 | (id) << 4 | (state)) 248 249#define MSG_BROADCAST_ALL(devgrp, state) \ 250 ((devgrp) << 5 | (state)) 251 252#define MSG_BROADCAST_REF MSG_BROADCAST_ALL 253#define MSG_BROADCAST_PROV MSG_BROADCAST_ALL 254#define MSG_BROADCAST__CLK_RST MSG_BROADCAST_ALL 255 256/* Power Managment Receiver */ 257#define TWL4030_PM_RECEIVER_SC_CONFIG 0x5B 258#define TWL4030_PM_RECEIVER_SC_DETECT1 0x5C 259#define TWL4030_PM_RECEIVER_SC_DETECT2 0x5D 260#define TWL4030_PM_RECEIVER_WATCHDOG_CFG 0x5E 261#define TWL4030_PM_RECEIVER_IT_CHECK_CFG 0x5F 262#define TWL4030_PM_RECEIVER_VIBRATOR_CFG 0x5F 263#define TWL4030_PM_RECEIVER_DC_TO_DC_CFG 0x61 264#define TWL4030_PM_RECEIVER_VDD1_TRIM1 0x62 265#define TWL4030_PM_RECEIVER_VDD1_TRIM2 0x63 266#define TWL4030_PM_RECEIVER_VDD2_TRIM1 0x64 267#define TWL4030_PM_RECEIVER_VDD2_TRIM2 0x65 268#define TWL4030_PM_RECEIVER_VIO_TRIM1 0x66 269#define TWL4030_PM_RECEIVER_VIO_TRIM2 0x67 270#define TWL4030_PM_RECEIVER_MISC_CFG 0x68 271#define TWL4030_PM_RECEIVER_LS_TST_A 0x69 272#define TWL4030_PM_RECEIVER_LS_TST_B 0x6A 273#define TWL4030_PM_RECEIVER_LS_TST_C 0x6B 274#define TWL4030_PM_RECEIVER_LS_TST_D 0x6C 275#define TWL4030_PM_RECEIVER_BB_CFG 0x6D 276#define TWL4030_PM_RECEIVER_MISC_TST 0x6E 277#define TWL4030_PM_RECEIVER_TRIM1 0x6F 278#define TWL4030_PM_RECEIVER_TRIM2 0x70 279#define TWL4030_PM_RECEIVER_DC_DC_TIMEOUT 0x71 280#define TWL4030_PM_RECEIVER_VAUX1_DEV_GRP 0x72 281#define TWL4030_PM_RECEIVER_VAUX1_TYPE 0x73 282#define TWL4030_PM_RECEIVER_VAUX1_REMAP 0x74 283#define TWL4030_PM_RECEIVER_VAUX1_DEDICATED 0x75 284#define TWL4030_PM_RECEIVER_VAUX2_DEV_GRP 0x76 285#define TWL4030_PM_RECEIVER_VAUX2_TYPE 0x77 286#define TWL4030_PM_RECEIVER_VAUX2_REMAP 0x78 287#define TWL4030_PM_RECEIVER_VAUX2_DEDICATED 0x79 288#define TWL4030_PM_RECEIVER_VAUX3_DEV_GRP 0x7A 289#define TWL4030_PM_RECEIVER_VAUX3_TYPE 0x7B 290#define TWL4030_PM_RECEIVER_VAUX3_REMAP 0x7C 291#define TWL4030_PM_RECEIVER_VAUX3_DEDICATED 0x7D 292#define TWL4030_PM_RECEIVER_VAUX4_DEV_GRP 0x7E 293#define TWL4030_PM_RECEIVER_VAUX4_TYPE 0x7F 294#define TWL4030_PM_RECEIVER_VAUX4_REMAP 0x80 295#define TWL4030_PM_RECEIVER_VAUX4_DEDICATED 0x81 296#define TWL4030_PM_RECEIVER_VMMC1_DEV_GRP 0x82 297#define TWL4030_PM_RECEIVER_VMMC1_TYPE 0x83 298#define TWL4030_PM_RECEIVER_VMMC1_REMAP 0x84 299#define TWL4030_PM_RECEIVER_VMMC1_DEDICATED 0x85 300#define TWL4030_PM_RECEIVER_VMMC2_DEV_GRP 0x86 301#define TWL4030_PM_RECEIVER_VMMC2_TYPE 0x87 302#define TWL4030_PM_RECEIVER_VMMC2_REMAP 0x88 303#define TWL4030_PM_RECEIVER_VMMC2_DEDICATED 0x89 304#define TWL4030_PM_RECEIVER_VPLL1_DEV_GRP 0x8A 305#define TWL4030_PM_RECEIVER_VPLL1_TYPE 0x8B 306#define TWL4030_PM_RECEIVER_VPLL1_REMAP 0x8C 307#define TWL4030_PM_RECEIVER_VPLL1_DEDICATED 0x8D 308#define TWL4030_PM_RECEIVER_VPLL2_DEV_GRP 0x8E 309#define TWL4030_PM_RECEIVER_VPLL2_TYPE 0x8F 310#define TWL4030_PM_RECEIVER_VPLL2_REMAP 0x90 311#define TWL4030_PM_RECEIVER_VPLL2_DEDICATED 0x91 312#define TWL4030_PM_RECEIVER_VSIM_DEV_GRP 0x92 313#define TWL4030_PM_RECEIVER_VSIM_TYPE 0x93 314#define TWL4030_PM_RECEIVER_VSIM_REMAP 0x94 315#define TWL4030_PM_RECEIVER_VSIM_DEDICATED 0x95 316#define TWL4030_PM_RECEIVER_VDAC_DEV_GRP 0x96 317#define TWL4030_PM_RECEIVER_VDAC_TYPE 0x97 318#define TWL4030_PM_RECEIVER_VDAC_REMAP 0x98 319#define TWL4030_PM_RECEIVER_VDAC_DEDICATED 0x99 320#define TWL4030_PM_RECEIVER_VINTANA1_DEV_GRP 0x9A 321#define TWL4030_PM_RECEIVER_VINTANA1_TYP 0x9B 322#define TWL4030_PM_RECEIVER_VINTANA1_REMAP 0x9C 323#define TWL4030_PM_RECEIVER_VINTANA1_DEDICATED 0x9D 324#define TWL4030_PM_RECEIVER_VINTANA2_DEV_GRP 0x9E 325#define TWL4030_PM_RECEIVER_VINTANA2_TYPE 0x9F 326#define TWL4030_PM_RECEIVER_VINTANA2_REMAP 0xA0 327#define TWL4030_PM_RECEIVER_VINTANA2_DEDICATED 0xA1 328#define TWL4030_PM_RECEIVER_VINTDIG_DEV_GRP 0xA2 329#define TWL4030_PM_RECEIVER_VINTDIG_TYPE 0xA3 330#define TWL4030_PM_RECEIVER_VINTDIG_REMAP 0xA4 331#define TWL4030_PM_RECEIVER_VINTDIG_DEDICATED 0xA5 332#define TWL4030_PM_RECEIVER_VIO_DEV_GRP 0xA6 333#define TWL4030_PM_RECEIVER_VIO_TYPE 0xA7 334#define TWL4030_PM_RECEIVER_VIO_REMAP 0xA8 335#define TWL4030_PM_RECEIVER_VIO_CFG 0xA9 336#define TWL4030_PM_RECEIVER_VIO_MISC_CFG 0xAA 337#define TWL4030_PM_RECEIVER_VIO_TEST1 0xAB 338#define TWL4030_PM_RECEIVER_VIO_TEST2 0xAC 339#define TWL4030_PM_RECEIVER_VIO_OSC 0xAD 340#define TWL4030_PM_RECEIVER_VIO_RESERVED 0xAE 341#define TWL4030_PM_RECEIVER_VIO_VSEL 0xAF 342#define TWL4030_PM_RECEIVER_VDD1_DEV_GRP 0xB0 343#define TWL4030_PM_RECEIVER_VDD1_TYPE 0xB1 344#define TWL4030_PM_RECEIVER_VDD1_REMAP 0xB2 345#define TWL4030_PM_RECEIVER_VDD1_CFG 0xB3 346#define TWL4030_PM_RECEIVER_VDD1_MISC_CFG 0xB4 347#define TWL4030_PM_RECEIVER_VDD1_TEST1 0xB5 348#define TWL4030_PM_RECEIVER_VDD1_TEST2 0xB6 349#define TWL4030_PM_RECEIVER_VDD1_OSC 0xB7 350#define TWL4030_PM_RECEIVER_VDD1_RESERVED 0xB8 351#define TWL4030_PM_RECEIVER_VDD1_VSEL 0xB9 352#define TWL4030_PM_RECEIVER_VDD1_VMODE_CFG 0xBA 353#define TWL4030_PM_RECEIVER_VDD1_VFLOOR 0xBB 354#define TWL4030_PM_RECEIVER_VDD1_VROOF 0xBC 355#define TWL4030_PM_RECEIVER_VDD1_STEP 0xBD 356#define TWL4030_PM_RECEIVER_VDD2_DEV_GRP 0xBE 357#define TWL4030_PM_RECEIVER_VDD2_TYPE 0xBF 358#define TWL4030_PM_RECEIVER_VDD2_REMAP 0xC0 359#define TWL4030_PM_RECEIVER_VDD2_CFG 0xC1 360#define TWL4030_PM_RECEIVER_VDD2_MISC_CFG 0xC2 361#define TWL4030_PM_RECEIVER_VDD2_TEST1 0xC3 362#define TWL4030_PM_RECEIVER_VDD2_TEST2 0xC4 363#define TWL4030_PM_RECEIVER_VDD2_OSC 0xC5 364#define TWL4030_PM_RECEIVER_VDD2_RESERVED 0xC6 365#define TWL4030_PM_RECEIVER_VDD2_VSEL 0xC7 366#define TWL4030_PM_RECEIVER_VDD2_VMODE_CFG 0xC8 367#define TWL4030_PM_RECEIVER_VDD2_VFLOOR 0xC9 368#define TWL4030_PM_RECEIVER_VDD2_VROOF 0xCA 369#define TWL4030_PM_RECEIVER_VDD2_STEP 0xCB 370#define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC 371#define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD 372#define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE 373#define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP 0xCF 374#define TWL4030_PM_RECEIVER_VUSB1V8_TYPE 0xD0 375#define TWL4030_PM_RECEIVER_VUSB1V8_REMAP 0xD1 376#define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP 0xD2 377#define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3 378#define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4 379#define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5 380#define TWL4030_PM_RECEIVER_VUSBCP_TYPE 0xD6 381#define TWL4030_PM_RECEIVER_VUSBCP_REMAP 0xD7 382#define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8 383#define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9 384#define TWL4030_PM_RECEIVER_REGEN_DEV_GRP 0xDA 385#define TWL4030_PM_RECEIVER_REGEN_TYPE 0xDB 386#define TWL4030_PM_RECEIVER_REGEN_REMAP 0xDC 387#define TWL4030_PM_RECEIVER_NRESPWRON_DEV_GRP 0xDD 388#define TWL4030_PM_RECEIVER_NRESPWRON_TYPE 0xDE 389#define TWL4030_PM_RECEIVER_NRESPWRON_REMAP 0xDF 390#define TWL4030_PM_RECEIVER_CLKEN_DEV_GRP 0xE0 391#define TWL4030_PM_RECEIVER_CLKEN_TYPE 0xE1 392#define TWL4030_PM_RECEIVER_CLKEN_REMAP 0xE2 393#define TWL4030_PM_RECEIVER_SYSEN_DEV_GRP 0xE3 394#define TWL4030_PM_RECEIVER_SYSEN_TYPE 0xE4 395#define TWL4030_PM_RECEIVER_SYSEN_REMAP 0xE5 396#define TWL4030_PM_RECEIVER_HFCLKOUT_DEV_GRP 0xE6 397#define TWL4030_PM_RECEIVER_HFCLKOUT_TYPE 0xE7 398#define TWL4030_PM_RECEIVER_HFCLKOUT_REMAP 0xE8 399#define TWL4030_PM_RECEIVER_32KCLKOUT_DEV_GRP 0xE9 400#define TWL4030_PM_RECEIVER_32KCLKOUT_TYPE 0xEA 401#define TWL4030_PM_RECEIVER_32KCLKOUT_REMAP 0xEB 402#define TWL4030_PM_RECEIVER_TRITON_RESET_DEV_GRP 0xEC 403#define TWL4030_PM_RECEIVER_TRITON_RESET_TYPE 0xED 404#define TWL4030_PM_RECEIVER_TRITON_RESET_REMAP 0xEE 405#define TWL4030_PM_RECEIVER_MAINREF_DEV_GRP 0xEF 406#define TWL4030_PM_RECEIVER_MAINREF_TYPE 0xF0 407#define TWL4030_PM_RECEIVER_MAINREF_REMAP 0xF1 408 409/* Voltage Selection in PM Receiver Module */ 410#define TWL4030_PM_RECEIVER_VAUX2_VSEL_18 0x05 411#define TWL4030_PM_RECEIVER_VAUX2_VSEL_28 0x09 412#define TWL4030_PM_RECEIVER_VAUX3_VSEL_18 0x01 413#define TWL4030_PM_RECEIVER_VAUX3_VSEL_28 0x03 414#define TWL4030_PM_RECEIVER_VPLL2_VSEL_18 0x05 415#define TWL4030_PM_RECEIVER_VDAC_VSEL_18 0x03 416#define TWL4030_PM_RECEIVER_VMMC1_VSEL_30 0x02 417#define TWL4030_PM_RECEIVER_VMMC1_VSEL_32 0x03 418#define TWL4030_PM_RECEIVER_VMMC2_VSEL_30 0x0B 419#define TWL4030_PM_RECEIVER_VMMC2_VSEL_32 0x0C 420#define TWL4030_PM_RECEIVER_VSIM_VSEL_18 0x03 421 422/* Device Selection in PM Receiver Module */ 423#define TWL4030_PM_RECEIVER_DEV_GRP_P1 0x20 424#define TWL4030_PM_RECEIVER_DEV_GRP_ALL 0xE0 425 426/* LED */ 427#define TWL4030_LED_LEDEN 0xEE 428#define TWL4030_LED_LEDEN_LEDAON (1 << 0) 429#define TWL4030_LED_LEDEN_LEDBON (1 << 1) 430#define TWL4030_LED_LEDEN_LEDAPWM (1 << 4) 431#define TWL4030_LED_LEDEN_LEDBPWM (1 << 5) 432 433/* Keypad */ 434#define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 435#define TWL4030_KEYPAD_KEY_DEB_REG 0xD3 436#define TWL4030_KEYPAD_LONG_KEY_REG1 0xD4 437#define TWL4030_KEYPAD_LK_PTV_REG 0xD5 438#define TWL4030_KEYPAD_TIME_OUT_REG1 0xD6 439#define TWL4030_KEYPAD_TIME_OUT_REG2 0xD7 440#define TWL4030_KEYPAD_KBC_REG 0xD8 441#define TWL4030_KEYPAD_KBR_REG 0xD9 442#define TWL4030_KEYPAD_KEYP_SMS 0xDA 443#define TWL4030_KEYPAD_FULL_CODE_7_0 0xDB 444#define TWL4030_KEYPAD_FULL_CODE_15_8 0xDC 445#define TWL4030_KEYPAD_FULL_CODE_23_16 0xDD 446#define TWL4030_KEYPAD_FULL_CODE_31_24 0xDE 447#define TWL4030_KEYPAD_FULL_CODE_39_32 0xDF 448#define TWL4030_KEYPAD_FULL_CODE_47_40 0xE0 449#define TWL4030_KEYPAD_FULL_CODE_55_48 0xE1 450#define TWL4030_KEYPAD_FULL_CODE_63_56 0xE2 451#define TWL4030_KEYPAD_KEYP_ISR1 0xE3 452#define TWL4030_KEYPAD_KEYP_IMR1 0xE4 453#define TWL4030_KEYPAD_KEYP_ISR2 0xE5 454#define TWL4030_KEYPAD_KEYP_IMR2 0xE6 455#define TWL4030_KEYPAD_KEYP_SIR 0xE7 456#define TWL4030_KEYPAD_KEYP_EDR 0xE8 457#define TWL4030_KEYPAD_KEYP_SIH_CTRL 0xE9 458 459#define TWL4030_KEYPAD_CTRL_KBD_ON (1 << 6) 460#define TWL4030_KEYPAD_CTRL_RP_EN (1 << 5) 461#define TWL4030_KEYPAD_CTRL_TOLE_EN (1 << 4) 462#define TWL4030_KEYPAD_CTRL_TOE_EN (1 << 3) 463#define TWL4030_KEYPAD_CTRL_LK_EN (1 << 2) 464#define TWL4030_KEYPAD_CTRL_SOFTMODEN (1 << 1) 465#define TWL4030_KEYPAD_CTRL_SOFT_NRST (1 << 0) 466 467/* USB */ 468#define TWL4030_USB_VENDOR_ID_LO 0x00 469#define TWL4030_USB_VENDOR_ID_HI 0x01 470#define TWL4030_USB_PRODUCT_ID_LO 0x02 471#define TWL4030_USB_PRODUCT_ID_HI 0x03 472#define TWL4030_USB_FUNC_CTRL 0x04 473#define TWL4030_USB_FUNC_CTRL_SET 0x05 474#define TWL4030_USB_FUNC_CTRL_CLR 0x06 475#define TWL4030_USB_IFC_CTRL 0x07 476#define TWL4030_USB_IFC_CTRL_SET 0x08 477#define TWL4030_USB_IFC_CTRL_CLR 0x09 478#define TWL4030_USB_OTG_CTRL 0x0A 479#define TWL4030_USB_OTG_CTRL_SET 0x0B 480#define TWL4030_USB_OTG_CTRL_CLR 0x0C 481#define TWL4030_USB_USB_INT_EN_RISE 0x0D 482#define TWL4030_USB_USB_INT_EN_RISE_SET 0x0E 483#define TWL4030_USB_USB_INT_EN_RISE_CLR 0x0F 484#define TWL4030_USB_USB_INT_EN_FALL 0x10 485#define TWL4030_USB_USB_INT_EN_FALL_SET 0x11 486#define TWL4030_USB_USB_INT_EN_FALL_CLR 0x12 487#define TWL4030_USB_USB_INT_STS 0x13 488#define TWL4030_USB_USB_INT_LATCH 0x14 489#define TWL4030_USB_DEBUG 0x15 490#define TWL4030_USB_SCRATCH_REG 0x16 491#define TWL4030_USB_SCRATCH_REG_SET 0x17 492#define TWL4030_USB_SCRATCH_REG_CLR 0x18 493#define TWL4030_USB_CARKIT_CTRL 0x19 494#define TWL4030_USB_CARKIT_CTRL_SET 0x1A 495#define TWL4030_USB_CARKIT_CTRL_CLR 0x1B 496#define TWL4030_USB_CARKIT_INT_DELAY 0x1C 497#define TWL4030_USB_CARKIT_INT_EN 0x1D 498#define TWL4030_USB_CARKIT_INT_EN_SET 0x1E 499#define TWL4030_USB_CARKIT_INT_EN_CLR 0x1F 500#define TWL4030_USB_CARKIT_INT_STS 0x20 501#define TWL4030_USB_CARKIT_INT_LATCH 0x21 502#define TWL4030_USB_CARKIT_PLS_CTRL 0x22 503#define TWL4030_USB_CARKIT_PLS_CTRL_SET 0x23 504#define TWL4030_USB_CARKIT_PLS_CTRL_CLR 0x24 505#define TWL4030_USB_TRANS_POS_WIDTH 0x25 506#define TWL4030_USB_TRANS_NEG_WIDTH 0x26 507#define TWL4030_USB_RCV_PLTY_RECOVERY 0x27 508#define TWL4030_USB_MCPC_CTRL 0x30 509#define TWL4030_USB_MCPC_CTRL_SET 0x31 510#define TWL4030_USB_MCPC_CTRL_CLR 0x32 511#define TWL4030_USB_MCPC_IO_CTRL 0x33 512#define TWL4030_USB_MCPC_IO_CTRL_SET 0x34 513#define TWL4030_USB_MCPC_IO_CTRL_CLR 0x35 514#define TWL4030_USB_MCPC_CTRL2 0x36 515#define TWL4030_USB_MCPC_CTRL2_SET 0x37 516#define TWL4030_USB_MCPC_CTRL2_CLR 0x38 517#define TWL4030_USB_OTHER_FUNC_CTRL 0x80 518#define TWL4030_USB_OTHER_FUNC_CTRL_SET 0x81 519#define TWL4030_USB_OTHER_FUNC_CTRL_CLR 0x82 520#define TWL4030_USB_OTHER_IFC_CTRL 0x83 521#define TWL4030_USB_OTHER_IFC_CTRL_SET 0x84 522#define TWL4030_USB_OTHER_IFC_CTRL_CLR 0x85 523#define TWL4030_USB_OTHER_INT_EN_RISE_SET 0x87 524#define TWL4030_USB_OTHER_INT_EN_RISE_CLR 0x88 525#define TWL4030_USB_OTHER_INT_EN_FALL 0x89 526#define TWL4030_USB_OTHER_INT_EN_FALL_SET 0x8A 527#define TWL4030_USB_OTHER_INT_EN_FALL_CLR 0x8B 528#define TWL4030_USB_OTHER_INT_STS 0x8C 529#define TWL4030_USB_OTHER_INT_LATCH 0x8D 530#define TWL4030_USB_ID_STATUS 0x96 531#define TWL4030_USB_CARKIT_SM_1_INT_EN 0x97 532#define TWL4030_USB_CARKIT_SM_1_INT_EN_SET 0x98 533#define TWL4030_USB_CARKIT_SM_1_INT_EN_CLR 0x99 534#define TWL4030_USB_CARKIT_SM_1_INT_STS 0x9A 535#define TWL4030_USB_CARKIT_SM_1_INT_LATCH 0x9B 536#define TWL4030_USB_CARKIT_SM_2_INT_EN 0x9C 537#define TWL4030_USB_CARKIT_SM_2_INT_EN_SET 0x9D 538#define TWL4030_USB_CARKIT_SM_2_INT_EN_CLR 0x9E 539#define TWL4030_USB_CARKIT_SM_2_INT_STS 0x9F 540#define TWL4030_USB_CARKIT_SM_2_INT_LATCH 0xA0 541#define TWL4030_USB_CARKIT_SM_CTRL 0xA1 542#define TWL4030_USB_CARKIT_SM_CTRL_SET 0xA2 543#define TWL4030_USB_CARKIT_SM_CTRL_CLR 0xA3 544#define TWL4030_USB_CARKIT_SM_CMD 0xA4 545#define TWL4030_USB_CARKIT_SM_CMD_SET 0xA5 546#define TWL4030_USB_CARKIT_SM_CMD_CLR 0xA6 547#define TWL4030_USB_CARKIT_SM_CMD_STS 0xA7 548#define TWL4030_USB_CARKIT_SM_STATUS 0xA8 549#define TWL4030_USB_CARKIT_SM_ERR_STATUS 0xAA 550#define TWL4030_USB_CARKIT_SM_CTRL_STATE 0xAB 551#define TWL4030_USB_POWER_CTRL 0xAC 552#define TWL4030_USB_POWER_CTRL_SET 0xAD 553#define TWL4030_USB_POWER_CTRL_CLR 0xAE 554#define TWL4030_USB_OTHER_IFC_CTRL2 0xAF 555#define TWL4030_USB_OTHER_IFC_CTRL2_SET 0xB0 556#define TWL4030_USB_OTHER_IFC_CTRL2_CLR 0xB1 557#define TWL4030_USB_REG_CTRL_EN 0xB2 558#define TWL4030_USB_REG_CTRL_EN_SET 0xB3 559#define TWL4030_USB_REG_CTRL_EN_CLR 0xB4 560#define TWL4030_USB_REG_CTRL_ERROR 0xB5 561#define TWL4030_USB_OTHER_FUNC_CTRL2 0xB8 562#define TWL4030_USB_OTHER_FUNC_CTRL2_SET 0xB9 563#define TWL4030_USB_OTHER_FUNC_CTRL2_CLR 0xBA 564#define TWL4030_USB_CARKIT_ANA_CTRL 0xBB 565#define TWL4030_USB_CARKIT_ANA_CTRL_SET 0xBC 566#define TWL4030_USB_CARKIT_ANA_CTRL_CLR 0xBD 567#define TWL4030_USB_VBUS_DEBOUNCE 0xC0 568#define TWL4030_USB_ID_DEBOUNCE 0xC1 569#define TWL4030_USB_TPH_DP_CON_MIN 0xC2 570#define TWL4030_USB_TPH_DP_CON_MAX 0xC3 571#define TWL4030_USB_TCR_DP_CON_MIN 0xC4 572#define TWL4030_USB_TCR_DP_CON_MAX 0xC5 573#define TWL4030_USB_TPH_DP_PD_SHORT 0xC6 574#define TWL4030_USB_TPH_CMD_DLY 0xC7 575#define TWL4030_USB_TPH_DET_RST 0xC8 576#define TWL4030_USB_TPH_AUD_BIAS 0xC9 577#define TWL4030_USB_TCR_UART_DET_MIN 0xCA 578#define TWL4030_USB_TCR_UART_DET_MAX 0xCB 579#define TWL4030_USB_TPH_ID_INT_PW 0xCD 580#define TWL4030_USB_TACC_ID_INT_WAIT 0xCE 581#define TWL4030_USB_TACC_ID_INT_PW 0xCF 582#define TWL4030_USB_TPH_CMD_WAIT 0xD0 583#define TWL4030_USB_TPH_ACK_WAIT 0xD1 584#define TWL4030_USB_TPH_DP_DISC_DET 0xD2 585#define TWL4030_USB_VBAT_TIMER 0xD3 586#define TWL4030_USB_CARKIT_4W_DEBUG 0xE0 587#define TWL4030_USB_CARKIT_5W_DEBUG 0xE1 588#define TWL4030_USB_PHY_PWR_CTRL 0xFD 589#define TWL4030_USB_PHY_CLK_CTRL 0xFE 590#define TWL4030_USB_PHY_CLK_CTRL_STS 0xFF 591 592/* GPIO */ 593#define TWL4030_GPIO_GPIODATAIN1 0x00 594#define TWL4030_GPIO_GPIODATAIN2 0x01 595#define TWL4030_GPIO_GPIODATAIN3 0x02 596#define TWL4030_GPIO_GPIODATADIR1 0x03 597#define TWL4030_GPIO_GPIODATADIR2 0x04 598#define TWL4030_GPIO_GPIODATADIR3 0x05 599#define TWL4030_GPIO_GPIODATAOUT1 0x06 600#define TWL4030_GPIO_GPIODATAOUT2 0x07 601#define TWL4030_GPIO_GPIODATAOUT3 0x08 602#define TWL4030_GPIO_CLEARGPIODATAOUT1 0x09 603#define TWL4030_GPIO_CLEARGPIODATAOUT2 0x0A 604#define TWL4030_GPIO_CLEARGPIODATAOUT3 0x0B 605#define TWL4030_GPIO_SETGPIODATAOUT1 0x0C 606#define TWL4030_GPIO_SETGPIODATAOUT2 0x0D 607#define TWL4030_GPIO_SETGPIODATAOUT3 0x0E 608#define TWL4030_GPIO_GPIO_DEBEN1 0x0F 609#define TWL4030_GPIO_GPIO_DEBEN2 0x10 610#define TWL4030_GPIO_GPIO_DEBEN3 0x11 611#define TWL4030_GPIO_GPIO_CTRL 0x12 612#define TWL4030_GPIO_GPIOPUPDCTR1 0x13 613#define TWL4030_GPIO_GPIOPUPDCTR2 0x14 614#define TWL4030_GPIO_GPIOPUPDCTR3 0x15 615#define TWL4030_GPIO_GPIOPUPDCTR4 0x16 616#define TWL4030_GPIO_GPIOPUPDCTR5 0x17 617#define TWL4030_GPIO_GPIO_ISR1A 0x19 618#define TWL4030_GPIO_GPIO_ISR2A 0x1A 619#define TWL4030_GPIO_GPIO_ISR3A 0x1B 620#define TWL4030_GPIO_GPIO_IMR1A 0x1C 621#define TWL4030_GPIO_GPIO_IMR2A 0x1D 622#define TWL4030_GPIO_GPIO_IMR3A 0x1E 623#define TWL4030_GPIO_GPIO_ISR1B 0x1F 624#define TWL4030_GPIO_GPIO_ISR2B 0x20 625#define TWL4030_GPIO_GPIO_ISR3B 0x21 626#define TWL4030_GPIO_GPIO_IMR1B 0x22 627#define TWL4030_GPIO_GPIO_IMR2B 0x23 628#define TWL4030_GPIO_GPIO_IMR3B 0x24 629#define TWL4030_GPIO_GPIO_EDR1 0x28 630#define TWL4030_GPIO_GPIO_EDR2 0x29 631#define TWL4030_GPIO_GPIO_EDR3 0x2A 632#define TWL4030_GPIO_GPIO_EDR4 0x2B 633#define TWL4030_GPIO_GPIO_EDR5 0x2C 634#define TWL4030_GPIO_GPIO_SIH_CTRL 0x2D 635 636/* 637 * Convience functions to read and write from TWL4030 638 * 639 * chip_no is the i2c address, it must be one of the chip addresses 640 * defined at the top of this file with the prefix TWL4030_CHIP_ 641 * examples are TWL4030_CHIP_PM_RECEIVER and TWL4030_CHIP_KEYPAD 642 * 643 * val is the data either written to or read from the twl4030 644 * 645 * reg is the register to act on, it must be one of the defines 646 * above and with the format TWL4030_<chip suffix>_<register name> 647 * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and 648 * TWL4030_LED_LEDEN. 649 */ 650#if !CONFIG_IS_ENABLED(DM_I2C) 651static inline int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val) 652{ 653 return i2c_write(chip_no, reg, 1, &val, 1); 654} 655 656static inline int twl4030_i2c_read(u8 chip_no, u8 reg, u8 *val, int len) 657{ 658 return i2c_read(chip_no, reg, 1, val, len); 659} 660#else 661int twl4030_i2c_write_u8(u8 chip_no, u8 reg, u8 val); 662int twl4030_i2c_read(u8 chip_no, u8 reg, u8 *val, int len); 663#endif 664 665static inline int twl4030_i2c_read_u8(u8 chip_no, u8 reg, u8 *val) 666{ 667 return twl4030_i2c_read(chip_no, reg, val, 1); 668} 669 670/* 671 * Power 672 */ 673 674/* For hardware resetting */ 675void twl4030_power_reset_init(void); 676/* For power off */ 677void twl4030_power_off(void); 678/* For setting device group and voltage */ 679void twl4030_pmrecv_vsel_cfg(u8 vsel_reg, u8 vsel_val, 680 u8 dev_grp, u8 dev_grp_sel); 681/* For initializing power device */ 682void twl4030_power_init(void); 683/* For initializing mmc power */ 684void twl4030_power_mmc_init(int dev_index); 685 686/* 687 * Input 688 */ 689 690int twl4030_input_power_button(void); 691int twl4030_input_charger(void); 692int twl4030_input_usb(void); 693 694int twl4030_keypad_scan(unsigned char *matrix); 695int twl4030_keypad_key(unsigned char *matrix, u8 c, u8 r); 696 697/* 698 * LED 699 */ 700void twl4030_led_init(unsigned char ledon_mask); 701 702/* 703 * USB 704 */ 705int twl4030_usb_ulpi_init(void); 706 707#endif /* TWL4030_H */ 708