1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * (C) Copyright 2010 4 * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc 5 */ 6 7#ifndef __GDSYS_FPGA_H 8#define __GDSYS_FPGA_H 9 10#ifdef CONFIG_GDSYS_LEGACY_DRIVERS 11int init_func_fpga(void); 12 13enum { 14 FPGA_STATE_DONE_FAILED = 1 << 0, 15 FPGA_STATE_REFLECTION_FAILED = 1 << 1, 16 FPGA_STATE_PLATFORM = 1 << 2, 17}; 18 19int get_fpga_state(unsigned dev); 20 21int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data); 22int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data); 23 24extern struct ihs_fpga *fpga_ptr[]; 25 26#define FPGA_SET_REG(ix, fld, val) \ 27 fpga_set_reg((ix), \ 28 &fpga_ptr[ix]->fld, \ 29 offsetof(struct ihs_fpga, fld), \ 30 val) 31 32#define FPGA_GET_REG(ix, fld, val) \ 33 fpga_get_reg((ix), \ 34 &fpga_ptr[ix]->fld, \ 35 offsetof(struct ihs_fpga, fld), \ 36 val) 37#endif 38 39struct ihs_gpio { 40 u16 read; 41 u16 clear; 42 u16 set; 43}; 44 45struct ihs_i2c { 46 u16 interrupt_status; 47 u16 interrupt_enable; 48 u16 write_mailbox_ext; 49 u16 write_mailbox; 50 u16 read_mailbox_ext; 51 u16 read_mailbox; 52}; 53 54struct ihs_osd { 55 u16 version; 56 u16 features; 57 u16 control; 58 u16 xy_size; 59 u16 xy_scale; 60 u16 x_pos; 61 u16 y_pos; 62}; 63 64struct ihs_mdio { 65 u16 control; 66 u16 address_data; 67 u16 rx_data; 68}; 69 70struct ihs_io_ep { 71 u16 transmit_data; 72 u16 rx_tx_control; 73 u16 receive_data; 74 u16 rx_tx_status; 75 u16 reserved; 76 u16 device_address; 77 u16 target_address; 78}; 79 80#ifdef CONFIG_NEO 81struct ihs_fpga { 82 u16 reflection_low; /* 0x0000 */ 83 u16 versions; /* 0x0002 */ 84 u16 fpga_features; /* 0x0004 */ 85 u16 fpga_version; /* 0x0006 */ 86 u16 reserved_0[8187]; /* 0x0008 */ 87 u16 reflection_high; /* 0x3ffe */ 88}; 89#endif 90 91#endif 92