1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2022 NXP
4 * Copyright (C) 2023 PHYTEC Messtechnik GmbH
5 * Christoph Stoidner <c.stoidner@phytec.de>
6 * Copyright (C) 2024 Mathieu Othacehe <m.othacehe@gmail.com>
7 */
8
9#ifndef __PHYCORE_IMX93_H
10#define __PHYCORE_IMX93_H
11
12#include <linux/sizes.h>
13#include <asm/arch/imx-regs.h>
14
15#define CFG_SYS_UBOOT_BASE	\
16	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
17
18#define CFG_SYS_INIT_RAM_ADDR        0x80000000
19#define CFG_SYS_INIT_RAM_SIZE        0x200000
20
21#define CFG_SYS_SDRAM_BASE           0x80000000
22#define PHYS_SDRAM                   0x80000000
23#define PHYS_SDRAM_SIZE              0x80000000
24
25/* Using ULP WDOG for reset */
26#define WDOG_BASE_ADDR          WDG3_BASE_ADDR
27
28#endif /* __PHYCORE_IMX93_H */
29