1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * am335x_guardian_.h 4 * 5 * Copyright (C) 2018 Robert Bosch Power Tools GmbH 6 * Copyright (C) 2018 sjoerd Simons <sjoerd.simons@collabora.co.uk> 7 * 8 */ 9 10#ifndef __CONFIG_AM335X_GUARDIAN_H 11#define __CONFIG_AM335X_GUARDIAN_H 12 13#include <configs/ti_am335x_common.h> 14 15/* Clock Defines */ 16#define V_OSCK 24000000 /* Clock output from T2 */ 17#define V_SCLK (V_OSCK) 18 19#ifndef CONFIG_SPL_BUILD 20 21#define MEM_LAYOUT_ENV_SETTINGS \ 22 "scriptaddr=0x80000000\0" \ 23 "pxefile_addr_r=0x80100000\0" \ 24 "tftp_load_addr=0x82000000\0" \ 25 "kernel_addr_r=0x82000000\0" \ 26 "fdt_addr_r=0x88000000\0" \ 27 "ramdisk_addr_r=0x88080000\0" \ 28 29#define BOOT_TARGET_DEVICES(func) \ 30 func(UBIFS, ubifs, 0, UBI, rootfs) 31 32#define AM335XX_BOARD_FDTFILE "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" 33 34#include <config_distro_bootcmd.h> 35 36#define GUARDIAN_DEFAULT_PROD_ENV \ 37 "factory_assembly_status=0\0" \ 38 "main_pcba_part_number=0\0" \ 39 "main_pcba_supplier=0\0" \ 40 "main_pcba_timestamp=0\0" \ 41 "main_pcba_hardware_version=0\0" \ 42 "main_pcba_id=0\0" \ 43 "main_pcba_aux_1=0\0" \ 44 "main_pcba_aux_2=0\0" \ 45 "main_pcba_aux_3=0\0" \ 46 "main_pcba_aux_4=0\0" \ 47 48#define CFG_EXTRA_ENV_SETTINGS \ 49 AM335XX_BOARD_FDTFILE \ 50 MEM_LAYOUT_ENV_SETTINGS \ 51 BOOTENV \ 52 GUARDIAN_DEFAULT_PROD_ENV \ 53 "backlight_brightness=50\0" \ 54 "distro_bootcmd=" \ 55 "setenv rootflags \"bulk_read,chk_data_crc\"; " \ 56 "setenv ethact usb_ether; " \ 57 "if test \"${swi_status}\" -eq 1; then " \ 58 "if dhcp; then " \ 59 "sleep 1; " \ 60 "if tftp \"${tftp_load_addr}\" \"bootscript.scr\"; then " \ 61 "source \"${tftp_load_addr}\"; " \ 62 "fi; " \ 63 "fi; " \ 64 "setenv extrabootargs $extrabootargs \"swi_attached\"; " \ 65 "fi;" \ 66 "run bootcmd_ubifs0;\0" \ 67 "altbootcmd=" \ 68 "setenv boot_syslinux_conf \"extlinux/extlinux-rollback.conf\"; " \ 69 "run distro_bootcmd; " \ 70 "setenv boot_syslinux_conf \"extlinux/extlinux.conf\"; " \ 71 "run bootcmd_ubifs0;\0" 72 73#endif /* ! CONFIG_SPL_BUILD */ 74 75#define SPLASH_SCREEN_NAND_PART "nand0,10" 76#define SPLASH_SCREEN_BMP_FILE_SIZE 0x26000 77#define SPLASH_SCREEN_BMP_LOAD_ADDR 0x82000000 78#define SPLASH_SCREEN_TEXT "U-Boot" 79 80/* BGR 16Bit Color Definitions */ 81#define CONSOLE_COLOR_BLACK 0x0000 82#define CONSOLE_COLOR_WHITE 0xFFFF 83#define CONSOLE_COLOR_RED 0x001F 84 85/* NS16550 Configuration */ 86#define CFG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ 87#define CFG_SYS_NS16550_COM2 0x48022000 /* UART1 */ 88#define CFG_SYS_NS16550_COM3 0x48024000 /* UART2 */ 89#define CFG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ 90#define CFG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ 91#define CFG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ 92 93#ifdef CONFIG_MTD_RAW_NAND 94#define CFG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 95 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ 96 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ 97 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ 98 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ 99 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ 100 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ 101 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ 102 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ 103 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ 104 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ 105 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ 106 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ 107 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ 108 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ 109 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ 110 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ 111 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ 112 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ 113 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ 114 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ 115 } 116#define CFG_SYS_NAND_ECCSIZE 512 117#define CFG_SYS_NAND_ECCBYTES 26 118 119#endif /* CONFIG_MTD_RAW_NAND */ 120 121#endif /* ! __CONFIG_AM335X_GUARDIAN_H */ 122