1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * from linux: 4 * c94e289f195e: usb: gadget: remove incorrect __init/__exit annotations 5 * 6 * at91_udc -- driver for at91-series USB peripheral controller 7 * 8 * Copyright (C) 2004 by Thomas Rathbone 9 * Copyright (C) 2005 by HP Labs 10 * Copyright (C) 2005 by David Brownell 11 */ 12 13#undef VERBOSE_DEBUG 14#undef PACKET_TRACE 15 16#include <common.h> 17#include <dm/devres.h> 18#include <linux/bug.h> 19#include <linux/err.h> 20#include <linux/errno.h> 21#include <asm/io.h> 22#include <asm/gpio.h> 23#include <asm/hardware.h> 24#include <linux/printk.h> 25#include <mach/at91_matrix.h> 26#include <linux/list.h> 27#include <linux/usb/ch9.h> 28#include <linux/usb/gadget.h> 29#include <linux/usb/at91_udc.h> 30#include <malloc.h> 31 32#include "at91_udc.h" 33 34/* 35 * This controller is simple and PIO-only. It's used in many AT91-series 36 * full speed USB controllers, including the at91rm9200 (arm920T, with MMU), 37 * at91sam926x (arm926ejs, with MMU), and several no-mmu versions. 38 * 39 * This driver expects the board has been wired with two GPIOs supporting 40 * a VBUS sensing IRQ, and a D+ pullup. (They may be omitted, but the 41 * testing hasn't covered such cases.) 42 * 43 * The pullup is most important (so it's integrated on sam926x parts). It 44 * provides software control over whether the host enumerates the device. 45 * 46 * The VBUS sensing helps during enumeration, and allows both USB clocks 47 * (and the transceiver) to stay gated off until they're necessary, saving 48 * power. During USB suspend, the 48 MHz clock is gated off in hardware; 49 * it may also be gated off by software during some Linux sleep states. 50 */ 51 52#define DRIVER_VERSION "3 May 2006" 53 54static const char driver_name [] = "at91_udc"; 55static const char * const ep_names[] = { 56 "ep0", 57 "ep1", 58 "ep2", 59 "ep3-int", 60 "ep4", 61 "ep5", 62}; 63#define ep0name ep_names[0] 64 65#define at91_udp_read(udc, reg) \ 66 __raw_readl((udc)->udp_baseaddr + (reg)) 67#define at91_udp_write(udc, reg, val) \ 68 __raw_writel((val), (udc)->udp_baseaddr + (reg)) 69 70static struct at91_udc *controller; 71 72/*-------------------------------------------------------------------------*/ 73 74static void done(struct at91_ep *ep, struct at91_request *req, int status) 75{ 76 unsigned stopped = ep->stopped; 77 struct at91_udc *udc = ep->udc; 78 79 list_del_init(&req->queue); 80 if (req->req.status == -EINPROGRESS) 81 req->req.status = status; 82 else 83 status = req->req.status; 84 if (status && status != -ESHUTDOWN) 85 VDBG("%s done %p, status %d\n", ep->ep.name, req, status); 86 87 ep->stopped = 1; 88 spin_unlock(&udc->lock); 89 req->req.complete(&ep->ep, &req->req); 90 spin_lock(&udc->lock); 91 ep->stopped = stopped; 92 93 /* ep0 is always ready; other endpoints need a non-empty queue */ 94 if (list_empty(&ep->queue) && ep->int_mask != (1 << 0)) 95 at91_udp_write(udc, AT91_UDP_IDR, ep->int_mask); 96} 97 98/*-------------------------------------------------------------------------*/ 99 100/* bits indicating OUT fifo has data ready */ 101#define RX_DATA_READY (AT91_UDP_RX_DATA_BK0 | AT91_UDP_RX_DATA_BK1) 102 103/* 104 * Endpoint FIFO CSR bits have a mix of bits, making it unsafe to just write 105 * back most of the value you just read (because of side effects, including 106 * bits that may change after reading and before writing). 107 * 108 * Except when changing a specific bit, always write values which: 109 * - clear SET_FX bits (setting them could change something) 110 * - set CLR_FX bits (clearing them could change something) 111 * 112 * There are also state bits like FORCESTALL, EPEDS, DIR, and EPTYPE 113 * that shouldn't normally be changed. 114 * 115 * NOTE at91sam9260 docs mention synch between UDPCK and MCK clock domains, 116 * implying a need to wait for one write to complete (test relevant bits) 117 * before starting the next write. This shouldn't be an issue given how 118 * infrequently we write, except maybe for write-then-read idioms. 119 */ 120#define SET_FX (AT91_UDP_TXPKTRDY) 121#define CLR_FX (RX_DATA_READY | AT91_UDP_RXSETUP \ 122 | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP) 123 124/* pull OUT packet data from the endpoint's fifo */ 125static int read_fifo (struct at91_ep *ep, struct at91_request *req) 126{ 127 u32 __iomem *creg = ep->creg; 128 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 129 u32 csr; 130 u8 *buf; 131 unsigned int count, bufferspace, is_done; 132 133 buf = req->req.buf + req->req.actual; 134 bufferspace = req->req.length - req->req.actual; 135 136 /* 137 * there might be nothing to read if ep_queue() calls us, 138 * or if we already emptied both pingpong buffers 139 */ 140rescan: 141 csr = __raw_readl(creg); 142 if ((csr & RX_DATA_READY) == 0) 143 return 0; 144 145 count = (csr & AT91_UDP_RXBYTECNT) >> 16; 146 if (count > ep->ep.maxpacket) 147 count = ep->ep.maxpacket; 148 if (count > bufferspace) { 149 DBG("%s buffer overflow\n", ep->ep.name); 150 req->req.status = -EOVERFLOW; 151 count = bufferspace; 152 } 153 __raw_readsb((unsigned long)dreg, buf, count); 154 155 /* release and swap pingpong mem bank */ 156 csr |= CLR_FX; 157 if (ep->is_pingpong) { 158 if (ep->fifo_bank == 0) { 159 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 160 ep->fifo_bank = 1; 161 } else { 162 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); 163 ep->fifo_bank = 0; 164 } 165 } else 166 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 167 __raw_writel(csr, creg); 168 169 req->req.actual += count; 170 is_done = (count < ep->ep.maxpacket); 171 if (count == bufferspace) 172 is_done = 1; 173 174 PACKET("%s %p out/%d%s\n", ep->ep.name, &req->req, count, 175 is_done ? " (done)" : ""); 176 177 /* 178 * avoid extra trips through IRQ logic for packets already in 179 * the fifo ... maybe preventing an extra (expensive) OUT-NAK 180 */ 181 if (is_done) 182 done(ep, req, 0); 183 else if (ep->is_pingpong) { 184 /* 185 * One dummy read to delay the code because of a HW glitch: 186 * CSR returns bad RXCOUNT when read too soon after updating 187 * RX_DATA_BK flags. 188 */ 189 csr = __raw_readl(creg); 190 191 bufferspace -= count; 192 buf += count; 193 goto rescan; 194 } 195 196 return is_done; 197} 198 199/* load fifo for an IN packet */ 200static int write_fifo(struct at91_ep *ep, struct at91_request *req) 201{ 202 u32 __iomem *creg = ep->creg; 203 u32 csr = __raw_readl(creg); 204 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 205 unsigned total, count, is_last; 206 u8 *buf; 207 208 /* 209 * TODO: allow for writing two packets to the fifo ... that'll 210 * reduce the amount of IN-NAKing, but probably won't affect 211 * throughput much. (Unlike preventing OUT-NAKing!) 212 */ 213 214 /* 215 * If ep_queue() calls us, the queue is empty and possibly in 216 * odd states like TXCOMP not yet cleared (we do it, saving at 217 * least one IRQ) or the fifo not yet being free. Those aren't 218 * issues normally (IRQ handler fast path). 219 */ 220 if (unlikely(csr & (AT91_UDP_TXCOMP | AT91_UDP_TXPKTRDY))) { 221 if (csr & AT91_UDP_TXCOMP) { 222 csr |= CLR_FX; 223 csr &= ~(SET_FX | AT91_UDP_TXCOMP); 224 __raw_writel(csr, creg); 225 csr = __raw_readl(creg); 226 } 227 if (csr & AT91_UDP_TXPKTRDY) 228 return 0; 229 } 230 231 buf = req->req.buf + req->req.actual; 232 prefetch(buf); 233 total = req->req.length - req->req.actual; 234 if (ep->ep.maxpacket < total) { 235 count = ep->ep.maxpacket; 236 is_last = 0; 237 } else { 238 count = total; 239 is_last = (count < ep->ep.maxpacket) || !req->req.zero; 240 } 241 242 /* 243 * Write the packet, maybe it's a ZLP. 244 * 245 * NOTE: incrementing req->actual before we receive the ACK means 246 * gadget driver IN bytecounts can be wrong in fault cases. That's 247 * fixable with PIO drivers like this one (save "count" here, and 248 * do the increment later on TX irq), but not for most DMA hardware. 249 * 250 * So all gadget drivers must accept that potential error. Some 251 * hardware supports precise fifo status reporting, letting them 252 * recover when the actual bytecount matters (e.g. for USB Test 253 * and Measurement Class devices). 254 */ 255 __raw_writesb((unsigned long)dreg, buf, count); 256 csr &= ~SET_FX; 257 csr |= CLR_FX | AT91_UDP_TXPKTRDY; 258 __raw_writel(csr, creg); 259 req->req.actual += count; 260 261 PACKET("%s %p in/%d%s\n", ep->ep.name, &req->req, count, 262 is_last ? " (done)" : ""); 263 if (is_last) 264 done(ep, req, 0); 265 return is_last; 266} 267 268static void nuke(struct at91_ep *ep, int status) 269{ 270 struct at91_request *req; 271 272 /* terminate any request in the queue */ 273 ep->stopped = 1; 274 if (list_empty(&ep->queue)) 275 return; 276 277 VDBG("%s %s\n", __func__, ep->ep.name); 278 while (!list_empty(&ep->queue)) { 279 req = list_entry(ep->queue.next, struct at91_request, queue); 280 done(ep, req, status); 281 } 282} 283 284/*-------------------------------------------------------------------------*/ 285 286static int at91_ep_enable(struct usb_ep *_ep, 287 const struct usb_endpoint_descriptor *desc) 288{ 289 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 290 struct at91_udc *udc; 291 u16 maxpacket; 292 u32 tmp; 293 unsigned long flags; 294 295 if (!_ep || !ep 296 || !desc || _ep->name == ep0name 297 || desc->bDescriptorType != USB_DT_ENDPOINT 298 || (maxpacket = usb_endpoint_maxp(desc)) == 0 299 || maxpacket > ep->maxpacket) { 300 DBG("bad ep or descriptor\n"); 301 return -EINVAL; 302 } 303 304 udc = ep->udc; 305 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 306 DBG("bogus device state\n"); 307 return -ESHUTDOWN; 308 } 309 310 tmp = usb_endpoint_type(desc); 311 switch (tmp) { 312 case USB_ENDPOINT_XFER_CONTROL: 313 DBG("only one control endpoint\n"); 314 return -EINVAL; 315 case USB_ENDPOINT_XFER_INT: 316 if (maxpacket > 64) 317 goto bogus_max; 318 break; 319 case USB_ENDPOINT_XFER_BULK: 320 switch (maxpacket) { 321 case 8: 322 case 16: 323 case 32: 324 case 64: 325 goto ok; 326 } 327bogus_max: 328 DBG("bogus maxpacket %d\n", maxpacket); 329 return -EINVAL; 330 case USB_ENDPOINT_XFER_ISOC: 331 if (!ep->is_pingpong) { 332 DBG("iso requires double buffering\n"); 333 return -EINVAL; 334 } 335 break; 336 } 337 338ok: 339 spin_lock_irqsave(&udc->lock, flags); 340 341 /* initialize endpoint to match this descriptor */ 342 ep->is_in = usb_endpoint_dir_in(desc); 343 ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC); 344 ep->stopped = 0; 345 if (ep->is_in) 346 tmp |= 0x04; 347 tmp <<= 8; 348 tmp |= AT91_UDP_EPEDS; 349 __raw_writel(tmp, ep->creg); 350 351 ep->ep.maxpacket = maxpacket; 352 353 /* 354 * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, 355 * since endpoint resets don't reset hw pingpong state. 356 */ 357 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 358 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 359 360 spin_unlock_irqrestore(&udc->lock, flags); 361 return 0; 362} 363 364static int at91_ep_disable (struct usb_ep * _ep) 365{ 366 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 367 struct at91_udc *udc = ep->udc; 368 unsigned long flags; 369 370 if (ep == &ep->udc->ep[0]) 371 return -EINVAL; 372 373 spin_lock_irqsave(&udc->lock, flags); 374 375 nuke(ep, -ESHUTDOWN); 376 377 /* restore the endpoint's pristine config */ 378 ep->ep.desc = NULL; 379 ep->ep.maxpacket = ep->maxpacket; 380 381 /* reset fifos and endpoint */ 382 if (ep->udc->clocked) { 383 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 384 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 385 __raw_writel(0, ep->creg); 386 } 387 388 spin_unlock_irqrestore(&udc->lock, flags); 389 return 0; 390} 391 392/* 393 * this is a PIO-only driver, so there's nothing 394 * interesting for request or buffer allocation. 395 */ 396 397static struct usb_request * 398at91_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) 399{ 400 struct at91_request *req; 401 402 req = kzalloc(sizeof (struct at91_request), gfp_flags); 403 if (!req) 404 return NULL; 405 406 INIT_LIST_HEAD(&req->queue); 407 return &req->req; 408} 409 410static void at91_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) 411{ 412 struct at91_request *req; 413 414 req = container_of(_req, struct at91_request, req); 415 BUG_ON(!list_empty(&req->queue)); 416 kfree(req); 417} 418 419static int at91_ep_queue(struct usb_ep *_ep, 420 struct usb_request *_req, gfp_t gfp_flags) 421{ 422 struct at91_request *req; 423 struct at91_ep *ep; 424 struct at91_udc *udc; 425 int status; 426 unsigned long flags; 427 428 req = container_of(_req, struct at91_request, req); 429 ep = container_of(_ep, struct at91_ep, ep); 430 431 if (!_req || !_req->complete 432 || !_req->buf || !list_empty(&req->queue)) { 433 DBG("invalid request\n"); 434 return -EINVAL; 435 } 436 437 if (!_ep || (!ep->ep.desc && ep->ep.name != ep0name)) { 438 DBG("invalid ep\n"); 439 return -EINVAL; 440 } 441 442 udc = ep->udc; 443 444 if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 445 DBG("invalid device\n"); 446 return -EINVAL; 447 } 448 449 _req->status = -EINPROGRESS; 450 _req->actual = 0; 451 452 spin_lock_irqsave(&udc->lock, flags); 453 454 /* try to kickstart any empty and idle queue */ 455 if (list_empty(&ep->queue) && !ep->stopped) { 456 int is_ep0; 457 458 /* 459 * If this control request has a non-empty DATA stage, this 460 * will start that stage. It works just like a non-control 461 * request (until the status stage starts, maybe early). 462 * 463 * If the data stage is empty, then this starts a successful 464 * IN/STATUS stage. (Unsuccessful ones use set_halt.) 465 */ 466 is_ep0 = (ep->ep.name == ep0name); 467 if (is_ep0) { 468 u32 tmp; 469 470 if (!udc->req_pending) { 471 status = -EINVAL; 472 goto done; 473 } 474 475 /* 476 * defer changing CONFG until after the gadget driver 477 * reconfigures the endpoints. 478 */ 479 if (udc->wait_for_config_ack) { 480 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 481 tmp ^= AT91_UDP_CONFG; 482 VDBG("toggle config\n"); 483 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 484 } 485 if (req->req.length == 0) { 486ep0_in_status: 487 PACKET("ep0 in/status\n"); 488 status = 0; 489 tmp = __raw_readl(ep->creg); 490 tmp &= ~SET_FX; 491 tmp |= CLR_FX | AT91_UDP_TXPKTRDY; 492 __raw_writel(tmp, ep->creg); 493 udc->req_pending = 0; 494 goto done; 495 } 496 } 497 498 if (ep->is_in) 499 status = write_fifo(ep, req); 500 else { 501 status = read_fifo(ep, req); 502 503 /* IN/STATUS stage is otherwise triggered by irq */ 504 if (status && is_ep0) 505 goto ep0_in_status; 506 } 507 } else 508 status = 0; 509 510 if (req && !status) { 511 list_add_tail (&req->queue, &ep->queue); 512 at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); 513 } 514done: 515 spin_unlock_irqrestore(&udc->lock, flags); 516 return (status < 0) ? status : 0; 517} 518 519static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 520{ 521 struct at91_ep *ep; 522 struct at91_request *req; 523 unsigned long flags; 524 525 ep = container_of(_ep, struct at91_ep, ep); 526 if (!_ep || ep->ep.name == ep0name) 527 return -EINVAL; 528 529 spin_lock_irqsave(&udc->lock, flags); 530 531 /* make sure it's actually queued on this endpoint */ 532 list_for_each_entry (req, &ep->queue, queue) { 533 if (&req->req == _req) 534 break; 535 } 536 if (&req->req != _req) { 537 spin_unlock_irqrestore(&udc->lock, flags); 538 return -EINVAL; 539 } 540 541 done(ep, req, -ECONNRESET); 542 spin_unlock_irqrestore(&udc->lock, flags); 543 return 0; 544} 545 546static int at91_ep_set_halt(struct usb_ep *_ep, int value) 547{ 548 struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); 549 struct at91_udc *udc = ep->udc; 550 u32 __iomem *creg; 551 u32 csr; 552 unsigned long flags; 553 int status = 0; 554 555 if (!_ep || ep->is_iso || !ep->udc->clocked) 556 return -EINVAL; 557 558 creg = ep->creg; 559 spin_lock_irqsave(&udc->lock, flags); 560 561 csr = __raw_readl(creg); 562 563 /* 564 * fail with still-busy IN endpoints, ensuring correct sequencing 565 * of data tx then stall. note that the fifo rx bytecount isn't 566 * completely accurate as a tx bytecount. 567 */ 568 if (ep->is_in && (!list_empty(&ep->queue) || (csr >> 16) != 0)) 569 status = -EAGAIN; 570 else { 571 csr |= CLR_FX; 572 csr &= ~SET_FX; 573 if (value) { 574 csr |= AT91_UDP_FORCESTALL; 575 VDBG("halt %s\n", ep->ep.name); 576 } else { 577 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 578 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 579 csr &= ~AT91_UDP_FORCESTALL; 580 } 581 __raw_writel(csr, creg); 582 } 583 584 spin_unlock_irqrestore(&udc->lock, flags); 585 return status; 586} 587 588static const struct usb_ep_ops at91_ep_ops = { 589 .enable = at91_ep_enable, 590 .disable = at91_ep_disable, 591 .alloc_request = at91_ep_alloc_request, 592 .free_request = at91_ep_free_request, 593 .queue = at91_ep_queue, 594 .dequeue = at91_ep_dequeue, 595 .set_halt = at91_ep_set_halt, 596 /* there's only imprecise fifo status reporting */ 597}; 598 599/*-------------------------------------------------------------------------*/ 600 601static int at91_get_frame(struct usb_gadget *gadget) 602{ 603 struct at91_udc *udc = to_udc(gadget); 604 605 if (!to_udc(gadget)->clocked) 606 return -EINVAL; 607 return at91_udp_read(udc, AT91_UDP_FRM_NUM) & AT91_UDP_NUM; 608} 609 610static int at91_wakeup(struct usb_gadget *gadget) 611{ 612 struct at91_udc *udc = to_udc(gadget); 613 u32 glbstate; 614 int status = -EINVAL; 615 unsigned long flags; 616 617 DBG("%s\n", __func__ ); 618 spin_lock_irqsave(&udc->lock, flags); 619 620 if (!udc->clocked || !udc->suspended) 621 goto done; 622 623 /* NOTE: some "early versions" handle ESR differently ... */ 624 625 glbstate = at91_udp_read(udc, AT91_UDP_GLB_STAT); 626 if (!(glbstate & AT91_UDP_ESR)) 627 goto done; 628 glbstate |= AT91_UDP_ESR; 629 at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); 630 631done: 632 spin_unlock_irqrestore(&udc->lock, flags); 633 return status; 634} 635 636/* reinit == restore initial software state */ 637static void udc_reinit(struct at91_udc *udc) 638{ 639 u32 i; 640 641 INIT_LIST_HEAD(&udc->gadget.ep_list); 642 INIT_LIST_HEAD(&udc->gadget.ep0->ep_list); 643 644 for (i = 0; i < NUM_ENDPOINTS; i++) { 645 struct at91_ep *ep = &udc->ep[i]; 646 647 if (i != 0) 648 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); 649 ep->ep.desc = NULL; 650 ep->stopped = 0; 651 ep->fifo_bank = 0; 652 usb_ep_set_maxpacket_limit(&ep->ep, ep->maxpacket); 653 ep->creg = (void __iomem *) udc->udp_baseaddr + AT91_UDP_CSR(i); 654 /* initialize one queue per endpoint */ 655 INIT_LIST_HEAD(&ep->queue); 656 } 657} 658 659static void reset_gadget(struct at91_udc *udc) 660{ 661 struct usb_gadget_driver *driver = udc->driver; 662 int i; 663 664 if (udc->gadget.speed == USB_SPEED_UNKNOWN) 665 driver = NULL; 666 udc->gadget.speed = USB_SPEED_UNKNOWN; 667 udc->suspended = 0; 668 669 for (i = 0; i < NUM_ENDPOINTS; i++) { 670 struct at91_ep *ep = &udc->ep[i]; 671 672 ep->stopped = 1; 673 nuke(ep, -ESHUTDOWN); 674 } 675 if (driver) { 676 spin_unlock(&udc->lock); 677 udc->driver->disconnect(&udc->gadget); 678 spin_lock(&udc->lock); 679 } 680 681 udc_reinit(udc); 682} 683 684static void stop_activity(struct at91_udc *udc) 685{ 686 struct usb_gadget_driver *driver = udc->driver; 687 int i; 688 689 if (udc->gadget.speed == USB_SPEED_UNKNOWN) 690 driver = NULL; 691 udc->gadget.speed = USB_SPEED_UNKNOWN; 692 udc->suspended = 0; 693 694 for (i = 0; i < NUM_ENDPOINTS; i++) { 695 struct at91_ep *ep = &udc->ep[i]; 696 ep->stopped = 1; 697 nuke(ep, -ESHUTDOWN); 698 } 699 if (driver) { 700 spin_unlock(&udc->lock); 701 driver->disconnect(&udc->gadget); 702 spin_lock(&udc->lock); 703 } 704 705 udc_reinit(udc); 706} 707 708static void clk_on(struct at91_udc *udc) 709{ 710 if (udc->clocked) 711 return; 712 udc->clocked = 1; 713} 714 715static void clk_off(struct at91_udc *udc) 716{ 717 if (!udc->clocked) 718 return; 719 udc->clocked = 0; 720 udc->gadget.speed = USB_SPEED_UNKNOWN; 721} 722 723/* 724 * activate/deactivate link with host; minimize power usage for 725 * inactive links by cutting clocks and transceiver power. 726 */ 727static void pullup(struct at91_udc *udc, int is_on) 728{ 729 if (!udc->enabled || !udc->vbus) 730 is_on = 0; 731 DBG("%sactive\n", is_on ? "" : "in"); 732 733 if (is_on) { 734 clk_on(udc); 735 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); 736 at91_udp_write(udc, AT91_UDP_TXVC, 0); 737 } else { 738 stop_activity(udc); 739 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); 740 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); 741 clk_off(udc); 742 } 743 744 if (udc->caps && udc->caps->pullup) 745 udc->caps->pullup(udc, is_on); 746} 747 748/* vbus is here! turn everything on that's ready */ 749static int at91_vbus_session(struct usb_gadget *gadget, int is_active) 750{ 751 struct at91_udc *udc = to_udc(gadget); 752 unsigned long flags; 753 754 /* VDBG("vbus %s\n", is_active ? "on" : "off"); */ 755 spin_lock_irqsave(&udc->lock, flags); 756 udc->vbus = (is_active != 0); 757 if (udc->driver) 758 pullup(udc, is_active); 759 else 760 pullup(udc, 0); 761 spin_unlock_irqrestore(&udc->lock, flags); 762 return 0; 763} 764 765static int at91_pullup(struct usb_gadget *gadget, int is_on) 766{ 767 struct at91_udc *udc = to_udc(gadget); 768 unsigned long flags; 769 770 spin_lock_irqsave(&udc->lock, flags); 771 udc->enabled = is_on = !!is_on; 772 pullup(udc, is_on); 773 spin_unlock_irqrestore(&udc->lock, flags); 774 return 0; 775} 776 777static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) 778{ 779 struct at91_udc *udc = to_udc(gadget); 780 unsigned long flags; 781 782 spin_lock_irqsave(&udc->lock, flags); 783 udc->selfpowered = (is_on != 0); 784 spin_unlock_irqrestore(&udc->lock, flags); 785 return 0; 786} 787 788static int at91_start(struct usb_gadget *gadget, 789 struct usb_gadget_driver *driver); 790static int at91_stop(struct usb_gadget *gadget); 791 792static const struct usb_gadget_ops at91_udc_ops = { 793 .get_frame = at91_get_frame, 794 .wakeup = at91_wakeup, 795 .set_selfpowered = at91_set_selfpowered, 796 .vbus_session = at91_vbus_session, 797 .pullup = at91_pullup, 798 .udc_start = at91_start, 799 .udc_stop = at91_stop, 800 801 /* 802 * VBUS-powered devices may also also want to support bigger 803 * power budgets after an appropriate SET_CONFIGURATION. 804 */ 805 /* .vbus_power = at91_vbus_power, */ 806}; 807 808/*-------------------------------------------------------------------------*/ 809 810static int handle_ep(struct at91_ep *ep) 811{ 812 struct at91_request *req; 813 u32 __iomem *creg = ep->creg; 814 u32 csr = __raw_readl(creg); 815 816 if (!list_empty(&ep->queue)) 817 req = list_entry(ep->queue.next, 818 struct at91_request, queue); 819 else 820 req = NULL; 821 822 if (ep->is_in) { 823 if (csr & (AT91_UDP_STALLSENT | AT91_UDP_TXCOMP)) { 824 csr |= CLR_FX; 825 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_TXCOMP); 826 __raw_writel(csr, creg); 827 } 828 if (req) 829 return write_fifo(ep, req); 830 831 } else { 832 if (csr & AT91_UDP_STALLSENT) { 833 /* STALLSENT bit == ISOERR */ 834 if (ep->is_iso && req) 835 req->req.status = -EILSEQ; 836 csr |= CLR_FX; 837 csr &= ~(SET_FX | AT91_UDP_STALLSENT); 838 __raw_writel(csr, creg); 839 csr = __raw_readl(creg); 840 } 841 if (req && (csr & RX_DATA_READY)) 842 return read_fifo(ep, req); 843 } 844 return 0; 845} 846 847union setup { 848 u8 raw[8]; 849 struct usb_ctrlrequest r; 850}; 851 852static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) 853{ 854 u32 __iomem *creg = ep->creg; 855 u8 __iomem *dreg = ep->creg + (AT91_UDP_FDR(0) - AT91_UDP_CSR(0)); 856 unsigned rxcount, i = 0; 857 u32 tmp; 858 union setup pkt; 859 int status = 0; 860 861 /* read and ack SETUP; hard-fail for bogus packets */ 862 rxcount = (csr & AT91_UDP_RXBYTECNT) >> 16; 863 if (likely(rxcount == 8)) { 864 while (rxcount--) 865 pkt.raw[i++] = __raw_readb(dreg); 866 if (pkt.r.bRequestType & USB_DIR_IN) { 867 csr |= AT91_UDP_DIR; 868 ep->is_in = 1; 869 } else { 870 csr &= ~AT91_UDP_DIR; 871 ep->is_in = 0; 872 } 873 } else { 874 /* REVISIT this happens sometimes under load; why?? */ 875 ERR("SETUP len %d, csr %08x\n", rxcount, csr); 876 status = -EINVAL; 877 } 878 csr |= CLR_FX; 879 csr &= ~(SET_FX | AT91_UDP_RXSETUP); 880 __raw_writel(csr, creg); 881 udc->wait_for_addr_ack = 0; 882 udc->wait_for_config_ack = 0; 883 ep->stopped = 0; 884 if (unlikely(status != 0)) 885 goto stall; 886 887#define w_index le16_to_cpu(pkt.r.wIndex) 888#define w_value le16_to_cpu(pkt.r.wValue) 889#define w_length le16_to_cpu(pkt.r.wLength) 890 891 VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n", 892 pkt.r.bRequestType, pkt.r.bRequest, 893 w_value, w_index, w_length); 894 895 /* 896 * A few standard requests get handled here, ones that touch 897 * hardware ... notably for device and endpoint features. 898 */ 899 udc->req_pending = 1; 900 csr = __raw_readl(creg); 901 csr |= CLR_FX; 902 csr &= ~SET_FX; 903 switch ((pkt.r.bRequestType << 8) | pkt.r.bRequest) { 904 905 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 906 | USB_REQ_SET_ADDRESS: 907 __raw_writel(csr | AT91_UDP_TXPKTRDY, creg); 908 udc->addr = w_value; 909 udc->wait_for_addr_ack = 1; 910 udc->req_pending = 0; 911 /* FADDR is set later, when we ack host STATUS */ 912 return; 913 914 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 915 | USB_REQ_SET_CONFIGURATION: 916 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_CONFG; 917 if (pkt.r.wValue) 918 udc->wait_for_config_ack = (tmp == 0); 919 else 920 udc->wait_for_config_ack = (tmp != 0); 921 if (udc->wait_for_config_ack) 922 VDBG("wait for config\n"); 923 /* CONFG is toggled later, if gadget driver succeeds */ 924 break; 925 926 /* 927 * Hosts may set or clear remote wakeup status, and 928 * devices may report they're VBUS powered. 929 */ 930 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 931 | USB_REQ_GET_STATUS: 932 tmp = (udc->selfpowered << USB_DEVICE_SELF_POWERED); 933 if (at91_udp_read(udc, AT91_UDP_GLB_STAT) & AT91_UDP_ESR) 934 tmp |= (1 << USB_DEVICE_REMOTE_WAKEUP); 935 PACKET("get device status\n"); 936 __raw_writeb(tmp, dreg); 937 __raw_writeb(0, dreg); 938 goto write_in; 939 /* then STATUS starts later, automatically */ 940 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 941 | USB_REQ_SET_FEATURE: 942 if (w_value != USB_DEVICE_REMOTE_WAKEUP) 943 goto stall; 944 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 945 tmp |= AT91_UDP_ESR; 946 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 947 goto succeed; 948 case ((USB_TYPE_STANDARD|USB_RECIP_DEVICE) << 8) 949 | USB_REQ_CLEAR_FEATURE: 950 if (w_value != USB_DEVICE_REMOTE_WAKEUP) 951 goto stall; 952 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 953 tmp &= ~AT91_UDP_ESR; 954 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 955 goto succeed; 956 957 /* 958 * Interfaces have no feature settings; this is pretty useless. 959 * we won't even insist the interface exists... 960 */ 961 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 962 | USB_REQ_GET_STATUS: 963 PACKET("get interface status\n"); 964 __raw_writeb(0, dreg); 965 __raw_writeb(0, dreg); 966 goto write_in; 967 /* then STATUS starts later, automatically */ 968 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 969 | USB_REQ_SET_FEATURE: 970 case ((USB_TYPE_STANDARD|USB_RECIP_INTERFACE) << 8) 971 | USB_REQ_CLEAR_FEATURE: 972 goto stall; 973 974 /* 975 * Hosts may clear bulk/intr endpoint halt after the gadget 976 * driver sets it (not widely used); or set it (for testing) 977 */ 978 case ((USB_DIR_IN|USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 979 | USB_REQ_GET_STATUS: 980 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 981 ep = &udc->ep[tmp]; 982 if (tmp >= NUM_ENDPOINTS || (tmp && !ep->ep.desc)) 983 goto stall; 984 985 if (tmp) { 986 if ((w_index & USB_DIR_IN)) { 987 if (!ep->is_in) 988 goto stall; 989 } else if (ep->is_in) 990 goto stall; 991 } 992 PACKET("get %s status\n", ep->ep.name); 993 if (__raw_readl(ep->creg) & AT91_UDP_FORCESTALL) 994 tmp = (1 << USB_ENDPOINT_HALT); 995 else 996 tmp = 0; 997 __raw_writeb(tmp, dreg); 998 __raw_writeb(0, dreg); 999 goto write_in; 1000 /* then STATUS starts later, automatically */ 1001 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 1002 | USB_REQ_SET_FEATURE: 1003 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 1004 ep = &udc->ep[tmp]; 1005 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) 1006 goto stall; 1007 if (!ep->ep.desc || ep->is_iso) 1008 goto stall; 1009 if ((w_index & USB_DIR_IN)) { 1010 if (!ep->is_in) 1011 goto stall; 1012 } else if (ep->is_in) 1013 goto stall; 1014 1015 tmp = __raw_readl(ep->creg); 1016 tmp &= ~SET_FX; 1017 tmp |= CLR_FX | AT91_UDP_FORCESTALL; 1018 __raw_writel(tmp, ep->creg); 1019 goto succeed; 1020 case ((USB_TYPE_STANDARD|USB_RECIP_ENDPOINT) << 8) 1021 | USB_REQ_CLEAR_FEATURE: 1022 tmp = w_index & USB_ENDPOINT_NUMBER_MASK; 1023 ep = &udc->ep[tmp]; 1024 if (w_value != USB_ENDPOINT_HALT || tmp >= NUM_ENDPOINTS) 1025 goto stall; 1026 if (tmp == 0) 1027 goto succeed; 1028 if (!ep->ep.desc || ep->is_iso) 1029 goto stall; 1030 if ((w_index & USB_DIR_IN)) { 1031 if (!ep->is_in) 1032 goto stall; 1033 } else if (ep->is_in) 1034 goto stall; 1035 1036 at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); 1037 at91_udp_write(udc, AT91_UDP_RST_EP, 0); 1038 tmp = __raw_readl(ep->creg); 1039 tmp |= CLR_FX; 1040 tmp &= ~(SET_FX | AT91_UDP_FORCESTALL); 1041 __raw_writel(tmp, ep->creg); 1042 if (!list_empty(&ep->queue)) 1043 handle_ep(ep); 1044 goto succeed; 1045 } 1046 1047#undef w_value 1048#undef w_index 1049#undef w_length 1050 1051 /* pass request up to the gadget driver */ 1052 if (udc->driver) { 1053 spin_unlock(&udc->lock); 1054 status = udc->driver->setup(&udc->gadget, &pkt.r); 1055 spin_lock(&udc->lock); 1056 } 1057 else 1058 status = -ENODEV; 1059 if (status < 0) { 1060stall: 1061 VDBG("req %02x.%02x protocol STALL; stat %d\n", 1062 pkt.r.bRequestType, pkt.r.bRequest, status); 1063 csr |= AT91_UDP_FORCESTALL; 1064 __raw_writel(csr, creg); 1065 udc->req_pending = 0; 1066 } 1067 return; 1068 1069succeed: 1070 /* immediate successful (IN) STATUS after zero length DATA */ 1071 PACKET("ep0 in/status\n"); 1072write_in: 1073 csr |= AT91_UDP_TXPKTRDY; 1074 __raw_writel(csr, creg); 1075 udc->req_pending = 0; 1076} 1077 1078static void handle_ep0(struct at91_udc *udc) 1079{ 1080 struct at91_ep *ep0 = &udc->ep[0]; 1081 u32 __iomem *creg = ep0->creg; 1082 u32 csr = __raw_readl(creg); 1083 struct at91_request *req; 1084 1085 if (unlikely(csr & AT91_UDP_STALLSENT)) { 1086 nuke(ep0, -EPROTO); 1087 udc->req_pending = 0; 1088 csr |= CLR_FX; 1089 csr &= ~(SET_FX | AT91_UDP_STALLSENT | AT91_UDP_FORCESTALL); 1090 __raw_writel(csr, creg); 1091 VDBG("ep0 stalled\n"); 1092 csr = __raw_readl(creg); 1093 } 1094 if (csr & AT91_UDP_RXSETUP) { 1095 nuke(ep0, 0); 1096 udc->req_pending = 0; 1097 handle_setup(udc, ep0, csr); 1098 return; 1099 } 1100 1101 if (list_empty(&ep0->queue)) 1102 req = NULL; 1103 else 1104 req = list_entry(ep0->queue.next, struct at91_request, queue); 1105 1106 /* host ACKed an IN packet that we sent */ 1107 if (csr & AT91_UDP_TXCOMP) { 1108 csr |= CLR_FX; 1109 csr &= ~(SET_FX | AT91_UDP_TXCOMP); 1110 1111 /* write more IN DATA? */ 1112 if (req && ep0->is_in) { 1113 if (handle_ep(ep0)) 1114 udc->req_pending = 0; 1115 1116 /* 1117 * Ack after: 1118 * - last IN DATA packet (including GET_STATUS) 1119 * - IN/STATUS for OUT DATA 1120 * - IN/STATUS for any zero-length DATA stage 1121 * except for the IN DATA case, the host should send 1122 * an OUT status later, which we'll ack. 1123 */ 1124 } else { 1125 udc->req_pending = 0; 1126 __raw_writel(csr, creg); 1127 1128 /* 1129 * SET_ADDRESS takes effect only after the STATUS 1130 * (to the original address) gets acked. 1131 */ 1132 if (udc->wait_for_addr_ack) { 1133 u32 tmp; 1134 1135 at91_udp_write(udc, AT91_UDP_FADDR, 1136 AT91_UDP_FEN | udc->addr); 1137 tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); 1138 tmp &= ~AT91_UDP_FADDEN; 1139 if (udc->addr) 1140 tmp |= AT91_UDP_FADDEN; 1141 at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); 1142 1143 udc->wait_for_addr_ack = 0; 1144 VDBG("address %d\n", udc->addr); 1145 } 1146 } 1147 } 1148 1149 /* OUT packet arrived ... */ 1150 else if (csr & AT91_UDP_RX_DATA_BK0) { 1151 csr |= CLR_FX; 1152 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); 1153 1154 /* OUT DATA stage */ 1155 if (!ep0->is_in) { 1156 if (req) { 1157 if (handle_ep(ep0)) { 1158 /* send IN/STATUS */ 1159 PACKET("ep0 in/status\n"); 1160 csr = __raw_readl(creg); 1161 csr &= ~SET_FX; 1162 csr |= CLR_FX | AT91_UDP_TXPKTRDY; 1163 __raw_writel(csr, creg); 1164 udc->req_pending = 0; 1165 } 1166 } else if (udc->req_pending) { 1167 /* 1168 * AT91 hardware has a hard time with this 1169 * "deferred response" mode for control-OUT 1170 * transfers. (For control-IN it's fine.) 1171 * 1172 * The normal solution leaves OUT data in the 1173 * fifo until the gadget driver is ready. 1174 * We couldn't do that here without disabling 1175 * the IRQ that tells about SETUP packets, 1176 * e.g. when the host gets impatient... 1177 * 1178 * Working around it by copying into a buffer 1179 * would almost be a non-deferred response, 1180 * except that it wouldn't permit reliable 1181 * stalling of the request. Instead, demand 1182 * that gadget drivers not use this mode. 1183 */ 1184 DBG("no control-OUT deferred responses!\n"); 1185 __raw_writel(csr | AT91_UDP_FORCESTALL, creg); 1186 udc->req_pending = 0; 1187 } 1188 1189 /* STATUS stage for control-IN; ack. */ 1190 } else { 1191 PACKET("ep0 out/status ACK\n"); 1192 __raw_writel(csr, creg); 1193 1194 /* "early" status stage */ 1195 if (req) 1196 done(ep0, req, 0); 1197 } 1198 } 1199} 1200 1201static irqreturn_t at91_udc_irq(struct at91_udc *udc) 1202{ 1203 u32 rescans = 5; 1204 int disable_clock = 0; 1205 unsigned long flags; 1206 1207 spin_lock_irqsave(&udc->lock, flags); 1208 1209 if (!udc->clocked) { 1210 clk_on(udc); 1211 disable_clock = 1; 1212 } 1213 1214 while (rescans--) { 1215 u32 status; 1216 1217 status = at91_udp_read(udc, AT91_UDP_ISR) 1218 & at91_udp_read(udc, AT91_UDP_IMR); 1219 if (!status) 1220 break; 1221 1222 /* USB reset irq: not maskable */ 1223 if (status & AT91_UDP_ENDBUSRES) { 1224 at91_udp_write(udc, AT91_UDP_IDR, ~MINIMUS_INTERRUPTUS); 1225 at91_udp_write(udc, AT91_UDP_IER, MINIMUS_INTERRUPTUS); 1226 /* Atmel code clears this irq twice */ 1227 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); 1228 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_ENDBUSRES); 1229 VDBG("end bus reset\n"); 1230 udc->addr = 0; 1231 reset_gadget(udc); 1232 1233 /* enable ep0 */ 1234 at91_udp_write(udc, AT91_UDP_CSR(0), 1235 AT91_UDP_EPEDS | AT91_UDP_EPTYPE_CTRL); 1236 udc->gadget.speed = USB_SPEED_FULL; 1237 udc->suspended = 0; 1238 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_EP(0)); 1239 1240 /* 1241 * NOTE: this driver keeps clocks off unless the 1242 * USB host is present. That saves power, but for 1243 * boards that don't support VBUS detection, both 1244 * clocks need to be active most of the time. 1245 */ 1246 1247 /* host initiated suspend (3+ms bus idle) */ 1248 } else if (status & AT91_UDP_RXSUSP) { 1249 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXSUSP); 1250 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXRSM); 1251 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXSUSP); 1252 /* VDBG("bus suspend\n"); */ 1253 if (udc->suspended) 1254 continue; 1255 udc->suspended = 1; 1256 1257 /* 1258 * NOTE: when suspending a VBUS-powered device, the 1259 * gadget driver should switch into slow clock mode 1260 * and then into standby to avoid drawing more than 1261 * 500uA power (2500uA for some high-power configs). 1262 */ 1263 if (udc->driver && udc->driver->suspend) { 1264 spin_unlock(&udc->lock); 1265 udc->driver->suspend(&udc->gadget); 1266 spin_lock(&udc->lock); 1267 } 1268 1269 /* host initiated resume */ 1270 } else if (status & AT91_UDP_RXRSM) { 1271 at91_udp_write(udc, AT91_UDP_IDR, AT91_UDP_RXRSM); 1272 at91_udp_write(udc, AT91_UDP_IER, AT91_UDP_RXSUSP); 1273 at91_udp_write(udc, AT91_UDP_ICR, AT91_UDP_RXRSM); 1274 /* VDBG("bus resume\n"); */ 1275 if (!udc->suspended) 1276 continue; 1277 udc->suspended = 0; 1278 1279 /* 1280 * NOTE: for a VBUS-powered device, the gadget driver 1281 * would normally want to switch out of slow clock 1282 * mode into normal mode. 1283 */ 1284 if (udc->driver && udc->driver->resume) { 1285 spin_unlock(&udc->lock); 1286 udc->driver->resume(&udc->gadget); 1287 spin_lock(&udc->lock); 1288 } 1289 1290 /* endpoint IRQs are cleared by handling them */ 1291 } else { 1292 int i; 1293 unsigned mask = 1; 1294 struct at91_ep *ep = &udc->ep[1]; 1295 1296 if (status & mask) 1297 handle_ep0(udc); 1298 for (i = 1; i < NUM_ENDPOINTS; i++) { 1299 mask <<= 1; 1300 if (status & mask) 1301 handle_ep(ep); 1302 ep++; 1303 } 1304 } 1305 } 1306 1307 if (disable_clock) 1308 clk_off(udc); 1309 1310 spin_unlock_irqrestore(&udc->lock, flags); 1311 1312 return IRQ_HANDLED; 1313} 1314 1315/*-------------------------------------------------------------------------*/ 1316 1317static int at91_start(struct usb_gadget *gadget, 1318 struct usb_gadget_driver *driver) 1319{ 1320 struct at91_udc *udc = controller; 1321 1322 udc->driver = driver; 1323 udc->enabled = 1; 1324 udc->selfpowered = 1; 1325 1326 return 0; 1327} 1328 1329static int at91_stop(struct usb_gadget *gadget) 1330{ 1331 struct at91_udc *udc = controller; 1332 unsigned long flags; 1333 1334 spin_lock_irqsave(&udc->lock, flags); 1335 udc->enabled = 0; 1336 at91_udp_write(udc, AT91_UDP_IDR, ~0); 1337 spin_unlock_irqrestore(&udc->lock, flags); 1338 1339 udc->driver = NULL; 1340 1341 return 0; 1342} 1343 1344/*-------------------------------------------------------------------------*/ 1345 1346#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) 1347static int at91sam9260_udc_init(struct at91_udc *udc) 1348{ 1349 struct at91_ep *ep; 1350 int i; 1351 1352 for (i = 0; i < NUM_ENDPOINTS; i++) { 1353 ep = &udc->ep[i]; 1354 1355 switch (i) { 1356 case 0 ... 3: 1357 ep->maxpacket = 64; 1358 break; 1359 case 4 ... 5: 1360 ep->maxpacket = 512; 1361 break; 1362 } 1363 } 1364 1365 return 0; 1366} 1367 1368static void at91sam9260_udc_pullup(struct at91_udc *udc, int is_on) 1369{ 1370 u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); 1371 1372 if (is_on) 1373 txvc |= AT91_UDP_TXVC_PUON; 1374 else 1375 txvc &= ~AT91_UDP_TXVC_PUON; 1376 1377 at91_udp_write(udc, AT91_UDP_TXVC, txvc); 1378} 1379 1380static const struct at91_udc_caps at91sam9260_udc_caps = { 1381 .init = at91sam9260_udc_init, 1382 .pullup = at91sam9260_udc_pullup, 1383}; 1384#endif 1385 1386#if defined(CONFIG_AT91SAM9261) 1387static int at91sam9261_udc_init(struct at91_udc *udc) 1388{ 1389 struct at91_ep *ep; 1390 int i; 1391 1392 for (i = 0; i < NUM_ENDPOINTS; i++) { 1393 ep = &udc->ep[i]; 1394 1395 switch (i) { 1396 case 0: 1397 ep->maxpacket = 8; 1398 break; 1399 case 1 ... 3: 1400 ep->maxpacket = 64; 1401 break; 1402 case 4 ... 5: 1403 ep->maxpacket = 256; 1404 break; 1405 } 1406 } 1407 1408 udc->matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; 1409 1410 if (IS_ERR(udc->matrix)) 1411 return PTR_ERR(udc->matrix); 1412 1413 return 0; 1414} 1415 1416static void at91sam9261_udc_pullup(struct at91_udc *udc, int is_on) 1417{ 1418 u32 usbpucr = 0; 1419 1420 usbpucr = readl(&udc->matrix->pucr); 1421 if (is_on) 1422 usbpucr |= AT91_MATRIX_USBPUCR_PUON; 1423 1424 writel(usbpucr, &udc->matrix->pucr); 1425} 1426 1427static const struct at91_udc_caps at91sam9261_udc_caps = { 1428 .init = at91sam9261_udc_init, 1429 .pullup = at91sam9261_udc_pullup, 1430}; 1431#endif 1432 1433int dm_usb_gadget_handle_interrupts(struct udevice *dev) 1434{ 1435 struct at91_udc *udc = controller; 1436 1437 return at91_udc_irq(udc); 1438} 1439 1440int usb_gadget_register_driver(struct usb_gadget_driver *driver) 1441{ 1442 struct at91_udc *udc = controller; 1443 int ret; 1444 1445 if (!driver || !driver->bind || !driver->setup) { 1446 printf("bad paramter\n"); 1447 return -EINVAL; 1448 } 1449 1450 if (udc->driver) { 1451 printf("UDC already has a gadget driver\n"); 1452 return -EBUSY; 1453 } 1454 1455 at91_start(&udc->gadget, driver); 1456 1457 udc->driver = driver; 1458 1459 ret = driver->bind(&udc->gadget); 1460 if (ret) { 1461 pr_err("driver->bind() returned %d\n", ret); 1462 udc->driver = NULL; 1463 } 1464 1465 return ret; 1466} 1467 1468int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 1469{ 1470 struct at91_udc *udc = controller; 1471 1472 if (!driver || !driver->unbind || !driver->disconnect) { 1473 pr_err("bad paramter\n"); 1474 return -EINVAL; 1475 } 1476 1477 driver->disconnect(&udc->gadget); 1478 driver->unbind(&udc->gadget); 1479 udc->driver = NULL; 1480 1481 at91_stop(&udc->gadget); 1482 1483 return 0; 1484} 1485 1486int at91_udc_probe(struct at91_udc_data *pdata) 1487{ 1488 struct at91_udc *udc; 1489 int retval; 1490 struct at91_ep *ep; 1491 int i; 1492 1493 udc = kzalloc(sizeof(*udc), GFP_KERNEL); 1494 if (!udc) 1495 return -ENOMEM; 1496 1497 controller = udc; 1498 memcpy(&udc->board, pdata, sizeof(struct at91_udc_data)); 1499 if (udc->board.vbus_pin) { 1500 printf("%s: gpio vbus pin not supported yet.\n", __func__); 1501 return -ENXIO; 1502 } else { 1503 DBG("no VBUS detection, assuming always-on\n"); 1504 udc->vbus = 1; 1505 } 1506 1507#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9G20) 1508 udc->caps = &at91sam9260_udc_caps; 1509#endif 1510 1511 udc->enabled = 0; 1512 spin_lock_init(&udc->lock); 1513 1514 udc->gadget.ops = &at91_udc_ops; 1515 udc->gadget.ep0 = &udc->ep[0].ep; 1516 udc->gadget.name = driver_name; 1517 1518 for (i = 0; i < NUM_ENDPOINTS; i++) { 1519 ep = &udc->ep[i]; 1520 ep->ep.name = ep_names[i]; 1521 ep->ep.ops = &at91_ep_ops; 1522 ep->udc = udc; 1523 ep->int_mask = (1 << i); 1524 if (i != 0 && i != 3) 1525 ep->is_pingpong = 1; 1526 } 1527 1528 udc->udp_baseaddr = (void *)udc->board.baseaddr; 1529 if (IS_ERR(udc->udp_baseaddr)) 1530 return PTR_ERR(udc->udp_baseaddr); 1531 1532 if (udc->caps && udc->caps->init) { 1533 retval = udc->caps->init(udc); 1534 if (retval) 1535 return retval; 1536 } 1537 1538 udc_reinit(udc); 1539 1540 at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); 1541 at91_udp_write(udc, AT91_UDP_IDR, 0xffffffff); 1542 /* Clear all pending interrupts - UDP may be used by bootloader. */ 1543 at91_udp_write(udc, AT91_UDP_ICR, 0xffffffff); 1544 1545 INFO("%s version %s\n", driver_name, DRIVER_VERSION); 1546 return 0; 1547} 1548