1221337Sdim{ 2221337Sdim { 3221337Sdim { 4221337Sdim .rank = 0x1, 5221337Sdim .col = 0xC, 6221337Sdim .bk = 0x3, 7221337Sdim .bw = 0x0, 8221337Sdim .dbw = 0x0, 9221337Sdim .row_3_4 = 0x0, 10221337Sdim .cs0_row = 0x10, 11221337Sdim .cs1_row = 0x10, 12221337Sdim .cs0_high16bit_row = 0x10, 13221337Sdim .cs1_high16bit_row = 0x10, 14221337Sdim .ddrconfig = 0 15221337Sdim }, 16221337Sdim { 17221337Sdim {0x2f120a11}, 18263509Sdim {0x0f020602}, 19221337Sdim {0x00000002}, 20263509Sdim {0x00001111}, 21252723Sdim {0x0000000c}, 22221337Sdim {0x00000000}, 23252723Sdim 0x000000ff 24263509Sdim } 25221337Sdim }, 26221337Sdim { 27221337Sdim .ddr_freq = 664, /* clock rate(MHz) */ 28221337Sdim .dramtype = DDR3, 29221337Sdim .num_channels = 1, 30221337Sdim .stride = 0, 31252723Sdim .odt = 1 32221337Sdim }, 33221337Sdim { 34221337Sdim { 35235633Sdim {0x00000000, 0x43042001}, /* MSTR */ 36221337Sdim {0x00000064, 0x00500075}, /* RFSHTMG */ 37221337Sdim {0x000000d0, 0x000200a4}, /* INIT0 */ 38252723Sdim {0x000000d4, 0x00420000}, /* INIT1 */ 39221337Sdim {0x000000d8, 0x00000100}, /* INIT2 */ 40252723Sdim {0x000000dc, 0x0b600040}, /* INIT3 */ 41221337Sdim {0x000000e0, 0x00100000}, /* INIT4 */ 42263509Sdim {0x000000e4, 0x00090000}, /* INIT5 */ 43263509Sdim {0x000000f4, 0x000f011f}, /* RANKCTL */ 44235633Sdim {0x00000100, 0x0a0f160c}, /* DRAMTMG0 */ 45263509Sdim {0x00000104, 0x00080211}, /* DRAMTMG1 */ 46221337Sdim {0x00000108, 0x04050508}, /* DRAMTMG2 */ 47221337Sdim {0x0000010c, 0x00202006}, /* DRAMTMG3 */ 48221337Sdim {0x00000110, 0x05020306}, /* DRAMTMG4 */ 49221337Sdim {0x00000114, 0x04040302}, /* DRAMTMG5 */ 50221337Sdim {0x00000120, 0x00000905}, /* DRAMTMG8 */ 51221337Sdim {0x00000180, 0x00800020}, /* ZQCTL0 */ 52252723Sdim {0x00000184, 0x00000000}, /* ZQCTL1 */ 53221337Sdim {0x00000190, 0x07030002}, /* DFITMG0 */ 54252723Sdim {0x00000198, 0x07000101}, /* DFILPCFG0 */ 55221337Sdim {0x000001a0, 0xc0400003}, /* DFIUPD0 */ 56221337Sdim {0x00000240, 0x0600060c}, /* ODTCFG */ 57221337Sdim {0x00000244, 0x00000201}, /* ODTMAP */ 58221337Sdim {0x00000250, 0x00001f00}, /* SCHED */ 59263509Sdim {0x00000490, 0x00000001}, /* PCTRL_0 */ 60221337Sdim {0xffffffff, 0xffffffff} 61221337Sdim } 62221337Sdim }, 63263509Sdim { 64221337Sdim { 65221337Sdim {0x00000004, 0x0000008a}, /* PHYREG01 */ 66221337Sdim {0x00000014, 0x0000000a}, /* PHYREG05 */ 67252723Sdim {0x00000018, 0x00000000}, /* PHYREG06 */ 68252723Sdim {0x0000001c, 0x00000007}, /* PHYREG07 */ 69263509Sdim {0xffffffff, 0xffffffff} 70252723Sdim } 71221337Sdim } 72221337Sdim}, 73263509Sdim