1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2015 Google, Inc 4 */ 5 6#include <common.h> 7#include <fdtdec.h> 8#include <errno.h> 9#include <dm.h> 10#include <power/pmic.h> 11#include <power/regulator.h> 12#include <power/s5m8767.h> 13 14static const struct sec_voltage_desc buck_v1 = { 15 .max = 2225000, 16 .min = 650000, 17 .step = 6250, 18}; 19 20static const struct sec_voltage_desc buck_v2 = { 21 .max = 1600000, 22 .min = 600000, 23 .step = 6250, 24}; 25 26static const struct sec_voltage_desc buck_v3 = { 27 .max = 3000000, 28 .min = 750000, 29 .step = 12500, 30}; 31 32static const struct sec_voltage_desc ldo_v1 = { 33 .max = 3950000, 34 .min = 800000, 35 .step = 50000, 36}; 37 38static const struct sec_voltage_desc ldo_v2 = { 39 .max = 2375000, 40 .min = 800000, 41 .step = 25000, 42}; 43 44static const struct s5m8767_para buck_param[] = { 45 /* 46 * | voltage ----| | enable -| voltage 47 * regnum addr bpos mask addr on desc 48 */ 49 {S5M8767_BUCK1, 0x33, 0x0, 0xff, 0x32, 0x3, &buck_v1}, 50 {S5M8767_BUCK2, 0x35, 0x0, 0xff, 0x34, 0x1, &buck_v2}, 51 {S5M8767_BUCK3, 0x3e, 0x0, 0xff, 0x3d, 0x1, &buck_v2}, 52 {S5M8767_BUCK4, 0x47, 0x0, 0xff, 0x46, 0x1, &buck_v2}, 53 {S5M8767_BUCK5, 0x50, 0x0, 0xff, 0x4f, 0x3, &buck_v1}, 54 {S5M8767_BUCK6, 0x55, 0x0, 0xff, 0x54, 0x3, &buck_v1}, 55 {S5M8767_BUCK7, 0x57, 0x0, 0xff, 0x56, 0x3, &buck_v3}, 56 {S5M8767_BUCK8, 0x59, 0x0, 0xff, 0x58, 0x3, &buck_v3}, 57 {S5M8767_BUCK9, 0x5b, 0x0, 0xff, 0x5a, 0x3, &buck_v3}, 58}; 59 60static const struct s5m8767_para ldo_param[] = { 61 {S5M8767_LDO1, 0x5c, 0x0, 0x3f, 0x5c, 0x3, &ldo_v2}, 62 {S5M8767_LDO2, 0x5d, 0x0, 0x3f, 0x5d, 0x1, &ldo_v2}, 63 {S5M8767_LDO3, 0x61, 0x0, 0x3f, 0x61, 0x3, &ldo_v1}, 64 {S5M8767_LDO4, 0x62, 0x0, 0x3f, 0x62, 0x3, &ldo_v1}, 65 {S5M8767_LDO5, 0x63, 0x0, 0x3f, 0x63, 0x3, &ldo_v1}, 66 {S5M8767_LDO6, 0x64, 0x0, 0x3f, 0x64, 0x1, &ldo_v2}, 67 {S5M8767_LDO7, 0x65, 0x0, 0x3f, 0x65, 0x1, &ldo_v2}, 68 {S5M8767_LDO8, 0x66, 0x0, 0x3f, 0x66, 0x1, &ldo_v2}, 69 {S5M8767_LDO9, 0x67, 0x0, 0x3f, 0x67, 0x3, &ldo_v1}, 70 {S5M8767_LDO10, 0x68, 0x0, 0x3f, 0x68, 0x1, &ldo_v1}, 71 {S5M8767_LDO11, 0x69, 0x0, 0x3f, 0x69, 0x1, &ldo_v1}, 72 {S5M8767_LDO12, 0x6a, 0x0, 0x3f, 0x6a, 0x1, &ldo_v1}, 73 {S5M8767_LDO13, 0x6b, 0x0, 0x3f, 0x6b, 0x3, &ldo_v1}, 74 {S5M8767_LDO14, 0x6c, 0x0, 0x3f, 0x6c, 0x1, &ldo_v1}, 75 {S5M8767_LDO15, 0x6d, 0x0, 0x3f, 0x6d, 0x1, &ldo_v2}, 76 {S5M8767_LDO16, 0x6e, 0x0, 0x3f, 0x6e, 0x1, &ldo_v1}, 77 {S5M8767_LDO17, 0x6f, 0x0, 0x3f, 0x6f, 0x3, &ldo_v1}, 78 {S5M8767_LDO18, 0x70, 0x0, 0x3f, 0x70, 0x3, &ldo_v1}, 79 {S5M8767_LDO19, 0x71, 0x0, 0x3f, 0x71, 0x3, &ldo_v1}, 80 {S5M8767_LDO20, 0x72, 0x0, 0x3f, 0x72, 0x3, &ldo_v1}, 81 {S5M8767_LDO21, 0x73, 0x0, 0x3f, 0x73, 0x3, &ldo_v1}, 82 {S5M8767_LDO22, 0x74, 0x0, 0x3f, 0x74, 0x3, &ldo_v1}, 83 {S5M8767_LDO23, 0x75, 0x0, 0x3f, 0x75, 0x3, &ldo_v1}, 84 {S5M8767_LDO24, 0x76, 0x0, 0x3f, 0x76, 0x3, &ldo_v1}, 85 {S5M8767_LDO25, 0x77, 0x0, 0x3f, 0x77, 0x3, &ldo_v1}, 86 {S5M8767_LDO26, 0x78, 0x0, 0x3f, 0x78, 0x3, &ldo_v1}, 87 {S5M8767_LDO27, 0x79, 0x0, 0x3f, 0x79, 0x3, &ldo_v1}, 88 {S5M8767_LDO28, 0x7a, 0x0, 0x3f, 0x7a, 0x3, &ldo_v1}, 89}; 90 91enum { 92 ENABLE_SHIFT = 6, 93 ENABLE_MASK = 3, 94}; 95 96static int reg_get_value(struct udevice *dev, const struct s5m8767_para *param) 97{ 98 const struct sec_voltage_desc *desc; 99 int ret, uv, val; 100 101 ret = pmic_reg_read(dev->parent, param->vol_addr); 102 if (ret < 0) 103 return ret; 104 105 desc = param->vol; 106 val = (ret >> param->vol_bitpos) & param->vol_bitmask; 107 uv = desc->min + val * desc->step; 108 109 return uv; 110} 111 112static int reg_set_value(struct udevice *dev, const struct s5m8767_para *param, 113 int uv) 114{ 115 const struct sec_voltage_desc *desc; 116 int ret, val; 117 118 desc = param->vol; 119 if (uv < desc->min || uv > desc->max) 120 return -EINVAL; 121 val = (uv - desc->min) / desc->step; 122 val = (val & param->vol_bitmask) << param->vol_bitpos; 123 ret = pmic_clrsetbits(dev->parent, param->vol_addr, 124 param->vol_bitmask << param->vol_bitpos, 125 val); 126 127 return ret; 128} 129 130static int s5m8767_ldo_probe(struct udevice *dev) 131{ 132 struct dm_regulator_uclass_plat *uc_pdata; 133 134 uc_pdata = dev_get_uclass_plat(dev); 135 136 uc_pdata->type = REGULATOR_TYPE_LDO; 137 uc_pdata->mode_count = 0; 138 139 return 0; 140} 141static int ldo_get_value(struct udevice *dev) 142{ 143 int ldo = dev->driver_data; 144 145 return reg_get_value(dev, &ldo_param[ldo]); 146} 147 148static int ldo_set_value(struct udevice *dev, int uv) 149{ 150 int ldo = dev->driver_data; 151 152 return reg_set_value(dev, &ldo_param[ldo], uv); 153} 154 155static int reg_get_enable(struct udevice *dev, const struct s5m8767_para *param) 156{ 157 bool enable; 158 int ret; 159 160 ret = pmic_reg_read(dev->parent, param->reg_enaddr); 161 if (ret < 0) 162 return ret; 163 164 enable = (ret >> ENABLE_SHIFT) & ENABLE_MASK; 165 166 return enable; 167} 168 169static int reg_set_enable(struct udevice *dev, const struct s5m8767_para *param, 170 bool enable) 171{ 172 int ret; 173 174 ret = pmic_reg_read(dev->parent, param->reg_enaddr); 175 if (ret < 0) 176 return ret; 177 178 ret = pmic_clrsetbits(dev->parent, param->reg_enaddr, 179 ENABLE_MASK << ENABLE_SHIFT, 180 enable ? param->reg_enbiton << ENABLE_SHIFT : 0); 181 182 return ret; 183} 184 185static int ldo_get_enable(struct udevice *dev) 186{ 187 int ldo = dev->driver_data; 188 189 return reg_get_enable(dev, &ldo_param[ldo]); 190} 191 192static int ldo_set_enable(struct udevice *dev, bool enable) 193{ 194 int ldo = dev->driver_data; 195 196 return reg_set_enable(dev, &ldo_param[ldo], enable); 197} 198 199static int s5m8767_buck_probe(struct udevice *dev) 200{ 201 struct dm_regulator_uclass_plat *uc_pdata; 202 203 uc_pdata = dev_get_uclass_plat(dev); 204 205 uc_pdata->type = REGULATOR_TYPE_BUCK; 206 uc_pdata->mode_count = 0; 207 208 return 0; 209} 210 211static int buck_get_value(struct udevice *dev) 212{ 213 int buck = dev->driver_data; 214 215 return reg_get_value(dev, &buck_param[buck]); 216} 217 218static int buck_set_value(struct udevice *dev, int uv) 219{ 220 int buck = dev->driver_data; 221 222 return reg_set_value(dev, &buck_param[buck], uv); 223} 224 225static int buck_get_enable(struct udevice *dev) 226{ 227 int buck = dev->driver_data; 228 229 return reg_get_enable(dev, &buck_param[buck]); 230} 231 232static int buck_set_enable(struct udevice *dev, bool enable) 233{ 234 int buck = dev->driver_data; 235 236 return reg_set_enable(dev, &buck_param[buck], enable); 237} 238 239static const struct dm_regulator_ops s5m8767_ldo_ops = { 240 .get_value = ldo_get_value, 241 .set_value = ldo_set_value, 242 .get_enable = ldo_get_enable, 243 .set_enable = ldo_set_enable, 244}; 245 246U_BOOT_DRIVER(s5m8767_ldo) = { 247 .name = S5M8767_LDO_DRIVER, 248 .id = UCLASS_REGULATOR, 249 .ops = &s5m8767_ldo_ops, 250 .probe = s5m8767_ldo_probe, 251}; 252 253static const struct dm_regulator_ops s5m8767_buck_ops = { 254 .get_value = buck_get_value, 255 .set_value = buck_set_value, 256 .get_enable = buck_get_enable, 257 .set_enable = buck_set_enable, 258}; 259 260U_BOOT_DRIVER(s5m8767_buck) = { 261 .name = S5M8767_BUCK_DRIVER, 262 .id = UCLASS_REGULATOR, 263 .ops = &s5m8767_buck_ops, 264 .probe = s5m8767_buck_probe, 265}; 266