1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Microsemi SoCs pinctrl driver 4 * 5 * Author: <horatiu.vultur@microchip.com> 6 * Copyright (c) 2018 Microsemi Corporation 7 */ 8 9#include <common.h> 10#include <config.h> 11#include <dm.h> 12#include <dm/device-internal.h> 13#include <dm/lists.h> 14#include <dm/pinctrl.h> 15#include <dm/root.h> 16#include <errno.h> 17#include <fdtdec.h> 18#include <linux/io.h> 19#include <asm/gpio.h> 20#include <asm/system.h> 21#include "mscc-common.h" 22 23enum { 24 FUNC_NONE, 25 FUNC_GPIO, 26 FUNC_IRQ0_IN, 27 FUNC_IRQ0_OUT, 28 FUNC_IRQ1_IN, 29 FUNC_IRQ1_OUT, 30 FUNC_MIIM1, 31 FUNC_MIIM2, 32 FUNC_PCI_WAKE, 33 FUNC_PTP0, 34 FUNC_PTP1, 35 FUNC_PTP2, 36 FUNC_PTP3, 37 FUNC_PWM, 38 FUNC_RECO_CLK0, 39 FUNC_RECO_CLK1, 40 FUNC_SFP0, 41 FUNC_SFP1, 42 FUNC_SFP2, 43 FUNC_SFP3, 44 FUNC_SFP4, 45 FUNC_SFP5, 46 FUNC_SFP6, 47 FUNC_SFP7, 48 FUNC_SFP8, 49 FUNC_SFP9, 50 FUNC_SFP10, 51 FUNC_SFP11, 52 FUNC_SFP12, 53 FUNC_SFP13, 54 FUNC_SFP14, 55 FUNC_SFP15, 56 FUNC_SG0, 57 FUNC_SG1, 58 FUNC_SG2, 59 FUNC_SI, 60 FUNC_TACHO, 61 FUNC_TWI, 62 FUNC_TWI2, 63 FUNC_TWI_SCL_M, 64 FUNC_UART, 65 FUNC_UART2, 66 FUNC_MAX 67}; 68 69static char * const jr2_function_names[] = { 70 [FUNC_NONE] = "none", 71 [FUNC_GPIO] = "gpio", 72 [FUNC_IRQ0_IN] = "irq0_in", 73 [FUNC_IRQ0_OUT] = "irq0_out", 74 [FUNC_IRQ1_IN] = "irq1_in", 75 [FUNC_IRQ1_OUT] = "irq1_out", 76 [FUNC_MIIM1] = "miim1", 77 [FUNC_MIIM2] = "miim2", 78 [FUNC_PCI_WAKE] = "pci_wake", 79 [FUNC_PTP0] = "ptp0", 80 [FUNC_PTP1] = "ptp1", 81 [FUNC_PTP2] = "ptp2", 82 [FUNC_PTP3] = "ptp3", 83 [FUNC_PWM] = "pwm", 84 [FUNC_RECO_CLK0] = "reco_clk0", 85 [FUNC_RECO_CLK1] = "reco_clk1", 86 [FUNC_SFP0] = "sfp0", 87 [FUNC_SFP1] = "sfp1", 88 [FUNC_SFP2] = "sfp2", 89 [FUNC_SFP3] = "sfp3", 90 [FUNC_SFP4] = "sfp4", 91 [FUNC_SFP5] = "sfp5", 92 [FUNC_SFP6] = "sfp6", 93 [FUNC_SFP7] = "sfp7", 94 [FUNC_SFP8] = "sfp8", 95 [FUNC_SFP9] = "sfp9", 96 [FUNC_SFP10] = "sfp10", 97 [FUNC_SFP11] = "sfp11", 98 [FUNC_SFP12] = "sfp12", 99 [FUNC_SFP13] = "sfp13", 100 [FUNC_SFP14] = "sfp14", 101 [FUNC_SFP15] = "sfp15", 102 [FUNC_SG0] = "sg0", 103 [FUNC_SG1] = "sg1", 104 [FUNC_SG2] = "sg2", 105 [FUNC_SI] = "si", 106 [FUNC_TACHO] = "tacho", 107 [FUNC_TWI] = "twi", 108 [FUNC_TWI2] = "twi2", 109 [FUNC_TWI_SCL_M] = "twi_scl_m", 110 [FUNC_UART] = "uart", 111 [FUNC_UART2] = "uart2", 112}; 113 114#define JR2_P(p, f0, f1) \ 115static struct mscc_pin_caps jr2_pin_##p = { \ 116 .pin = p, \ 117 .functions = { \ 118 FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_NONE \ 119 }, \ 120} 121 122JR2_P(0, SG0, NONE); 123JR2_P(1, SG0, NONE); 124JR2_P(2, SG0, NONE); 125JR2_P(3, SG0, NONE); 126JR2_P(4, SG1, NONE); 127JR2_P(5, SG1, NONE); 128JR2_P(6, IRQ0_IN, IRQ0_OUT); 129JR2_P(7, IRQ1_IN, IRQ1_OUT); 130JR2_P(8, PTP0, NONE); 131JR2_P(9, PTP1, NONE); 132JR2_P(10, UART, NONE); 133JR2_P(11, UART, NONE); 134JR2_P(12, SG1, NONE); 135JR2_P(13, SG1, NONE); 136JR2_P(14, TWI, TWI_SCL_M); 137JR2_P(15, TWI, NONE); 138JR2_P(16, SI, TWI_SCL_M); 139JR2_P(17, SI, TWI_SCL_M); 140JR2_P(18, SI, TWI_SCL_M); 141JR2_P(19, PCI_WAKE, NONE); 142JR2_P(20, IRQ0_OUT, TWI_SCL_M); 143JR2_P(21, IRQ1_OUT, TWI_SCL_M); 144JR2_P(22, TACHO, NONE); 145JR2_P(23, PWM, NONE); 146JR2_P(24, UART2, NONE); 147JR2_P(25, UART2, SI); 148JR2_P(26, PTP2, SI); 149JR2_P(27, PTP3, SI); 150JR2_P(28, TWI2, SI); 151JR2_P(29, TWI, SI); 152JR2_P(30, SG2, SI); 153JR2_P(31, SG2, SI); 154JR2_P(32, SG2, SI); 155JR2_P(33, SG2, SI); 156JR2_P(34, NONE, TWI_SCL_M); 157JR2_P(35, NONE, TWI_SCL_M); 158JR2_P(36, NONE, TWI_SCL_M); 159JR2_P(37, NONE, TWI_SCL_M); 160JR2_P(38, NONE, TWI_SCL_M); 161JR2_P(39, NONE, TWI_SCL_M); 162JR2_P(40, NONE, TWI_SCL_M); 163JR2_P(41, NONE, TWI_SCL_M); 164JR2_P(42, NONE, TWI_SCL_M); 165JR2_P(43, NONE, TWI_SCL_M); 166JR2_P(44, NONE, SFP8); 167JR2_P(45, NONE, SFP9); 168JR2_P(46, NONE, SFP10); 169JR2_P(47, NONE, SFP11); 170JR2_P(48, SFP0, NONE); 171JR2_P(49, SFP1, SI); 172JR2_P(50, SFP2, SI); 173JR2_P(51, SFP3, SI); 174JR2_P(52, SFP4, NONE); 175JR2_P(53, SFP5, NONE); 176JR2_P(54, SFP6, NONE); 177JR2_P(55, SFP7, NONE); 178JR2_P(56, MIIM1, SFP12); 179JR2_P(57, MIIM1, SFP13); 180JR2_P(58, MIIM2, SFP14); 181JR2_P(59, MIIM2, SFP15); 182JR2_P(60, NONE, NONE); 183JR2_P(61, NONE, NONE); 184JR2_P(62, NONE, NONE); 185JR2_P(63, NONE, NONE); 186 187#define JR2_PIN(n) { \ 188 .name = "GPIO_"#n, \ 189 .drv_data = &jr2_pin_##n \ 190} 191 192static const struct mscc_pin_data jr2_pins[] = { 193 JR2_PIN(0), 194 JR2_PIN(1), 195 JR2_PIN(2), 196 JR2_PIN(3), 197 JR2_PIN(4), 198 JR2_PIN(5), 199 JR2_PIN(6), 200 JR2_PIN(7), 201 JR2_PIN(8), 202 JR2_PIN(9), 203 JR2_PIN(10), 204 JR2_PIN(11), 205 JR2_PIN(12), 206 JR2_PIN(13), 207 JR2_PIN(14), 208 JR2_PIN(15), 209 JR2_PIN(16), 210 JR2_PIN(17), 211 JR2_PIN(18), 212 JR2_PIN(19), 213 JR2_PIN(20), 214 JR2_PIN(21), 215 JR2_PIN(22), 216 JR2_PIN(23), 217 JR2_PIN(24), 218 JR2_PIN(25), 219 JR2_PIN(26), 220 JR2_PIN(27), 221 JR2_PIN(28), 222 JR2_PIN(29), 223 JR2_PIN(30), 224 JR2_PIN(31), 225 JR2_PIN(32), 226 JR2_PIN(33), 227 JR2_PIN(34), 228 JR2_PIN(35), 229 JR2_PIN(36), 230 JR2_PIN(37), 231 JR2_PIN(38), 232 JR2_PIN(39), 233 JR2_PIN(40), 234 JR2_PIN(41), 235 JR2_PIN(42), 236 JR2_PIN(43), 237 JR2_PIN(44), 238 JR2_PIN(45), 239 JR2_PIN(46), 240 JR2_PIN(47), 241 JR2_PIN(48), 242 JR2_PIN(49), 243 JR2_PIN(50), 244 JR2_PIN(51), 245 JR2_PIN(52), 246 JR2_PIN(53), 247 JR2_PIN(54), 248 JR2_PIN(55), 249 JR2_PIN(56), 250 JR2_PIN(57), 251 JR2_PIN(58), 252 JR2_PIN(59), 253 JR2_PIN(60), 254 JR2_PIN(61), 255 JR2_PIN(62), 256 JR2_PIN(63), 257}; 258 259static const unsigned long jr2_gpios[] = { 260 [MSCC_GPIO_OUT_SET] = 0x00, 261 [MSCC_GPIO_OUT_CLR] = 0x08, 262 [MSCC_GPIO_OUT] = 0x10, 263 [MSCC_GPIO_IN] = 0x18, 264 [MSCC_GPIO_OE] = 0x20, 265 [MSCC_GPIO_INTR] = 0x28, 266 [MSCC_GPIO_INTR_ENA] = 0x30, 267 [MSCC_GPIO_INTR_IDENT] = 0x38, 268 [MSCC_GPIO_ALT0] = 0x40, 269 [MSCC_GPIO_ALT1] = 0x48, 270}; 271 272static int jr2_gpio_probe(struct udevice *dev) 273{ 274 struct gpio_dev_priv *uc_priv; 275 276 uc_priv = dev_get_uclass_priv(dev); 277 uc_priv->bank_name = "jr2-gpio"; 278 uc_priv->gpio_count = ARRAY_SIZE(jr2_pins); 279 280 return 0; 281} 282 283static struct driver jr2_gpio_driver = { 284 .name = "jr2-gpio", 285 .id = UCLASS_GPIO, 286 .probe = jr2_gpio_probe, 287 .ops = &mscc_gpio_ops, 288}; 289 290static int jr2_pinctrl_probe(struct udevice *dev) 291{ 292 int ret; 293 294 ret = mscc_pinctrl_probe(dev, FUNC_MAX, jr2_pins, 295 ARRAY_SIZE(jr2_pins), 296 jr2_function_names, 297 jr2_gpios); 298 299 if (ret) 300 return ret; 301 302 ret = device_bind(dev, &jr2_gpio_driver, "jr2-gpio", NULL, 303 dev_ofnode(dev), NULL); 304 305 if (ret) 306 return ret; 307 308 return 0; 309} 310 311static const struct udevice_id jr2_pinctrl_of_match[] = { 312 { .compatible = "mscc,jaguar2-pinctrl" }, 313 {}, 314}; 315 316U_BOOT_DRIVER(jr2_pinctrl) = { 317 .name = "jr2-pinctrl", 318 .id = UCLASS_PINCTRL, 319 .of_match = of_match_ptr(jr2_pinctrl_of_match), 320 .probe = jr2_pinctrl_probe, 321 .priv_auto = sizeof(struct mscc_pinctrl), 322 .ops = &mscc_pinctrl_ops, 323}; 324