1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
4 */
5
6#include <common.h>
7#include <clk-uclass.h>
8#include <dm.h>
9#include <log.h>
10#include <misc.h>
11#include <asm/arch-tegra/bpmp_abi.h>
12
13static ulong tegra186_clk_get_rate(struct clk *clk)
14{
15	struct mrq_clk_request req;
16	struct mrq_clk_response resp;
17	int ret;
18
19	debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
20	      clk->id);
21
22	req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id;
23
24	ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
25			sizeof(resp));
26	if (ret < 0)
27		return ret;
28
29	return resp.clk_get_rate.rate;
30}
31
32static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)
33{
34	struct mrq_clk_request req;
35	struct mrq_clk_response resp;
36	int ret;
37
38	debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate,
39	      clk->dev, clk->id);
40
41	req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id;
42	req.clk_set_rate.rate = rate;
43
44	ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
45			sizeof(resp));
46	if (ret < 0)
47		return ret;
48
49	return resp.clk_set_rate.rate;
50}
51
52static int tegra186_clk_en_dis(struct clk *clk,
53			       enum mrq_reset_commands cmd)
54{
55	struct mrq_clk_request req;
56	struct mrq_clk_response resp;
57	int ret;
58
59	req.cmd_and_id = (cmd << 24) | clk->id;
60
61	ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
62			sizeof(resp));
63	if (ret < 0)
64		return ret;
65
66	return 0;
67}
68
69static int tegra186_clk_enable(struct clk *clk)
70{
71	debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
72	      clk->id);
73
74	return tegra186_clk_en_dis(clk, CMD_CLK_ENABLE);
75}
76
77static int tegra186_clk_disable(struct clk *clk)
78{
79	debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
80	      clk->id);
81
82	return tegra186_clk_en_dis(clk, CMD_CLK_DISABLE);
83}
84
85static struct clk_ops tegra186_clk_ops = {
86	.get_rate = tegra186_clk_get_rate,
87	.set_rate = tegra186_clk_set_rate,
88	.enable = tegra186_clk_enable,
89	.disable = tegra186_clk_disable,
90};
91
92static int tegra186_clk_probe(struct udevice *dev)
93{
94	debug("%s(dev=%p)\n", __func__, dev);
95
96	return 0;
97}
98
99U_BOOT_DRIVER(tegra186_clk) = {
100	.name		= "tegra186_clk",
101	.id		= UCLASS_CLK,
102	.probe		= tegra186_clk_probe,
103	.ops = &tegra186_clk_ops,
104};
105