1/**************************************************************************** 2* 3* Realmode X86 Emulator Library 4* 5* Copyright (C) 1991-2004 SciTech Software, Inc. 6* Copyright (C) David Mosberger-Tang 7* Copyright (C) 1999 Egbert Eich 8* 9* ======================================================================== 10* 11* Permission to use, copy, modify, distribute, and sell this software and 12* its documentation for any purpose is hereby granted without fee, 13* provided that the above copyright notice appear in all copies and that 14* both that copyright notice and this permission notice appear in 15* supporting documentation, and that the name of the authors not be used 16* in advertising or publicity pertaining to distribution of the software 17* without specific, written prior permission. The authors makes no 18* representations about the suitability of this software for any purpose. 19* It is provided "as is" without express or implied warranty. 20* 21* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 22* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 23* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 24* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF 25* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 26* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 27* PERFORMANCE OF THIS SOFTWARE. 28* 29* ======================================================================== 30* 31* Language: ANSI C 32* Environment: Any 33* Developer: Kendall Bennett 34* 35* Description: Header file for x86 register definitions. 36* 37****************************************************************************/ 38 39#ifndef __X86EMU_REGS_H 40#define __X86EMU_REGS_H 41 42/*---------------------- Macros and type definitions ----------------------*/ 43 44#include <linux/printk.h> 45#pragma pack(1) 46 47/* 48 * General EAX, EBX, ECX, EDX type registers. Note that for 49 * portability, and speed, the issue of byte swapping is not addressed 50 * in the registers. All registers are stored in the default format 51 * available on the host machine. The only critical issue is that the 52 * registers should line up EXACTLY in the same manner as they do in 53 * the 386. That is: 54 * 55 * EAX & 0xff === AL 56 * EAX & 0xffff == AX 57 * 58 * etc. The result is that alot of the calculations can then be 59 * done using the native instruction set fully. 60 */ 61 62#ifdef __BIG_ENDIAN__ 63 64typedef struct { 65 u32 e_reg; 66} I32_reg_t; 67 68typedef struct { 69 u16 filler0, x_reg; 70} I16_reg_t; 71 72typedef struct { 73 u8 filler0, filler1, h_reg, l_reg; 74} I8_reg_t; 75 76#else /* !__BIG_ENDIAN__ */ 77 78typedef struct { 79 u32 e_reg; 80} I32_reg_t; 81 82typedef struct { 83 u16 x_reg; 84} I16_reg_t; 85 86typedef struct { 87 u8 l_reg, h_reg; 88} I8_reg_t; 89 90#endif /* BIG_ENDIAN */ 91 92typedef union { 93 I32_reg_t I32_reg; 94 I16_reg_t I16_reg; 95 I8_reg_t I8_reg; 96} i386_general_register; 97 98struct i386_general_regs { 99 i386_general_register A, B, C, D; 100}; 101 102typedef struct i386_general_regs Gen_reg_t; 103 104struct i386_special_regs { 105 i386_general_register SP, BP, SI, DI, IP; 106 u32 FLAGS; 107}; 108 109/* 110 * Segment registers here represent the 16 bit quantities 111 * CS, DS, ES, SS. 112 */ 113 114#undef CS 115#undef DS 116#undef SS 117#undef ES 118#undef FS 119#undef GS 120 121struct i386_segment_regs { 122 u16 CS, DS, SS, ES, FS, GS; 123}; 124 125/* 8 bit registers */ 126#define R_AH gen.A.I8_reg.h_reg 127#define R_AL gen.A.I8_reg.l_reg 128#define R_BH gen.B.I8_reg.h_reg 129#define R_BL gen.B.I8_reg.l_reg 130#define R_CH gen.C.I8_reg.h_reg 131#define R_CL gen.C.I8_reg.l_reg 132#define R_DH gen.D.I8_reg.h_reg 133#define R_DL gen.D.I8_reg.l_reg 134 135/* 16 bit registers */ 136#define R_AX gen.A.I16_reg.x_reg 137#define R_BX gen.B.I16_reg.x_reg 138#define R_CX gen.C.I16_reg.x_reg 139#define R_DX gen.D.I16_reg.x_reg 140 141/* 32 bit extended registers */ 142#define R_EAX gen.A.I32_reg.e_reg 143#define R_EBX gen.B.I32_reg.e_reg 144#define R_ECX gen.C.I32_reg.e_reg 145#define R_EDX gen.D.I32_reg.e_reg 146 147/* special registers */ 148#define R_SP spc.SP.I16_reg.x_reg 149#define R_BP spc.BP.I16_reg.x_reg 150#define R_SI spc.SI.I16_reg.x_reg 151#define R_DI spc.DI.I16_reg.x_reg 152#define R_IP spc.IP.I16_reg.x_reg 153#define R_FLG spc.FLAGS 154 155/* special registers */ 156#define R_SP spc.SP.I16_reg.x_reg 157#define R_BP spc.BP.I16_reg.x_reg 158#define R_SI spc.SI.I16_reg.x_reg 159#define R_DI spc.DI.I16_reg.x_reg 160#define R_IP spc.IP.I16_reg.x_reg 161#define R_FLG spc.FLAGS 162 163/* special registers */ 164#define R_ESP spc.SP.I32_reg.e_reg 165#define R_EBP spc.BP.I32_reg.e_reg 166#define R_ESI spc.SI.I32_reg.e_reg 167#define R_EDI spc.DI.I32_reg.e_reg 168#define R_EIP spc.IP.I32_reg.e_reg 169#define R_EFLG spc.FLAGS 170 171/* segment registers */ 172#define R_CS seg.CS 173#define R_DS seg.DS 174#define R_SS seg.SS 175#define R_ES seg.ES 176#define R_FS seg.FS 177#define R_GS seg.GS 178 179/* flag conditions */ 180#define FB_CF 0x0001 /* CARRY flag */ 181#define FB_PF 0x0004 /* PARITY flag */ 182#define FB_AF 0x0010 /* AUX flag */ 183#define FB_ZF 0x0040 /* ZERO flag */ 184#define FB_SF 0x0080 /* SIGN flag */ 185#define FB_TF 0x0100 /* TRAP flag */ 186#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */ 187#define FB_DF 0x0400 /* DIR flag */ 188#define FB_OF 0x0800 /* OVERFLOW flag */ 189 190/* 80286 and above always have bit#1 set */ 191#define F_ALWAYS_ON (0x0002) /* flag bits always on */ 192 193/* 194 * Define a mask for only those flag bits we will ever pass back 195 * (via PUSHF) 196 */ 197#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) 198 199/* following bits masked in to a 16bit quantity */ 200 201#define F_CF 0x0001 /* CARRY flag */ 202#define F_PF 0x0004 /* PARITY flag */ 203#define F_AF 0x0010 /* AUX flag */ 204#define F_ZF 0x0040 /* ZERO flag */ 205#define F_SF 0x0080 /* SIGN flag */ 206#define F_TF 0x0100 /* TRAP flag */ 207#define F_IF 0x0200 /* INTERRUPT ENABLE flag */ 208#define F_DF 0x0400 /* DIR flag */ 209#define F_OF 0x0800 /* OVERFLOW flag */ 210 211#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag)) 212#define SET_FLAG(flag) (M.x86.R_FLG |= (flag)) 213#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag)) 214#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag)) 215#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0) 216 217#define CONDITIONAL_SET_FLAG(COND,FLAG) \ 218 if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG) 219 220#define F_PF_CALC 0x010000 /* PARITY flag has been calced */ 221#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */ 222#define F_SF_CALC 0x040000 /* SIGN flag has been calced */ 223 224#define F_ALL_CALC 0xff0000 /* All have been calced */ 225 226/* 227 * Emulator machine state. 228 * Segment usage control. 229 */ 230#define SYSMODE_SEG_DS_SS 0x00000001 231#define SYSMODE_SEGOVR_CS 0x00000002 232#define SYSMODE_SEGOVR_DS 0x00000004 233#define SYSMODE_SEGOVR_ES 0x00000008 234#define SYSMODE_SEGOVR_FS 0x00000010 235#define SYSMODE_SEGOVR_GS 0x00000020 236#define SYSMODE_SEGOVR_SS 0x00000040 237#define SYSMODE_PREFIX_REPE 0x00000080 238#define SYSMODE_PREFIX_REPNE 0x00000100 239#define SYSMODE_PREFIX_DATA 0x00000200 240#define SYSMODE_PREFIX_ADDR 0x00000400 241#define SYSMODE_INTR_PENDING 0x10000000 242#define SYSMODE_EXTRN_INTR 0x20000000 243#define SYSMODE_HALTED 0x40000000 244 245#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ 246 SYSMODE_SEGOVR_CS | \ 247 SYSMODE_SEGOVR_DS | \ 248 SYSMODE_SEGOVR_ES | \ 249 SYSMODE_SEGOVR_FS | \ 250 SYSMODE_SEGOVR_GS | \ 251 SYSMODE_SEGOVR_SS) 252#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ 253 SYSMODE_SEGOVR_CS | \ 254 SYSMODE_SEGOVR_DS | \ 255 SYSMODE_SEGOVR_ES | \ 256 SYSMODE_SEGOVR_FS | \ 257 SYSMODE_SEGOVR_GS | \ 258 SYSMODE_SEGOVR_SS | \ 259 SYSMODE_PREFIX_DATA | \ 260 SYSMODE_PREFIX_ADDR) 261 262#define INTR_SYNCH 0x1 263#define INTR_ASYNCH 0x2 264#define INTR_HALTED 0x4 265 266typedef struct { 267 struct i386_general_regs gen; 268 struct i386_special_regs spc; 269 struct i386_segment_regs seg; 270 /* 271 * MODE contains information on: 272 * REPE prefix 2 bits repe,repne 273 * SEGMENT overrides 5 bits normal,DS,SS,CS,ES 274 * Delayed flag set 3 bits (zero, signed, parity) 275 * reserved 6 bits 276 * interrupt # 8 bits instruction raised interrupt 277 * BIOS video segregs 4 bits 278 * Interrupt Pending 1 bits 279 * Extern interrupt 1 bits 280 * Halted 1 bits 281 */ 282 long mode; 283 u8 intno; 284 volatile int intr; /* mask of pending interrupts */ 285 int debug; 286#ifdef CONFIG_X86EMU_DEBUG 287 int check; 288 u16 saved_ip; 289 u16 saved_cs; 290 int enc_pos; 291 int enc_str_pos; 292 char decode_buf[32]; /* encoded byte stream */ 293 char decoded_buf[256]; /* disassembled strings */ 294#endif 295} X86EMU_regs; 296 297/**************************************************************************** 298REMARKS: 299Structure maintaining the emulator machine state. 300 301MEMBERS: 302x86 - X86 registers 303mem_base - Base real mode memory for the emulator 304mem_size - Size of the real mode memory block for the emulator 305****************************************************************************/ 306#undef x86 307typedef struct { 308 X86EMU_regs x86; 309 u8 *mem_base; 310 u32 mem_size; 311 void *private; 312} X86EMU_sysEnv; 313 314#pragma pack() 315 316/*----------------------------- Global Variables --------------------------*/ 317 318#ifdef __cplusplus 319extern "C" { /* Use "C" linkage when in C++ mode */ 320#endif 321 322/* Global emulator machine state. 323 * 324 * We keep it global to avoid pointer dereferences in the code for speed. 325 */ 326 327 extern X86EMU_sysEnv _X86EMU_env; 328#define M _X86EMU_env 329 330/*-------------------------- Function Prototypes --------------------------*/ 331 332/* Function to log information at runtime */ 333 334#ifndef __KERNEL__ 335 void printk(const char *fmt, ...); 336#endif 337 338#ifdef __cplusplus 339} /* End of "C" linkage for C++ */ 340#endif 341#endif /* __X86EMU_REGS_H */ 342