1230130Smav// SPDX-License-Identifier: GPL-2.0+
2230130Smav/*
3230130Smav * WORK Microwave work_92105 board support
4230130Smav *
5230130Smav * (C) Copyright 2014  DENX Software Engineering GmbH
6230130Smav * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
7230130Smav */
8230130Smav
9230130Smav#include <common.h>
10230130Smav#include <init.h>
11230130Smav#include <asm/global_data.h>
12230130Smav#include <asm/io.h>
13230130Smav#include <asm/arch/sys_proto.h>
14230130Smav#include <asm/arch/cpu.h>
15230130Smav#include <asm/arch/clk.h>
16230130Smav#include <asm/arch/emc.h>
17230130Smav#include <asm/arch/wdt.h>
18230130Smav#include <asm/gpio.h>
19230130Smav#include <spl.h>
20230130Smav#include <linux/delay.h>
21230130Smav#include "work_92105_display.h"
22230130Smav
23230130SmavDECLARE_GLOBAL_DATA_PTR;
24230130Smav
25230130Smavstatic struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
26230130Smavstatic struct wdt_regs  *wdt = (struct wdt_regs *)WDT_BASE;
27230130Smav
28230130Smavvoid reset_periph(void)
29230130Smav{
30230130Smav	setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
31230130Smav	writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl);
32230130Smav	udelay(150);
33230130Smav	writel(0, &wdt->mctrl);
34230130Smav	clrbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
35230130Smav}
36230130Smav
37230130Smavint board_early_init_f(void)
38230130Smav{
39230130Smav	/* initialize serial port for console */
40230130Smav	lpc32xx_uart_init(CONFIG_CONS_INDEX);
41230130Smav	/* enable I2C, SSP, MAC, NAND */
42230130Smav	lpc32xx_i2c_init(1); /* only I2C1 has devices, I2C2 has none */
43230130Smav	lpc32xx_ssp_init();
44230130Smav	lpc32xx_mac_init();
45230130Smav	lpc32xx_mlc_nand_init();
46230130Smav	/* Display must wait until after relocation and devices init */
47230130Smav	return 0;
48230130Smav}
49230130Smav
50248786Smav#define GPO_19 115
51230130Smav
52230130Smavint board_early_init_r(void)
53230130Smav{
54230130Smav	/* Set NAND !WP to 1 through GPO_19 */
55230130Smav	gpio_request(GPO_19, "NAND_nWP");
56230130Smav	gpio_direction_output(GPO_19, 1);
57230130Smav
58230130Smav#ifdef CONFIG_DEPRECATED
59248786Smav	/* initialize display */
60230130Smav	work_92105_display_init();
61230130Smav#endif
62248786Smav
63230130Smav	return 0;
64230130Smav}
65248786Smav
66230130Smavint board_init(void)
67230130Smav{
68248786Smav	reset_periph();
69230130Smav	/* adress of boot parameters */
70230130Smav	gd->bd->bi_boot_params  = CFG_SYS_SDRAM_BASE + 0x100;
71248786Smav
72230130Smav	return 0;
73230130Smav}
74248786Smav
75230130Smavint dram_init(void)
76230130Smav{
77248786Smav	gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE,
78230130Smav				    CFG_SYS_SDRAM_SIZE);
79230130Smav
80248786Smav	return 0;
81230130Smav}
82230130Smav