1139825Simpif TARGET_TH1520_LPI4A 21541Srgrimes 31541Srgrimesconfig ARCH_THEAD 41541Srgrimes bool 51541Srgrimes default y 61541Srgrimes 71541Srgrimesconfig SYS_BOARD 81541Srgrimes default "th1520_lpi4a" 91541Srgrimes 101541Srgrimesconfig SYS_VENDOR 111541Srgrimes default "thead" 121541Srgrimes 131541Srgrimesconfig SYS_CPU 141541Srgrimes default "generic" 151541Srgrimes 161541Srgrimesconfig SYS_CONFIG_NAME 171541Srgrimes default "th1520_lpi4a" 181541Srgrimes 191541Srgrimesconfig TEXT_BASE 201541Srgrimes default 0x01b00000 if SPL 211541Srgrimes default 0x01c00000 if !RISCV_SMODE 221541Srgrimes default 0x01c00000 if RISCV_SMODE 231541Srgrimes 241541Srgrimesconfig SPL_TEXT_BASE 251541Srgrimes default 0x08000000 261541Srgrimes 271541Srgrimesconfig SPL_OPENSBI_LOAD_ADDR 281541Srgrimes default 0x80000000 2914501Shsu 3050477Speterconfig BOARD_SPECIFIC_OPTIONS 311541Srgrimes def_bool y 321541Srgrimes select ARCH_EARLY_INIT_R 331541Srgrimes imply CPU 341541Srgrimes imply CPU_RISCV 351541Srgrimes imply RISCV_TIMER if RISCV_SMODE 3634924Sbde imply CMD_CPU 3765495Struckman imply SMP 3876166Smarkm imply SUPPORT_OF_CONTROL 3976166Smarkm imply OF_CONTROL 4076166Smarkm imply OF_REAL 4176166Smarkm 4234924Sbdeendif 431541Srgrimes