1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (c) 2021 Linumiz 4 * Author: Navin Sankar Velliangiri <navin@linumiz.com> 5 */ 6 7#include <init.h> 8#include <asm/arch/clock.h> 9#include <asm/arch/crm_regs.h> 10#include <asm/arch/iomux.h> 11#include <asm/arch/mx6-pins.h> 12#include <asm/arch/sys_proto.h> 13#include <asm/mach-imx/iomux-v3.h> 14#include <asm/mach-imx/mxc_i2c.h> 15#include <fsl_esdhc_imx.h> 16#include <linux/bitops.h> 17#include <miiphy.h> 18#include <net.h> 19#include <netdev.h> 20#include <usb.h> 21#include <usb/ehci-ci.h> 22 23DECLARE_GLOBAL_DATA_PTR; 24 25int dram_init(void) 26{ 27 gd->ram_size = imx_ddr_size(); 28 29 return 0; 30} 31 32#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ 33 PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ 34 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | \ 35 PAD_CTL_HYS) 36 37static iomux_v3_cfg_t const uart1_pads[] = { 38 MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), 39 MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), 40}; 41 42static void setup_iomux_uart(void) 43{ 44 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); 45} 46 47int board_early_init_f(void) 48{ 49 setup_iomux_uart(); 50 51 return 0; 52} 53 54#ifdef CONFIG_FEC_MXC 55 56static int setup_fec(int fec_id) 57{ 58 struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; 59 int ret; 60 61 if (fec_id == 0) { 62 /* 63 * Use 50MHz anatop loopback REF_CLK1 for ENET1, 64 * clear gpr1[13], set gpr1[17]. 65 */ 66 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, 67 IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); 68 } else { 69 /* 70 * Use 50MHz anatop loopbak REF_CLK2 for ENET2, 71 * clear gpr1[14], set gpr1[18]. 72 */ 73 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, 74 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); 75 } 76 77 ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ); 78 if (ret) 79 return ret; 80 81 enable_enet_clk(1); 82 83 return 0; 84} 85 86int board_phy_config(struct phy_device *phydev) 87{ 88 phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); 89 90 if (phydev->drv->config) 91 phydev->drv->config(phydev); 92 93 return 0; 94} 95#endif 96 97int board_init(void) 98{ 99 /* Address of boot parameters */ 100 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 101 102#ifdef CONFIG_FEC_MXC 103 setup_fec(CFG_FEC_ENET_DEV); 104#endif 105 106 return 0; 107} 108 109int checkboard(void) 110{ 111 printf("Board: Seeed NPi i.MX6ULL Dev Board\n"); 112 113 return 0; 114} 115