158713Sjhb// SPDX-License-Identifier: GPL-2.0+ 258713Sjhb/* 358713Sjhb * board/renesas/draak/draak.c 458713Sjhb * This file is Draak board support. 558713Sjhb * 658713Sjhb * Copyright (C) 2017 Marek Vasut <marek.vasut+renesas@gmail.com> 758713Sjhb */ 858713Sjhb 958713Sjhb#include <cpu_func.h> 1058713Sjhb#include <hang.h> 1158713Sjhb#include <init.h> 1258713Sjhb#include <malloc.h> 1358713Sjhb#include <netdev.h> 1458713Sjhb#include <dm.h> 1558713Sjhb#include <asm/global_data.h> 1658713Sjhb#include <dm/platform_data/serial_sh.h> 1758713Sjhb#include <asm/processor.h> 1858713Sjhb#include <asm/mach-types.h> 1958713Sjhb#include <asm/io.h> 2058713Sjhb#include <linux/bitops.h> 2158713Sjhb#include <linux/errno.h> 2258713Sjhb#include <asm/arch/sys_proto.h> 2358713Sjhb#include <asm/gpio.h> 2458713Sjhb#include <asm/arch/gpio.h> 2558713Sjhb#include <asm/arch/renesas.h> 2658713Sjhb#include <asm/arch/rcar-mstp.h> 2758713Sjhb#include <i2c.h> 2858713Sjhb#include <mmc.h> 2958713Sjhb 3058713SjhbDECLARE_GLOBAL_DATA_PTR; 3158713Sjhb 3258713Sjhb#define GSX_MSTP112 BIT(12) /* 3DG */ 3358713Sjhb#define SCIF2_MSTP310 BIT(10) /* SCIF2 */ 3458713Sjhb#define DVFS_MSTP926 BIT(26) 3559087Sps#define HSUSB_MSTP704 BIT(4) /* HSUSB */ 3659087Sps 3759087Spsint board_early_init_f(void) 3859087Sps{ 3959087Sps#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) && defined(CONFIG_SYS_I2C_SH) 4058713Sjhb /* DVFS for reset */ 4158713Sjhb mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926); 4258713Sjhb#endif 4358713Sjhb return 0; 4458713Sjhb} 4559087Sps 4659087Sps/* HSUSB block registers */ 4759087Sps#define HSUSB_REG_LPSTS 0xE6590102 4858713Sjhb#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14) 4958713Sjhb#define HSUSB_REG_UGCTRL2 0xE6590184 5058713Sjhb#define HSUSB_REG_UGCTRL2_USB0SEL 0x30 5158713Sjhb#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10 5258993Sps 5358713Sjhbint board_init(void) 5458713Sjhb{ 5558713Sjhb /* USB1 pull-up */ 5658713Sjhb setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN); 5758713Sjhb 5858713Sjhb /* Configure the HSUSB block */ 5958993Sps mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704); 6058993Sps /* Choice USB0SEL */ 6158993Sps clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL, 6258993Sps HSUSB_REG_UGCTRL2_USB0SEL_EHCI); 6358713Sjhb /* low power status */ 6459390Sps setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL); 6559390Sps 6659087Sps return 0; 6758713Sjhb} 6859087Sps