11556Srgrimes// SPDX-License-Identifier: GPL-2.0+ 21556Srgrimes/* 31556Srgrimes * (C) Copyright 2018-2019 41556Srgrimes * NVIDIA Corporation <www.nvidia.com> 51556Srgrimes * 61556Srgrimes */ 71556Srgrimes 81556Srgrimes#include <common.h> 91556Srgrimes#include <fdtdec.h> 101556Srgrimes#include <i2c.h> 111556Srgrimes#include <linux/bitops.h> 121556Srgrimes#include <linux/libfdt.h> 131556Srgrimes#include <pca953x.h> 141556Srgrimes#include <asm/arch/gpio.h> 151556Srgrimes#include <asm/arch/pinmux.h> 161556Srgrimes#include <asm/arch-tegra/board.h> 171556Srgrimes#include "../p2571/max77620_init.h" 181556Srgrimes 191556Srgrimesvoid pin_mux_mmc(void) 201556Srgrimes{ 211556Srgrimes struct udevice *dev; 221556Srgrimes uchar val; 231556Srgrimes int ret; 241556Srgrimes 251556Srgrimes /* Turn on MAX77620 LDO2 to 3.3V for SD card power */ 261556Srgrimes debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__); 271556Srgrimes ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); 281556Srgrimes if (ret) { 291556Srgrimes printf("%s: Cannot find MAX77620 I2C chip\n", __func__); 301556Srgrimes return; 3136152Scharnier } 3236152Scharnier /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ 3336152Scharnier val = 0xF2; 341556Srgrimes ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1); 3599110Sobrien if (ret) 3699110Sobrien printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret); 371556Srgrimes 381556Srgrimes /* Disable LDO4 discharge */ 391556Srgrimes ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1); 401556Srgrimes if (ret) { 411556Srgrimes printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret); 421556Srgrimes } else { 431556Srgrimes val &= ~BIT(1); /* ADE */ 441556Srgrimes ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1); 451556Srgrimes if (ret) 461556Srgrimes printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret); 4790111Simp } 4890111Simp 4990111Simp /* Set MBLPD */ 501556Srgrimes ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1); 511556Srgrimes if (ret) { 5290111Simp printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); 531556Srgrimes } else { 541556Srgrimes val |= BIT(6); /* MBLPD */ 551556Srgrimes ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1); 561556Srgrimes if (ret) 571556Srgrimes printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret); 581556Srgrimes } 591556Srgrimes} 601556Srgrimes 611556Srgrimes#ifdef CONFIG_PCI_TEGRA 621556Srgrimesint tegra_pcie_board_init(void) 631556Srgrimes{ 641556Srgrimes struct udevice *dev; 658855Srgrimes uchar val; 661556Srgrimes int ret; 671556Srgrimes 688148Sache /* Turn on MAX77620 LDO1 to 1.05V for PEX power */ 698148Sache debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__); 708148Sache ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev); 718855Srgrimes if (ret) { 721556Srgrimes printf("%s: Cannot find MAX77620 I2C chip\n", __func__); 731556Srgrimes return -1; 741556Srgrimes } 751556Srgrimes /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */ 761556Srgrimes val = 0xCA; 771556Srgrimes ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1); 781556Srgrimes if (ret) 791556Srgrimes printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret); 801556Srgrimes 811556Srgrimes return 0; 821556Srgrimes} 831556Srgrimes#endif /* PCI */ 841556Srgrimes 851556Srgrimesstatic const char * const nodes[] = { 8659788Sache "/host1x@50000000/dc@54200000", 871556Srgrimes "/host1x@50000000/dc@54240000", 881556Srgrimes "/external-memory-controller@7001b000", 891556Srgrimes}; 908170Sbde 911556Srgrimesint ft_board_setup(void *fdt, struct bd_info *bd) 928170Sbde{ 938170Sbde ft_mac_address_setup(fdt); 941556Srgrimes ft_carveout_setup(fdt, nodes, ARRAY_SIZE(nodes)); 951556Srgrimes 961556Srgrimes return 0; 971556Srgrimes} 981556Srgrimes