1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2018 Kontron Electronics GmbH 4 */ 5 6#include <asm/arch/clock.h> 7#include <asm/arch/sys_proto.h> 8#include <asm/global_data.h> 9#include <env_internal.h> 10#include <fdt_support.h> 11#include <phy.h> 12#include <sl-mx6ul-common.h> 13 14DECLARE_GLOBAL_DATA_PTR; 15 16int dram_init(void) 17{ 18 gd->ram_size = imx_ddr_size(); 19 20 return 0; 21} 22 23int ft_board_setup(void *blob, struct bd_info *bd) 24{ 25 /* 26 * Overwrite the memory size in the devicetree that is 27 * passed to the kernel with the actual size detected. 28 */ 29 return fdt_fixup_memory(blob, PHYS_SDRAM, gd->ram_size); 30} 31 32static int setup_fec(void) 33{ 34 struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; 35 int ret; 36 37 /* 38 * Use 50M anatop loopback REF_CLK1 for ENET1, 39 * clear gpr1[13], set gpr1[17]. 40 */ 41 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK, 42 IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK); 43 44 /* 45 * Use 50M anatop loopback REF_CLK2 for ENET2, 46 * clear gpr1[14], set gpr1[18]. 47 */ 48 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK, 49 IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK); 50 51 ret = enable_fec_anatop_clock(0, ENET_50MHZ); 52 if (ret) 53 return ret; 54 55 ret = enable_fec_anatop_clock(1, ENET_50MHZ); 56 if (ret) 57 return ret; 58 59 return 0; 60} 61 62int board_phy_config(struct phy_device *phydev) 63{ 64 phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); 65 66 if (phydev->drv->config) 67 phydev->drv->config(phydev); 68 69 return 0; 70} 71 72int board_early_init_f(void) 73{ 74 enable_qspi_clk(0); 75 76 return 0; 77} 78 79int board_init(void) 80{ 81 /* Address of boot parameters */ 82 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 83 84 setup_fec(); 85 86 return 0; 87} 88 89enum env_location env_get_location(enum env_operation op, int prio) 90{ 91 if (prio) 92 return ENVL_UNKNOWN; 93 94 if (sl_mx6ul_is_spi_nor_boot() && CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH)) 95 return ENVL_SPI_FLASH; 96 else if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC)) 97 return ENVL_MMC; 98 99 return ENVL_NOWHERE; 100} 101