1// SPDX-License-Identifier: GPL-2.0+
2/**
3 * Copyright 2010-2011 Freescale Semiconductor
4 * Author: Timur Tabi <timur@freescale.com>
5 *
6 * This file provides support for the ngPIXIS, a board-specific FPGA used on
7 * some Freescale reference boards.
8 *
9 * A "switch" is black rectangular block on the motherboard.  It contains
10 * eight "bits".  The ngPIXIS has a set of memory-mapped registers (SWx) that
11 * shadow the actual physical switches.  There is also another set of
12 * registers (ENx) that tell the ngPIXIS which bits of SWx should actually be
13 * used to override the values of the bits in the physical switches.
14 *
15 * The following macros need to be defined:
16 *
17 * PIXIS_BASE - The virtual address of the base of the PIXIS register map
18 *
19 * PIXIS_LBMAP_SWITCH - The switch number (i.e. the "x" in "SWx"). This value
20 *    is used in the PIXIS_SW() macro to determine which offset in
21 *    the PIXIS register map corresponds to the physical switch that controls
22 *    the boot bank.
23 *
24 * PIXIS_LBMAP_MASK - A bit mask the defines which bits in SWx to use.
25 *
26 * PIXIS_LBMAP_SHIFT - The shift value that corresponds to PIXIS_LBMAP_MASK.
27 *
28 * PIXIS_LBMAP_ALTBANK - The value to program into SWx to tell the ngPIXIS to
29 *    boot from the alternate bank.
30 */
31
32#include <common.h>
33#include <command.h>
34#include <asm/io.h>
35
36#include "ngpixis.h"
37
38static u8 __pixis_read(unsigned int reg)
39{
40	void *p = (void *)PIXIS_BASE;
41
42	return in_8(p + reg);
43}
44u8 pixis_read(unsigned int reg) __attribute__((weak, alias("__pixis_read")));
45
46static void __pixis_write(unsigned int reg, u8 value)
47{
48	void *p = (void *)PIXIS_BASE;
49
50	out_8(p + reg, value);
51}
52void pixis_write(unsigned int reg, u8 value)
53	__attribute__((weak, alias("__pixis_write")));
54
55/*
56 * Reset the board. This ignores the ENx registers.
57 */
58void __pixis_reset(void)
59{
60	PIXIS_WRITE(rst, 0);
61
62	while (1);
63}
64void pixis_reset(void) __attribute__((weak, alias("__pixis_reset")));
65
66/*
67 * Reset the board.  Like pixis_reset(), but it honors the ENx registers.
68 */
69void __pixis_bank_reset(void)
70{
71	PIXIS_WRITE(vctl, 0);
72	PIXIS_WRITE(vctl, 1);
73
74	while (1);
75}
76void pixis_bank_reset(void) __attribute__((weak, alias("__pixis_bank_reset")));
77
78/**
79 * Set the boot bank to the power-on default bank
80 */
81void __clear_altbank(void)
82{
83	u8 reg;
84
85	/* Tell the ngPIXIS to use this the bits in the physical switch for the
86	 * boot bank value, instead of the SWx register.  We need to be careful
87	 * only to set the bits in SWx that correspond to the boot bank.
88	 */
89	reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
90	reg &= ~PIXIS_LBMAP_MASK;
91	PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
92}
93void clear_altbank(void) __attribute__((weak, alias("__clear_altbank")));
94
95/**
96 * Set the boot bank to the alternate bank
97 */
98void __set_altbank(void)
99{
100	u8 reg;
101
102	/* Program the alternate bank number into the SWx register.
103	 */
104	reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].sw);
105	reg = (reg & ~PIXIS_LBMAP_MASK) | PIXIS_LBMAP_ALTBANK;
106	PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].sw, reg);
107
108	/* Tell the ngPIXIS to use this the bits in the SWx register for the
109	 * boot bank value, instead of the physical switch.  We need to be
110	 * careful only to set the bits in SWx that correspond to the boot bank.
111	 */
112	reg = PIXIS_READ(s[PIXIS_LBMAP_SWITCH - 1].en);
113	reg |= PIXIS_LBMAP_MASK;
114	PIXIS_WRITE(s[PIXIS_LBMAP_SWITCH - 1].en, reg);
115}
116void set_altbank(void) __attribute__((weak, alias("__set_altbank")));
117
118#ifdef DEBUG
119static void pixis_dump_regs(void)
120{
121	unsigned int i;
122
123	printf("id=%02x\n", PIXIS_READ(id));
124	printf("arch=%02x\n", PIXIS_READ(arch));
125	printf("scver=%02x\n", PIXIS_READ(scver));
126	printf("csr=%02x\n", PIXIS_READ(csr));
127	printf("rst=%02x\n", PIXIS_READ(rst));
128	printf("aux=%02x\n", PIXIS_READ(aux));
129	printf("spd=%02x\n", PIXIS_READ(spd));
130	printf("brdcfg0=%02x\n", PIXIS_READ(brdcfg0));
131	printf("brdcfg1=%02x\n", PIXIS_READ(brdcfg1));
132	printf("addr=%02x\n", PIXIS_READ(addr));
133	printf("data=%02x\n", PIXIS_READ(data));
134	printf("led=%02x\n", PIXIS_READ(led));
135	printf("vctl=%02x\n", PIXIS_READ(vctl));
136	printf("vstat=%02x\n", PIXIS_READ(vstat));
137	printf("vcfgen0=%02x\n", PIXIS_READ(vcfgen0));
138	printf("ocmcsr=%02x\n", PIXIS_READ(ocmcsr));
139	printf("ocmmsg=%02x\n", PIXIS_READ(ocmmsg));
140	printf("gmdbg=%02x\n", PIXIS_READ(gmdbg));
141	printf("sclk=%02x%02x%02x\n",
142	       PIXIS_READ(sclk[0]), PIXIS_READ(sclk[1]), PIXIS_READ(sclk[2]));
143	printf("dclk=%02x%02x%02x\n",
144	       PIXIS_READ(dclk[0]), PIXIS_READ(dclk[1]), PIXIS_READ(dclk[2]));
145	printf("watch=%02x\n", PIXIS_READ(watch));
146
147	for (i = 0; i < 8; i++) {
148		printf("SW%u=%02x/%02x ", i + 1,
149			PIXIS_READ(s[i].sw), PIXIS_READ(s[i].en));
150	}
151	putc('\n');
152}
153#endif
154
155void pixis_sysclk_set(unsigned long sysclk)
156{
157	unsigned long freq_word;
158	u8 sclk0, sclk1, sclk2;
159
160	freq_word = ics307_sysclk_calculator(sysclk);
161	sclk2 = freq_word & 0xff;
162	sclk1 = (freq_word >> 8) & 0xff;
163	sclk0 = (freq_word >> 16) & 0xff;
164
165	/* set SYSCLK enable bit */
166	PIXIS_WRITE(vcfgen0, 0x01);
167
168	/* SYSCLK to required frequency */
169	PIXIS_WRITE(sclk[0], sclk0);
170	PIXIS_WRITE(sclk[1], sclk1);
171	PIXIS_WRITE(sclk[2], sclk2);
172}
173
174int pixis_reset_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
175		    char *const argv[])
176{
177	unsigned int i;
178	unsigned long sysclk;
179	char *p_altbank = NULL;
180#ifdef DEBUG
181	char *p_dump = NULL;
182#endif
183	char *unknown_param = NULL;
184
185	/* No args is a simple reset request.
186	 */
187	if (argc <= 1)
188		pixis_reset();
189
190	for (i = 1; i < argc; i++) {
191		if (strcmp(argv[i], "altbank") == 0) {
192			p_altbank = argv[i];
193			continue;
194		}
195
196#ifdef DEBUG
197		if (strcmp(argv[i], "dump") == 0) {
198			p_dump = argv[i];
199			continue;
200		}
201#endif
202		if (strcmp(argv[i], "sysclk") == 0) {
203			sysclk = simple_strtoul(argv[i + 1], NULL, 0);
204			i += 1;
205			pixis_sysclk_set(sysclk);
206			continue;
207		}
208
209		unknown_param = argv[i];
210	}
211
212	if (unknown_param) {
213		printf("Invalid option: %s\n", unknown_param);
214		return 1;
215	}
216
217#ifdef DEBUG
218	if (p_dump) {
219		pixis_dump_regs();
220
221		/* 'dump' ignores other commands */
222		return 0;
223	}
224#endif
225
226	if (p_altbank)
227		set_altbank();
228	else
229		clear_altbank();
230
231	pixis_bank_reset();
232
233	/* Shouldn't be reached. */
234	return 0;
235}
236
237U_BOOT_LONGHELP(pixis,
238	"- hard reset to default bank\n"
239	"pixis_reset altbank - reset to alternate bank\n"
240#ifdef DEBUG
241	"pixis_reset dump - display the PIXIS registers\n"
242#endif
243	"pixis_reset sysclk <SYSCLK_freq> - reset with SYSCLK frequency(KHz)\n");
244
245U_BOOT_CMD(
246	pixis_reset, CONFIG_SYS_MAXARGS, 1, pixis_reset_cmd,
247	"Reset the board using the FPGA sequencer", pixis_help_text
248	);
249