1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * board.h
4 *
5 * EETS GmbH PDU001 board information header
6 *
7 * Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
8 *
9 * Copyright (C) 2011, Texas Instruments, Incorporated - https://www.ti.com/
10 */
11
12#ifndef _BOARD_H_
13#define _BOARD_H_
14
15/*
16 * We have two pin mux functions that must exist. First we need I2C0 to
17 * access the TPS65910 PMIC located on the M2 computing module.
18 * Second, if we want low-level debugging or a early UART (ie. before the
19 * pin controller driver is running), we need one of the UART ports UART0 to
20 * UART5 (usually UART3 since it is wired to K2).
21 * In case of I2C0 access we explicitly don't rely on the the ROM but we could
22 * do so as we use the primary mode (mode 0) for I2C0.
23 * All other multiplexing and pin configuration is done by the DT once it
24 * gets parsed by the pin controller driver.
25 * However we relay on the ROM to configure the pins of MMC0 (eMMC) as well
26 * as MMC1 (microSD card-cage) since these are our boot devices.
27 */
28void enable_uart0_pin_mux(void);
29void enable_uart1_pin_mux(void);
30void enable_uart2_pin_mux(void);
31void enable_uart3_pin_mux(void);
32void enable_uart4_pin_mux(void);
33void enable_uart5_pin_mux(void);
34void enable_uart_pin_mux(u32 addr);
35void enable_i2c0_pin_mux(void);
36
37#endif
38