1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright 2019 NXP 4 */ 5 6#include <common.h> 7#include <command.h> 8#include <cpu_func.h> 9#include <hang.h> 10#include <image.h> 11#include <init.h> 12#include <log.h> 13#include <spl.h> 14#include <asm/global_data.h> 15#include <asm/io.h> 16#include <asm/mach-imx/iomux-v3.h> 17#include <asm/arch/clock.h> 18#include <asm/arch/imx8mm_pins.h> 19#include <asm/arch/sys_proto.h> 20#include <asm/mach-imx/boot_mode.h> 21#include <asm/arch/ddr.h> 22#include <asm/sections.h> 23 24#include <dm/uclass.h> 25#include <dm/device.h> 26#include <dm/uclass-internal.h> 27#include <dm/device-internal.h> 28 29#include <power/pmic.h> 30#include <power/pca9450.h> 31 32DECLARE_GLOBAL_DATA_PTR; 33 34int spl_board_boot_device(enum boot_device boot_dev_spl) 35{ 36 switch (boot_dev_spl) { 37 case USB_BOOT: 38 return BOOT_DEVICE_BOARD; 39 case SD2_BOOT: 40 case MMC2_BOOT: 41 return BOOT_DEVICE_MMC1; 42 case SD3_BOOT: 43 case MMC3_BOOT: 44 return BOOT_DEVICE_MMC2; 45 default: 46 return BOOT_DEVICE_NONE; 47 } 48} 49 50static void spl_dram_init(void) 51{ 52 ddr_init(&dram_timing); 53} 54 55void spl_board_init(void) 56{ 57 if (is_usb_boot()) 58 puts("USB Boot\n"); 59 else 60 puts("Normal Boot\n"); 61} 62 63#ifdef CONFIG_SPL_LOAD_FIT 64int board_fit_config_name_match(const char *name) 65{ 66 /* Just empty function now - can't decide what to choose */ 67 debug("%s: %s\n", __func__, name); 68 69 return 0; 70} 71#endif 72 73static int power_init_board(void) 74{ 75 struct udevice *dev; 76 int ret; 77 78 ret = pmic_get("pmic@25", &dev); 79 if (ret == -ENODEV) { 80 puts("No pmic\n"); 81 return 0; 82 } 83 if (ret != 0) 84 return ret; 85 86 /* BUCKxOUT_DVS0/1 control BUCK123 output */ 87 pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); 88 89 /* Buck 1 DVS control through PMIC_STBY_REQ */ 90 pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); 91 92 /* Set DVS1 to 0.8V for suspend */ 93 pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x10); 94 95 /* increase VDD_DRAM to 0.95V for 3GHz DDR */ 96 pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1C); 97 98 /* VDD_DRAM needs off in suspend, set B1_ENMODE=10 (ON by PMIC_ON_REQ = H && PMIC_STBY_REQ = L) */ 99 pmic_reg_write(dev, PCA9450_BUCK3CTRL, 0x4a); 100 101 /* set VDD_SNVS_0V8 from default 0.85V */ 102 pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0); 103 104 /* set WDOG_B_CFG to cold reset */ 105 pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1); 106 107 return 0; 108} 109 110void board_init_f(ulong dummy) 111{ 112 struct udevice *dev; 113 int ret; 114 115 arch_cpu_init(); 116 117 init_uart_clk(1); 118 119 timer_init(); 120 121 /* Clear the BSS. */ 122 memset(__bss_start, 0, __bss_end - __bss_start); 123 124 ret = spl_early_init(); 125 if (ret) { 126 debug("spl_early_init() failed: %d\n", ret); 127 hang(); 128 } 129 130 ret = uclass_get_device_by_name(UCLASS_CLK, 131 "clock-controller@30380000", 132 &dev); 133 if (ret < 0) { 134 printf("Failed to find clock node. Check device tree\n"); 135 hang(); 136 } 137 138 preloader_console_init(); 139 140 enable_tzc380(); 141 142 power_init_board(); 143 144 /* DDR initialization */ 145 spl_dram_init(); 146 147 board_init_r(NULL, 0); 148} 149