1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2007-2008
4 * Stelian Pop <stelian@popies.net>
5 * Lead Tech Design <www.leadtechdesign.com>
6 */
7
8#include <common.h>
9#include <debug_uart.h>
10#include <init.h>
11#include <net.h>
12#include <asm/global_data.h>
13#include <asm/io.h>
14#include <asm/arch/at91sam9260_matrix.h>
15#include <asm/arch/at91sam9_smc.h>
16#include <asm/arch/at91_common.h>
17#include <asm/arch/clk.h>
18#include <asm/arch/gpio.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22/* ------------------------------------------------------------------------- */
23/*
24 * Miscelaneous platform dependent initialisations
25 */
26
27#ifdef CONFIG_CMD_NAND
28static void at91sam9260ek_nand_hw_init(void)
29{
30	struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
31	struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
32	unsigned long csa;
33
34	/* Assign CS3 to NAND/SmartMedia Interface */
35	csa = readl(&matrix->ebicsa);
36	csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
37	writel(csa, &matrix->ebicsa);
38
39	/* Configure SMC CS3 for NAND/SmartMedia */
40	writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
41		AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
42		&smc->cs[3].setup);
43	writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
44		AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
45		&smc->cs[3].pulse);
46	writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
47		&smc->cs[3].cycle);
48	writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
49		AT91_SMC_MODE_EXNW_DISABLE |
50#ifdef CONFIG_SYS_NAND_DBW_16
51		AT91_SMC_MODE_DBW_16 |
52#else /* CONFIG_SYS_NAND_DBW_8 */
53		AT91_SMC_MODE_DBW_8 |
54#endif
55		AT91_SMC_MODE_TDF_CYCLE(2),
56		&smc->cs[3].mode);
57
58	/* Configure RDY/BSY */
59	at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1);
60
61	/* Enable NandFlash */
62	at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1);
63
64}
65#endif
66
67#ifdef CONFIG_DEBUG_UART_BOARD_INIT
68void board_debug_uart_init(void)
69{
70	at91_seriald_hw_init();
71}
72#endif
73
74#ifdef CONFIG_BOARD_EARLY_INIT_F
75int board_early_init_f(void)
76{
77	return 0;
78}
79#endif
80
81int board_init(void)
82{
83	/* adress of boot parameters */
84	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
85
86#ifdef CONFIG_CMD_NAND
87	at91sam9260ek_nand_hw_init();
88#endif
89	return 0;
90}
91
92int dram_init(void)
93{
94	gd->ram_size = get_ram_size(
95		(void *)CFG_SYS_SDRAM_BASE,
96		CFG_SYS_SDRAM_SIZE);
97	return 0;
98}
99
100#ifdef CONFIG_RESET_PHY_R
101void reset_phy(void)
102{
103}
104#endif
105