1// SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2019 Intel Corporation <www.intel.com>
4 *
5 */
6
7/dts-v1/;
8
9/ {
10	description = "FIT image with FPGA bistream";
11	#address-cells = <1>;
12
13	images {
14		fpga-periph-1 {
15			description = "FPGA peripheral bitstream";
16			data = /incbin/("../../../ghrd_10as066n2.periph.rbf");
17			type = "fpga";
18			arch = "arm";
19			compression = "none";
20		};
21
22		fpga-core-1 {
23			description = "FPGA core bitstream";
24			data = /incbin/("../../../ghrd_10as066n2.core.rbf");
25			type = "fpga";
26			arch = "arm";
27			compression = "none";
28		};
29	};
30
31	configurations {
32		default = "config-1";
33		config-1 {
34			description = "Boot with FPGA early IO release config";
35			fpga = "fpga-periph-1", "fpga-core-1";
36		};
37	};
38};
39