1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com> 4 * Copyright (C) 2011 Jason Cooper <u-boot@lakedaemon.net> 5 * 6 * Based on work by: 7 * Marvell Semiconductor <www.marvell.com> 8 * Written-by: Siddarth Gore <gores@marvell.com> 9 */ 10 11#include <common.h> 12#include <init.h> 13#include <netdev.h> 14#include <asm/arch/cpu.h> 15#include <asm/arch/soc.h> 16#include <asm/arch/mpp.h> 17#include <asm/global_data.h> 18 19DECLARE_GLOBAL_DATA_PTR; 20 21#define DREAMPLUG_OE_LOW (~(0)) 22#define DREAMPLUG_OE_HIGH (~(0)) 23#define DREAMPLUG_OE_VAL_LOW 0 24#define DREAMPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ 25 26int board_early_init_f(void) 27{ 28 /* 29 * default gpio configuration 30 * There are maximum 64 gpios controlled through 2 sets of registers 31 * the below configuration configures mainly initial LED status 32 */ 33 mvebu_config_gpio(DREAMPLUG_OE_VAL_LOW, 34 DREAMPLUG_OE_VAL_HIGH, 35 DREAMPLUG_OE_LOW, DREAMPLUG_OE_HIGH); 36 37 /* Multi-Purpose Pins Functionality configuration */ 38 static const u32 kwmpp_config[] = { 39 MPP0_SPI_SCn, /* SPI Flash */ 40 MPP1_SPI_MOSI, 41 MPP2_SPI_SCK, 42 MPP3_SPI_MISO, 43 MPP4_NF_IO6, 44 MPP5_NF_IO7, 45 MPP6_SYSRST_OUTn, 46 MPP7_GPO, 47 MPP8_TW_SDA, 48 MPP9_TW_SCK, 49 MPP10_UART0_TXD, /* Serial */ 50 MPP11_UART0_RXD, 51 MPP12_SD_CLK, /* SDIO Slot */ 52 MPP13_SD_CMD, 53 MPP14_SD_D0, 54 MPP15_SD_D1, 55 MPP16_SD_D2, 56 MPP17_SD_D3, 57 MPP18_NF_IO0, 58 MPP19_NF_IO1, 59 MPP20_GE1_0, /* Gigabit Ethernet */ 60 MPP21_GE1_1, 61 MPP22_GE1_2, 62 MPP23_GE1_3, 63 MPP24_GE1_4, 64 MPP25_GE1_5, 65 MPP26_GE1_6, 66 MPP27_GE1_7, 67 MPP28_GE1_8, 68 MPP29_GE1_9, 69 MPP30_GE1_10, 70 MPP31_GE1_11, 71 MPP32_GE1_12, 72 MPP33_GE1_13, 73 MPP34_GE1_14, 74 MPP35_GE1_15, 75 MPP36_GPIO, /* 7 external GPIO pins (36 - 45) */ 76 MPP37_GPIO, 77 MPP38_GPIO, 78 MPP39_GPIO, 79 MPP40_TDM_SPI_SCK, 80 MPP41_TDM_SPI_MISO, 81 MPP42_TDM_SPI_MOSI, 82 MPP43_GPIO, 83 MPP44_GPIO, 84 MPP45_GPIO, 85 MPP46_GPIO, 86 MPP47_GPIO, /* Bluetooth LED */ 87 MPP48_GPIO, /* Wifi LED */ 88 MPP49_GPIO, /* Wifi AP LED */ 89 0 90 }; 91 kirkwood_mpp_conf(kwmpp_config, NULL); 92 return 0; 93} 94 95int board_eth_init(struct bd_info *bis) 96{ 97 return cpu_eth_init(bis); 98} 99 100int board_init(void) 101{ 102 /* address of boot parameters */ 103 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; 104 105 return 0; 106} 107