1219820Sjeff/* 2219820Sjeff * This header provides constants for DRA pinctrl bindings. 3219820Sjeff * 4219820Sjeff * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 5271127Shselasky * Author: Rajendra Nayak <rnayak@ti.com> 6219820Sjeff * 7219820Sjeff * This program is free software; you can redistribute it and/or modify 8219820Sjeff * it under the terms of the GNU General Public License version 2 as 9219820Sjeff * published by the Free Software Foundation. 10219820Sjeff */ 11219820Sjeff 12219820Sjeff#ifndef _DT_BINDINGS_PINCTRL_DRA_H 13219820Sjeff#define _DT_BINDINGS_PINCTRL_DRA_H 14219820Sjeff 15219820Sjeff/* DRA7 mux mode options for each pin. See TRM for options */ 16219820Sjeff#define MUX_MODE0 0x0 17219820Sjeff#define MUX_MODE1 0x1 18219820Sjeff#define MUX_MODE2 0x2 19219820Sjeff#define MUX_MODE3 0x3 20219820Sjeff#define MUX_MODE4 0x4 21219820Sjeff#define MUX_MODE5 0x5 22219820Sjeff#define MUX_MODE6 0x6 23219820Sjeff#define MUX_MODE7 0x7 24219820Sjeff#define MUX_MODE8 0x8 25219820Sjeff#define MUX_MODE9 0x9 26219820Sjeff#define MUX_MODE10 0xa 27219820Sjeff#define MUX_MODE11 0xb 28219820Sjeff#define MUX_MODE12 0xc 29219820Sjeff#define MUX_MODE13 0xd 30219820Sjeff#define MUX_MODE14 0xe 31219820Sjeff#define MUX_MODE15 0xf 32219820Sjeff 33219820Sjeff/* Certain pins need virtual mode, but note: they may glitch */ 34219820Sjeff#define MUX_VIRTUAL_MODE0 (MODE_SELECT | (0x0 << 4)) 35219820Sjeff#define MUX_VIRTUAL_MODE1 (MODE_SELECT | (0x1 << 4)) 36219820Sjeff#define MUX_VIRTUAL_MODE2 (MODE_SELECT | (0x2 << 4)) 37219820Sjeff#define MUX_VIRTUAL_MODE3 (MODE_SELECT | (0x3 << 4)) 38#define MUX_VIRTUAL_MODE4 (MODE_SELECT | (0x4 << 4)) 39#define MUX_VIRTUAL_MODE5 (MODE_SELECT | (0x5 << 4)) 40#define MUX_VIRTUAL_MODE6 (MODE_SELECT | (0x6 << 4)) 41#define MUX_VIRTUAL_MODE7 (MODE_SELECT | (0x7 << 4)) 42#define MUX_VIRTUAL_MODE8 (MODE_SELECT | (0x8 << 4)) 43#define MUX_VIRTUAL_MODE9 (MODE_SELECT | (0x9 << 4)) 44#define MUX_VIRTUAL_MODE10 (MODE_SELECT | (0xa << 4)) 45#define MUX_VIRTUAL_MODE11 (MODE_SELECT | (0xb << 4)) 46#define MUX_VIRTUAL_MODE12 (MODE_SELECT | (0xc << 4)) 47#define MUX_VIRTUAL_MODE13 (MODE_SELECT | (0xd << 4)) 48#define MUX_VIRTUAL_MODE14 (MODE_SELECT | (0xe << 4)) 49#define MUX_VIRTUAL_MODE15 (MODE_SELECT | (0xf << 4)) 50 51#define MODE_SELECT (1 << 8) 52 53#define PULL_ENA (0 << 16) 54#define PULL_DIS (1 << 16) 55#define PULL_UP (1 << 17) 56#define INPUT_EN (1 << 18) 57#define SLEWCONTROL (1 << 19) 58#define WAKEUP_EN (1 << 24) 59#define WAKEUP_EVENT (1 << 25) 60 61/* Active pin states */ 62#define PIN_OUTPUT (0 | PULL_DIS) 63#define PIN_OUTPUT_PULLUP (PULL_UP) 64#define PIN_OUTPUT_PULLDOWN (0) 65#define PIN_INPUT (INPUT_EN | PULL_DIS) 66#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL) 67#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) 68#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) 69 70/* 71 * Macro to allow using the absolute physical address instead of the 72 * padconf registers instead of the offset from padconf base. 73 */ 74#define DRA7XX_CORE_IOPAD(pa, val) (((pa) & 0xffff) - 0x3400) (val) 75 76/* DRA7 IODELAY configuration parameters */ 77#define A_DELAY_PS(val) ((val) & 0xffff) 78#define G_DELAY_PS(val) ((val) & 0xffff) 79#endif 80